cgppc.pas 36 KB

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  1. {
  2. Copyright (c) 2006 by Florian Klaempfl
  3. This unit implements the common part of the code generator for the PowerPC
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit cgppc;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. globtype,symtype,symdef,
  22. cgbase,cgobj,
  23. aasmbase,aasmcpu,aasmtai,aasmdata,
  24. cpubase,cpuinfo,cgutils,rgcpu,
  25. parabase;
  26. type
  27. tcgppcgen = class(tcg)
  28. procedure a_param_const(list: TAsmList; size: tcgsize; a: aint; const paraloc : tcgpara); override;
  29. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const paraloc : tcgpara); override;
  30. procedure a_call_reg(list : TAsmList;reg: tregister); override;
  31. procedure a_call_ref(list : TAsmList;ref: treference); override;
  32. { stores the contents of register reg to the memory location described by
  33. ref }
  34. procedure a_load_reg_ref(list: TAsmList; fromsize, tosize: TCGSize;
  35. reg: tregister; const ref: treference); override;
  36. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  37. { fpu move instructions }
  38. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister); override;
  39. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); override;
  40. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); override;
  41. { overflow checking }
  42. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef);override;
  43. { entry code }
  44. procedure g_profilecode(list: TAsmList); override;
  45. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  46. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
  47. procedure g_maybe_got_init(list: TAsmList); override;
  48. protected
  49. function get_darwin_call_stub(const s: string): tasmsymbol;
  50. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); override;
  51. { Make sure ref is a valid reference for the PowerPC and sets the }
  52. { base to the value of the index if (base = R_NO). }
  53. { Returns true if the reference contained a base, index and an }
  54. { offset or symbol, in which case the base will have been changed }
  55. { to a tempreg (which has to be freed by the caller) containing }
  56. { the sum of part of the original reference }
  57. function fixref(list: TAsmList; var ref: treference): boolean;
  58. { contains the common code of a_load_reg_ref and a_load_ref_reg }
  59. procedure a_load_store(list:TAsmList;op: tasmop;reg:tregister;ref: treference);virtual;
  60. { creates the correct branch instruction for a given combination }
  61. { of asmcondflags and destination addressing mode }
  62. procedure a_jmp(list: TAsmList; op: tasmop;
  63. c: tasmcondflag; crval: longint; l: tasmlabel);
  64. { returns true if the offset of the given reference can not be }
  65. { represented by a 16 bit immediate as required by some PowerPC }
  66. { instructions }
  67. function hasLargeOffset(const ref : TReference) : Boolean; inline;
  68. function save_lr_in_prologue: boolean;
  69. function load_got_symbol(list : TAsmList; symbol : string) : tregister;
  70. end;
  71. const
  72. TOpCmp2AsmCond: Array[topcmp] of TAsmCondFlag = (C_NONE,C_EQ,C_GT,
  73. C_LT,C_GE,C_LE,C_NE,C_LE,C_LT,C_GE,C_GT);
  74. {$ifdef extdebug}
  75. function ref2string(const ref : treference) : string;
  76. function cgsize2string(const size : TCgSize) : string;
  77. function cgop2string(const op : TOpCg) : String;
  78. {$endif extdebug}
  79. implementation
  80. uses
  81. {$ifdef extdebug}sysutils,{$endif}
  82. globals,verbose,systems,cutils,
  83. symconst,symsym,fmodule,
  84. rgobj,tgobj,cpupi,procinfo,paramgr;
  85. {$ifdef extdebug}
  86. function ref2string(const ref : treference) : string;
  87. begin
  88. result := 'base : ' + inttostr(ord(ref.base)) + ' index : ' + inttostr(ord(ref.index)) + ' refaddr : ' + inttostr(ord(ref.refaddr)) + ' offset : ' + inttostr(ref.offset) + ' symbol : ';
  89. if (assigned(ref.symbol)) then
  90. result := result + ref.symbol.name;
  91. end;
  92. function cgsize2string(const size : TCgSize) : string;
  93. const
  94. cgsize_strings : array[TCgSize] of string[8] = (
  95. 'OS_NO', 'OS_8', 'OS_16', 'OS_32', 'OS_64', 'OS_128', 'OS_S8', 'OS_S16', 'OS_S32',
  96. 'OS_S64', 'OS_S128', 'OS_F32', 'OS_F64', 'OS_F80', 'OS_C64', 'OS_F128',
  97. 'OS_M8', 'OS_M16', 'OS_M32', 'OS_M64', 'OS_M128', 'OS_MS8', 'OS_MS16', 'OS_MS32',
  98. 'OS_MS64', 'OS_MS128');
  99. begin
  100. result := cgsize_strings[size];
  101. end;
  102. function cgop2string(const op : TOpCg) : String;
  103. const
  104. opcg_strings : array[TOpCg] of string[6] = (
  105. 'None', 'Move', 'Add', 'And', 'Div', 'IDiv', 'IMul', 'Mul',
  106. 'Neg', 'Not', 'Or', 'Sar', 'Shl', 'Shr', 'Sub', 'Xor'
  107. );
  108. begin
  109. result := opcg_strings[op];
  110. end;
  111. {$endif extdebug}
  112. function tcgppcgen.hasLargeOffset(const ref : TReference) : Boolean;
  113. begin
  114. result := aword(ref.offset-low(smallint)) > high(smallint)-low(smallint);
  115. end;
  116. function tcgppcgen.save_lr_in_prologue: boolean;
  117. begin
  118. result:=
  119. (not (po_assembler in current_procinfo.procdef.procoptions) and
  120. ((pi_do_call in current_procinfo.flags) or
  121. (cs_profile in init_settings.moduleswitches))) or
  122. ([cs_lineinfo,cs_debuginfo] * current_settings.moduleswitches <> []);
  123. end;
  124. procedure tcgppcgen.a_param_const(list: TAsmList; size: tcgsize; a: aint; const
  125. paraloc: tcgpara);
  126. var
  127. ref: treference;
  128. begin
  129. paraloc.check_simple_location;
  130. case paraloc.location^.loc of
  131. LOC_REGISTER, LOC_CREGISTER:
  132. a_load_const_reg(list, size, a, paraloc.location^.register);
  133. LOC_REFERENCE:
  134. begin
  135. reference_reset(ref);
  136. ref.base := paraloc.location^.reference.index;
  137. ref.offset := paraloc.location^.reference.offset;
  138. a_load_const_ref(list, size, a, ref);
  139. end;
  140. else
  141. internalerror(2002081101);
  142. end;
  143. end;
  144. procedure tcgppcgen.a_paramaddr_ref(list : TAsmList;const r : treference;const paraloc : tcgpara);
  145. var
  146. ref: treference;
  147. tmpreg: tregister;
  148. begin
  149. paraloc.check_simple_location;
  150. case paraloc.location^.loc of
  151. LOC_REGISTER,LOC_CREGISTER:
  152. a_loadaddr_ref_reg(list,r,paraloc.location^.register);
  153. LOC_REFERENCE:
  154. begin
  155. reference_reset(ref);
  156. ref.base := paraloc.location^.reference.index;
  157. ref.offset := paraloc.location^.reference.offset;
  158. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  159. a_loadaddr_ref_reg(list,r,tmpreg);
  160. a_load_reg_ref(list,OS_ADDR,OS_ADDR,tmpreg,ref);
  161. end;
  162. else
  163. internalerror(2002080701);
  164. end;
  165. end;
  166. procedure tcgppcgen.g_maybe_got_init(list: TAsmList);
  167. var
  168. instr: taicpu;
  169. cond: tasmcond;
  170. savedlr: boolean;
  171. begin
  172. if not(po_assembler in current_procinfo.procdef.procoptions) then
  173. begin
  174. if (cs_create_pic in current_settings.moduleswitches) and
  175. (pi_needs_got in current_procinfo.flags) then
  176. case target_info.system of
  177. system_powerpc_darwin,
  178. system_powerpc64_darwin:
  179. begin
  180. savedlr:=save_lr_in_prologue;
  181. if not savedlr then
  182. list.concat(taicpu.op_reg_reg(A_MFSPR,NR_R0,NR_LR));
  183. fillchar(cond,sizeof(cond),0);
  184. cond.simple:=false;
  185. cond.bo:=20;
  186. cond.bi:=31;
  187. instr:=taicpu.op_sym(A_BCL,current_procinfo.CurrGOTLabel);
  188. instr.setcondition(cond);
  189. list.concat(instr);
  190. a_label(list,current_procinfo.CurrGOTLabel);
  191. a_reg_alloc(list,current_procinfo.got);
  192. list.concat(taicpu.op_reg_reg(A_MFSPR,current_procinfo.got,NR_LR));
  193. if not savedlr or
  194. { in the following case lr is saved, but not restored }
  195. { (happens e.g. when generating debug info for leaf }
  196. { procedures) }
  197. not(pi_do_call in current_procinfo.flags) then
  198. list.concat(taicpu.op_reg_reg(A_MTSPR,NR_LR,NR_R0));
  199. end;
  200. end;
  201. end;
  202. end;
  203. function tcgppcgen.get_darwin_call_stub(const s: string): tasmsymbol;
  204. var
  205. stubname: string;
  206. instr: taicpu;
  207. href: treference;
  208. l1: tasmsymbol;
  209. localgotlab: tasmlabel;
  210. cond: tasmcond;
  211. stubalign: byte;
  212. begin
  213. { function declared in the current unit? }
  214. { doesn't work correctly, because this will also return a hit if we }
  215. { previously took the address of an external procedure. It doesn't }
  216. { really matter, the linker will remove all unnecessary stubs. }
  217. stubname := 'L'+s+'$stub';
  218. result := current_asmdata.getasmsymbol(stubname);
  219. if assigned(result) then
  220. exit;
  221. if current_asmdata.asmlists[al_imports]=nil then
  222. current_asmdata.asmlists[al_imports]:=TAsmList.create;
  223. current_asmdata.asmlists[al_imports].concat(Tai_section.create(sec_stub,'',0));
  224. if (cs_create_pic in current_settings.moduleswitches) then
  225. stubalign:=32
  226. else
  227. stubalign:=16;
  228. current_asmdata.asmlists[al_imports].concat(Tai_align.Create(stubalign));
  229. result := current_asmdata.RefAsmSymbol(stubname);
  230. current_asmdata.asmlists[al_imports].concat(Tai_symbol.Create(result,0));
  231. current_asmdata.asmlists[al_imports].concat(tai_directive.create(asd_indirect_symbol,s));
  232. l1 := current_asmdata.RefAsmSymbol('L'+s+'$lazy_ptr');
  233. reference_reset_symbol(href,l1,0);
  234. href.refaddr := addr_higha;
  235. if (cs_create_pic in current_settings.moduleswitches) then
  236. begin
  237. current_asmdata.getjumplabel(localgotlab);
  238. href.relsymbol:=localgotlab;
  239. fillchar(cond,sizeof(cond),0);
  240. cond.simple:=false;
  241. cond.bo:=20;
  242. cond.bi:=31;
  243. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg(A_MFLR,NR_R0));
  244. instr:=taicpu.op_sym(A_BCL,localgotlab);
  245. instr.setcondition(cond);
  246. current_asmdata.asmlists[al_imports].concat(instr);
  247. a_label(current_asmdata.asmlists[al_imports],localgotlab);
  248. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg(A_MFLR,NR_R11));
  249. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_reg_ref(A_ADDIS,NR_R11,NR_R11,href));
  250. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg(A_MTLR,NR_R0));
  251. end
  252. else
  253. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_ref(A_LIS,NR_R11,href));
  254. href.refaddr := addr_low;
  255. href.base := NR_R11;
  256. {$ifndef cpu64bit}
  257. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_ref(A_LWZU,NR_R12,href));
  258. {$else cpu64bit}
  259. { darwin/ppc64 uses a 32 bit absolute address here, strange... }
  260. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg_ref(A_LDU,NR_R12,href));
  261. {$endif cpu64bit}
  262. current_asmdata.asmlists[al_imports].concat(taicpu.op_reg(A_MTCTR,NR_R12));
  263. current_asmdata.asmlists[al_imports].concat(taicpu.op_none(A_BCTR));
  264. current_asmdata.asmlists[al_imports].concat(tai_directive.create(asd_lazy_symbol_pointer,''));
  265. current_asmdata.asmlists[al_imports].concat(Tai_symbol.Create(l1,0));
  266. current_asmdata.asmlists[al_imports].concat(tai_directive.create(asd_indirect_symbol,s));
  267. current_asmdata.asmlists[al_imports].concat(tai_const.createname('dyld_stub_binding_helper',0));
  268. end;
  269. procedure tcgppcgen.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  270. var
  271. ref2, tmpref: treference;
  272. begin
  273. ref2 := ref;
  274. fixref(list,ref2);
  275. if assigned(ref2.symbol) then
  276. begin
  277. if target_info.system = system_powerpc_macos then
  278. begin
  279. if macos_direct_globals then
  280. begin
  281. reference_reset(tmpref);
  282. tmpref.offset := ref2.offset;
  283. tmpref.symbol := ref2.symbol;
  284. tmpref.base := NR_NO;
  285. list.concat(taicpu.op_reg_reg_ref(A_ADDI,r,NR_RTOC,tmpref));
  286. end
  287. else
  288. begin
  289. reference_reset(tmpref);
  290. tmpref.symbol := ref2.symbol;
  291. tmpref.offset := 0;
  292. tmpref.base := NR_RTOC;
  293. list.concat(taicpu.op_reg_ref(A_LWZ,r,tmpref));
  294. if ref2.offset <> 0 then
  295. begin
  296. reference_reset(tmpref);
  297. tmpref.offset := ref2.offset;
  298. tmpref.base:= r;
  299. list.concat(taicpu.op_reg_ref(A_LA,r,tmpref));
  300. end;
  301. end;
  302. if ref2.base <> NR_NO then
  303. list.concat(taicpu.op_reg_reg_reg(A_ADD,r,r,ref2.base));
  304. //list.concat(tai_comment.create(strpnew('*** a_loadaddr_ref_reg')));
  305. end
  306. else
  307. begin
  308. { add the symbol's value to the base of the reference, and if the }
  309. { reference doesn't have a base, create one }
  310. reference_reset(tmpref);
  311. tmpref.offset := ref2.offset;
  312. tmpref.symbol := ref2.symbol;
  313. tmpref.relsymbol := ref2.relsymbol;
  314. tmpref.refaddr := addr_higha;
  315. if ref2.base<> NR_NO then
  316. begin
  317. list.concat(taicpu.op_reg_reg_ref(A_ADDIS,r,
  318. ref2.base,tmpref));
  319. end
  320. else
  321. list.concat(taicpu.op_reg_ref(A_LIS,r,tmpref));
  322. tmpref.base := NR_NO;
  323. tmpref.refaddr := addr_low;
  324. { can be folded with one of the next instructions by the }
  325. { optimizer probably }
  326. list.concat(taicpu.op_reg_reg_ref(A_ADDI,r,r,tmpref));
  327. end
  328. end
  329. else if ref2.offset <> 0 Then
  330. if ref2.base <> NR_NO then
  331. a_op_const_reg_reg(list,OP_ADD,OS_ADDR,ref2.offset,ref2.base,r)
  332. { FixRef makes sure that "(ref.index <> R_NO) and (ref.offset <> 0)" never}
  333. { occurs, so now only ref.offset has to be loaded }
  334. else
  335. a_load_const_reg(list,OS_ADDR,ref2.offset,r)
  336. else if ref2.index <> NR_NO Then
  337. list.concat(taicpu.op_reg_reg_reg(A_ADD,r,ref2.base,ref2.index))
  338. else if (ref2.base <> NR_NO) and
  339. (r <> ref2.base) then
  340. a_load_reg_reg(list,OS_ADDR,OS_ADDR,ref2.base,r)
  341. else
  342. list.concat(taicpu.op_reg_const(A_LI,r,0));
  343. end;
  344. { calling a procedure by address }
  345. procedure tcgppcgen.a_call_reg(list : TAsmList;reg: tregister);
  346. begin
  347. list.concat(taicpu.op_reg(A_MTCTR,reg));
  348. list.concat(taicpu.op_none(A_BCTRL));
  349. include(current_procinfo.flags,pi_do_call);
  350. end;
  351. procedure tcgppcgen.a_call_ref(list : TAsmList;ref: treference);
  352. var
  353. tempreg : TRegister;
  354. begin
  355. tempreg := getintregister(list, OS_ADDR);
  356. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,tempreg);
  357. a_call_reg(list,tempreg);
  358. end;
  359. procedure tcgppcgen.a_load_reg_ref(list: TAsmList; fromsize, tosize: TCGSize;
  360. reg: tregister; const ref: treference);
  361. const
  362. StoreInstr: array[OS_8..OS_INT, boolean, boolean] of TAsmOp =
  363. { indexed? updating?}
  364. (((A_STB, A_STBU), (A_STBX, A_STBUX)),
  365. ((A_STH, A_STHU), (A_STHX, A_STHUX)),
  366. ((A_STW, A_STWU), (A_STWX, A_STWUX))
  367. {$ifdef cpu64bit}
  368. ,
  369. ((A_STD, A_STDU), (A_STDX, A_STDUX))
  370. {$endif cpu64bit}
  371. );
  372. var
  373. ref2: TReference;
  374. tmpreg: tregister;
  375. op: TAsmOp;
  376. begin
  377. if not (fromsize in [OS_8..OS_INT,OS_S8..OS_SINT]) then
  378. internalerror(2002090903);
  379. if not (tosize in [OS_8..OS_INT,OS_S8..OS_SINT]) then
  380. internalerror(2002090905);
  381. if tosize in [OS_S8..OS_SINT] then
  382. { storing is the same for signed and unsigned values }
  383. tosize := tcgsize(ord(tosize) - (ord(OS_S8) - ord(OS_8)));
  384. ref2 := ref;
  385. fixref(list, ref2);
  386. { unaligned 64 bit accesses are much slower than unaligned }
  387. { 32 bit accesses because they cause a hardware exception }
  388. { (which isn't handled by linux, so there you even get a }
  389. { crash) }
  390. if (ref2.alignment<>0) and
  391. (tosize in [OS_64,OS_S64]) and
  392. (ref.alignment<4) then
  393. begin
  394. if (ref2.base<>NR_NO) and
  395. (ref2.index<>NR_NO) then
  396. begin
  397. tmpreg:=getintregister(list,OS_64);
  398. a_op_reg_reg_reg(list,OP_SHR,OS_64,ref2.base,ref2.index,tmpreg);
  399. ref2.base:=tmpreg;
  400. ref2.index:=NR_NO;
  401. end;
  402. tmpreg:=getintregister(list,OS_64);
  403. a_op_const_reg_reg(list,OP_SHR,OS_64,32,reg,tmpreg);
  404. inc(ref2.offset,4);
  405. a_load_reg_ref(list,OS_32,OS_32,reg,ref2);
  406. dec(ref2.offset,4);
  407. a_load_reg_ref(list,OS_32,OS_32,tmpreg,ref2);
  408. exit;
  409. end;
  410. op := storeinstr[tcgsize2unsigned[tosize], ref2.index <> NR_NO, false];
  411. a_load_store(list, op, reg, ref2);
  412. end;
  413. procedure tcgppcgen.a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister);
  414. var
  415. op: tasmop;
  416. instr: taicpu;
  417. begin
  418. if not(fromsize in [OS_F32,OS_F64]) or
  419. not(tosize in [OS_F32,OS_F64]) then
  420. internalerror(2006123110);
  421. if (tosize < fromsize) then
  422. op:=A_FRSP
  423. else
  424. op:=A_FMR;
  425. instr := taicpu.op_reg_reg(op,reg2,reg1);
  426. list.concat(instr);
  427. if (op = A_FMR) then
  428. rg[R_FPUREGISTER].add_move_instruction(instr);
  429. end;
  430. procedure tcgppcgen.a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister);
  431. const
  432. FpuLoadInstr: Array[OS_F32..OS_F64,boolean, boolean] of TAsmOp =
  433. { indexed? updating?}
  434. (((A_LFS,A_LFSU),(A_LFSX,A_LFSUX)),
  435. ((A_LFD,A_LFDU),(A_LFDX,A_LFDUX)));
  436. var
  437. op: tasmop;
  438. ref2: treference;
  439. begin
  440. if not(fromsize in [OS_F32,OS_F64]) or
  441. not(tosize in [OS_F32,OS_F64]) then
  442. internalerror(200201121);
  443. ref2 := ref;
  444. fixref(list,ref2);
  445. op := fpuloadinstr[fromsize,ref2.index <> NR_NO,false];
  446. a_load_store(list,op,reg,ref2);
  447. if (fromsize > tosize) then
  448. a_loadfpu_reg_reg(list,fromsize,tosize,reg,reg);
  449. end;
  450. procedure tcgppcgen.a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference);
  451. const
  452. FpuStoreInstr: Array[OS_F32..OS_F64,boolean, boolean] of TAsmOp =
  453. { indexed? updating?}
  454. (((A_STFS,A_STFSU),(A_STFSX,A_STFSUX)),
  455. ((A_STFD,A_STFDU),(A_STFDX,A_STFDUX)));
  456. var
  457. op: tasmop;
  458. ref2: treference;
  459. reg2: tregister;
  460. begin
  461. if not(fromsize in [OS_F32,OS_F64]) or
  462. not(tosize in [OS_F32,OS_F64]) then
  463. internalerror(200201122);
  464. ref2 := ref;
  465. fixref(list,ref2);
  466. op := fpustoreinstr[tosize,ref2.index <> NR_NO,false];
  467. { some PPCs have a bug whereby storing a double to memory }
  468. { as single corrupts the value -> convert double to single }
  469. { first (bug confirmed on some G4s, but not on G5s) }
  470. if (tosize < fromsize) and
  471. (current_settings.cputype < cpu_PPC970) then
  472. begin
  473. reg2:=getfpuregister(list,tosize);
  474. a_loadfpu_reg_reg(list,fromsize,tosize,reg,reg2);
  475. reg:=reg2;
  476. end;
  477. a_load_store(list,op,reg,ref2);
  478. end;
  479. procedure tcgppcgen.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  480. var
  481. fromsreg, tosreg: tsubsetregister;
  482. restbits: byte;
  483. begin
  484. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  485. if (subsetsize in [OS_S8..OS_S128]) then
  486. begin
  487. { sign extend }
  488. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  489. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  490. end
  491. else
  492. begin
  493. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  494. { mask other bits }
  495. if (sref.bitlen <> AIntBits) then
  496. a_op_const_reg(list,OP_AND,OS_INT,(aword(1) shl sref.bitlen)-1,valuereg);
  497. end;
  498. { use subsetreg routine, it may have been overridden with an optimized version }
  499. fromsreg.subsetreg := extra_value_reg;
  500. fromsreg.subsetregsize := OS_INT;
  501. { subsetregs always count bits from right to left }
  502. fromsreg.startbit := loadbitsize-restbits;
  503. fromsreg.bitlen := restbits;
  504. tosreg.subsetreg := valuereg;
  505. tosreg.subsetregsize := OS_INT;
  506. tosreg.startbit := 0;
  507. tosreg.bitlen := restbits;
  508. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  509. end;
  510. procedure tcgppcgen.g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef);
  511. var
  512. hl : tasmlabel;
  513. flags : TResFlags;
  514. begin
  515. if not(cs_check_overflow in current_settings.localswitches) then
  516. exit;
  517. current_asmdata.getjumplabel(hl);
  518. if not ((def.typ=pointerdef) or
  519. ((def.typ=orddef) and
  520. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,
  521. bool8bit,bool16bit,bool32bit,bool64bit]))) then
  522. begin
  523. if (current_settings.optimizecputype >= cpu_ppc970) or
  524. (current_settings.cputype >= cpu_ppc970) then
  525. begin
  526. { ... instructions setting overflow flag ...
  527. mfxerf R0
  528. mtcrf 128, R0
  529. ble cr0, label }
  530. list.concat(taicpu.op_reg(A_MFXER, NR_R0));
  531. list.concat(taicpu.op_const_reg(A_MTCRF, 128, NR_R0));
  532. flags.cr := RS_CR0;
  533. flags.flag := F_LE;
  534. a_jmp_flags(list, flags, hl);
  535. end
  536. else
  537. begin
  538. list.concat(taicpu.op_reg(A_MCRXR,NR_CR7));
  539. a_jmp(list,A_BC,C_NO,7,hl)
  540. end;
  541. end
  542. else
  543. a_jmp_cond(list,OC_AE,hl);
  544. a_call_name(list,'FPC_OVERFLOW');
  545. a_label(list,hl);
  546. end;
  547. procedure tcgppcgen.g_profilecode(list: TAsmList);
  548. var
  549. paraloc1 : tcgpara;
  550. begin
  551. if (target_info.system in [system_powerpc_darwin]) then
  552. begin
  553. paraloc1.init;
  554. paramanager.getintparaloc(pocall_cdecl,1,paraloc1);
  555. a_param_reg(list,OS_ADDR,NR_R0,paraloc1);
  556. paramanager.freeparaloc(list,paraloc1);
  557. paraloc1.done;
  558. allocallcpuregisters(list);
  559. a_call_name(list,'mcount');
  560. deallocallcpuregisters(list);
  561. a_reg_dealloc(list,NR_R0);
  562. end;
  563. end;
  564. procedure tcgppcgen.a_jmp_cond(list : TAsmList;cond : TOpCmp; l: tasmlabel);
  565. begin
  566. a_jmp(list,A_BC,TOpCmp2AsmCond[cond],0,l);
  567. end;
  568. procedure tcgppcgen.a_jmp(list: TAsmList; op: tasmop; c: tasmcondflag;
  569. crval: longint; l: tasmlabel);
  570. var
  571. p: taicpu;
  572. begin
  573. p := taicpu.op_sym(op,l);
  574. if op <> A_B then
  575. create_cond_norm(c,crval,p.condition);
  576. p.is_jmp := true;
  577. list.concat(p)
  578. end;
  579. procedure tcgppcgen.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
  580. procedure loadvmttor11;
  581. var
  582. href : treference;
  583. begin
  584. reference_reset_base(href,NR_R3,0);
  585. cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_R11);
  586. end;
  587. procedure op_onr11methodaddr;
  588. var
  589. href : treference;
  590. begin
  591. if (procdef.extnumber=$ffff) then
  592. Internalerror(200006139);
  593. { call/jmp vmtoffs(%eax) ; method offs }
  594. reference_reset_base(href,NR_R11,procdef._class.vmtmethodoffset(procdef.extnumber));
  595. if hasLargeOffset(href) then
  596. begin
  597. {$ifdef cpu64}
  598. if (longint(href.offset) <> href.offset) then
  599. { add support for offsets > 32 bit }
  600. internalerror(200510201);
  601. {$endif cpu64}
  602. list.concat(taicpu.op_reg_reg_const(A_ADDIS,NR_R11,NR_R11,
  603. smallint((href.offset shr 16)+ord(smallint(href.offset and $ffff) < 0))));
  604. href.offset := smallint(href.offset and $ffff);
  605. end;
  606. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_R11);
  607. if (target_info.system = system_powerpc64_linux) then
  608. begin
  609. reference_reset_base(href, NR_R11, 0);
  610. a_load_ref_reg(list, OS_ADDR, OS_ADDR, href, NR_R11);
  611. end;
  612. list.concat(taicpu.op_reg(A_MTCTR,NR_R11));
  613. list.concat(taicpu.op_none(A_BCTR));
  614. if (target_info.system = system_powerpc64_linux) then
  615. list.concat(taicpu.op_none(A_NOP));
  616. end;
  617. var
  618. make_global : boolean;
  619. begin
  620. if not(procdef.proctypeoption in [potype_function,potype_procedure]) then
  621. Internalerror(200006137);
  622. if not assigned(procdef._class) or
  623. (procdef.procoptions*[po_classmethod, po_staticmethod,
  624. po_methodpointer, po_interrupt, po_iocheck]<>[]) then
  625. Internalerror(200006138);
  626. if procdef.owner.symtabletype<>ObjectSymtable then
  627. Internalerror(200109191);
  628. make_global:=false;
  629. if (not current_module.is_unit) or
  630. create_smartlink or
  631. (procdef.owner.defowner.owner.symtabletype=globalsymtable) then
  632. make_global:=true;
  633. if make_global then
  634. List.concat(Tai_symbol.Createname_global(labelname,AT_FUNCTION,0))
  635. else
  636. List.concat(Tai_symbol.Createname(labelname,AT_FUNCTION,0));
  637. { set param1 interface to self }
  638. g_adjust_self_value(list,procdef,ioffset);
  639. { case 4 }
  640. if po_virtualmethod in procdef.procoptions then
  641. begin
  642. loadvmttor11;
  643. op_onr11methodaddr;
  644. end
  645. { case 0 }
  646. else
  647. case target_info.system of
  648. system_powerpc_darwin,
  649. system_powerpc64_darwin:
  650. list.concat(taicpu.op_sym(A_B,get_darwin_call_stub(procdef.mangledname)));
  651. system_powerpc64_linux:
  652. {$note ts:todo add GOT change?? - think not needed :) }
  653. list.concat(taicpu.op_sym(A_B,current_asmdata.RefAsmSymbol('.' + procdef.mangledname)));
  654. else
  655. list.concat(taicpu.op_sym(A_B,current_asmdata.RefAsmSymbol(procdef.mangledname)))
  656. end;
  657. List.concat(Tai_symbol_end.Createname(labelname));
  658. end;
  659. function tcgppcgen.load_got_symbol(list: TAsmList; symbol : string) : tregister;
  660. var
  661. l: tasmsymbol;
  662. ref: treference;
  663. begin
  664. if (target_info.system <> system_powerpc64_linux) then
  665. internalerror(2007102010);
  666. l:=current_asmdata.getasmsymbol(symbol);
  667. reference_reset_symbol(ref,l,0);
  668. ref.base := NR_R2;
  669. ref.refaddr := addr_pic;
  670. result := rg[R_INTREGISTER].getregister(list, R_SUBWHOLE);
  671. {$IFDEF EXTDEBUG}
  672. list.concat(tai_comment.create(strpnew('loading got reference for ' + symbol)));
  673. {$ENDIF EXTDEBUG}
  674. // cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  675. {$ifdef cpu64bit}
  676. list.concat(taicpu.op_reg_ref(A_LD, result, ref));
  677. {$else cpu64bit}
  678. list.concat(taicpu.op_reg_ref(A_LWZ, result, ref));
  679. {$endif cpu64bit}
  680. end;
  681. function tcgppcgen.fixref(list: TAsmList; var ref: treference): boolean;
  682. var
  683. tmpreg: tregister;
  684. begin
  685. result := false;
  686. { Avoid recursion. }
  687. if (ref.refaddr = addr_pic) then
  688. exit;
  689. {$IFDEF EXTDEBUG}
  690. list.concat(tai_comment.create(strpnew('fixref0 ' + ref2string(ref))));
  691. {$ENDIF EXTDEBUG}
  692. if (target_info.system in [system_powerpc_darwin,system_powerpc64_darwin]) and
  693. assigned(ref.symbol) and
  694. not assigned(ref.relsymbol) and
  695. ((ref.symbol.bind = AB_EXTERNAL) or
  696. (cs_create_pic in current_settings.moduleswitches))then
  697. begin
  698. if (ref.symbol.bind = AB_EXTERNAL) or
  699. ((cs_create_pic in current_settings.moduleswitches) and
  700. (ref.symbol.bind in [AB_COMMON,AB_GLOBAL])) then
  701. begin
  702. tmpreg := g_indirect_sym_load(list,ref.symbol.name);
  703. ref.symbol:=nil;
  704. end
  705. else
  706. begin
  707. include(current_procinfo.flags,pi_needs_got);
  708. tmpreg := current_procinfo.got;
  709. if assigned(ref.relsymbol) then
  710. internalerror(2007093501);
  711. ref.relsymbol := current_procinfo.CurrGOTLabel;
  712. end;
  713. if (ref.base = NR_NO) then
  714. ref.base := tmpreg
  715. else if (ref.index = NR_NO) then
  716. ref.index := tmpreg
  717. else
  718. begin
  719. list.concat(taicpu.op_reg_reg_reg(A_ADD,tmpreg,ref.base,tmpreg));
  720. ref.base := tmpreg;
  721. end;
  722. end;
  723. { if we have to create PIC, add the symbol to the TOC/GOT }
  724. if (target_info.system = system_powerpc64_linux) and
  725. (cs_create_pic in current_settings.moduleswitches) and
  726. (assigned(ref.symbol)) then
  727. begin
  728. tmpreg := load_got_symbol(list, ref.symbol.name);
  729. if (ref.base = NR_NO) then
  730. ref.base := tmpreg
  731. else if (ref.index = NR_NO) then
  732. ref.index := tmpreg
  733. else begin
  734. a_op_reg_reg_reg(list, OP_ADD, OS_ADDR, ref.base, tmpreg, tmpreg);
  735. ref.base := tmpreg;
  736. end;
  737. ref.symbol := nil;
  738. {$IFDEF EXTDEBUG}
  739. list.concat(tai_comment.create(strpnew('fixref-pic ' + ref2string(ref))));
  740. {$ENDIF EXTDEBUG}
  741. end;
  742. if (ref.base = NR_NO) then
  743. begin
  744. ref.base := ref.index;
  745. ref.index := NR_NO;
  746. end;
  747. if (ref.base <> NR_NO) then
  748. begin
  749. if (ref.index <> NR_NO) and
  750. ((ref.offset <> 0) or assigned(ref.symbol)) then
  751. begin
  752. result := true;
  753. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  754. list.concat(taicpu.op_reg_reg_reg(
  755. A_ADD,tmpreg,ref.base,ref.index));
  756. ref.index := NR_NO;
  757. ref.base := tmpreg;
  758. end
  759. end;
  760. if (ref.index <> NR_NO) and
  761. (assigned(ref.symbol) or
  762. (ref.offset <> 0)) then
  763. internalerror(200208102);
  764. {$IFDEF EXTDEBUG}
  765. list.concat(tai_comment.create(strpnew('fixref1 ' + ref2string(ref))));
  766. {$ENDIF EXTDEBUG}
  767. end;
  768. procedure tcgppcgen.a_load_store(list:TAsmList;op: tasmop;reg:tregister;
  769. ref: treference);
  770. var
  771. tmpreg: tregister;
  772. tmpref: treference;
  773. largeOffset: Boolean;
  774. begin
  775. tmpreg := NR_NO;
  776. largeOffset:= hasLargeOffset(ref);
  777. if target_info.system = system_powerpc_macos then
  778. begin
  779. if assigned(ref.symbol) then
  780. begin {Load symbol's value}
  781. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  782. reference_reset(tmpref);
  783. tmpref.symbol := ref.symbol;
  784. tmpref.base := NR_RTOC;
  785. if macos_direct_globals then
  786. list.concat(taicpu.op_reg_ref(A_LA,tmpreg,tmpref))
  787. else
  788. list.concat(taicpu.op_reg_ref(A_LWZ,tmpreg,tmpref));
  789. end;
  790. if largeOffset then
  791. begin {Add hi part of offset}
  792. reference_reset(tmpref);
  793. if Smallint(Lo(ref.offset)) < 0 then
  794. tmpref.offset := Hi(ref.offset) + 1 {Compensate when lo part is negative}
  795. else
  796. tmpref.offset := Hi(ref.offset);
  797. if (tmpreg <> NR_NO) then
  798. list.concat(taicpu.op_reg_reg_ref(A_ADDIS,tmpreg, tmpreg,tmpref))
  799. else
  800. begin
  801. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  802. list.concat(taicpu.op_reg_ref(A_LIS,tmpreg,tmpref));
  803. end;
  804. end;
  805. if (tmpreg <> NR_NO) then
  806. begin
  807. {Add content of base register}
  808. if ref.base <> NR_NO then
  809. list.concat(taicpu.op_reg_reg_reg(A_ADD,tmpreg,
  810. ref.base,tmpreg));
  811. {Make ref ready to be used by op}
  812. ref.symbol:= nil;
  813. ref.base:= tmpreg;
  814. if largeOffset then
  815. ref.offset := Smallint(Lo(ref.offset));
  816. list.concat(taicpu.op_reg_ref(op,reg,ref));
  817. //list.concat(tai_comment.create(strpnew('*** a_load_store indirect global')));
  818. end
  819. else
  820. list.concat(taicpu.op_reg_ref(op,reg,ref));
  821. end
  822. else {if target_info.system <> system_powerpc_macos}
  823. begin
  824. if assigned(ref.symbol) or
  825. largeOffset then
  826. begin
  827. tmpreg := rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  828. reference_reset(tmpref);
  829. tmpref.symbol := ref.symbol;
  830. tmpref.relsymbol := ref.relsymbol;
  831. tmpref.offset := ref.offset;
  832. tmpref.refaddr := addr_higha;
  833. if ref.base <> NR_NO then
  834. list.concat(taicpu.op_reg_reg_ref(A_ADDIS,tmpreg,
  835. ref.base,tmpref))
  836. else
  837. list.concat(taicpu.op_reg_ref(A_LIS,tmpreg,tmpref));
  838. ref.base := tmpreg;
  839. ref.refaddr := addr_low;
  840. list.concat(taicpu.op_reg_ref(op,reg,ref));
  841. end
  842. else
  843. list.concat(taicpu.op_reg_ref(op,reg,ref));
  844. end;
  845. end;
  846. end.