nx86inl.pas 12 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate x86 inline nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit nx86inl;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ninl,ncginl;
  22. type
  23. tx86inlinenode = class(tcginlinenode)
  24. { first pass override
  25. so that the code generator will actually generate
  26. these nodes.
  27. }
  28. function first_pi: tnode ; override;
  29. function first_arctan_real: tnode; override;
  30. function first_abs_real: tnode; override;
  31. function first_sqr_real: tnode; override;
  32. function first_sqrt_real: tnode; override;
  33. function first_ln_real: tnode; override;
  34. function first_cos_real: tnode; override;
  35. function first_sin_real: tnode; override;
  36. { second pass override to generate these nodes }
  37. procedure second_IncludeExclude;override;
  38. procedure second_pi; override;
  39. procedure second_arctan_real; override;
  40. procedure second_abs_real; override;
  41. procedure second_sqr_real; override;
  42. procedure second_sqrt_real; override;
  43. procedure second_ln_real; override;
  44. procedure second_cos_real; override;
  45. procedure second_sin_real; override;
  46. procedure second_prefetch;override;
  47. private
  48. procedure load_fpu_location;
  49. end;
  50. implementation
  51. uses
  52. systems,
  53. globals,
  54. cutils,verbose,
  55. defutil,
  56. aasmtai,aasmcpu,
  57. cgbase,pass_2,
  58. cpuinfo,cpubase,paramgr,
  59. symdef,symconst,
  60. nbas,ncon,ncal,ncnv,nld,ncgutil,
  61. cga,cgutils,cgx86,cgobj;
  62. {*****************************************************************************
  63. TX86INLINENODE
  64. *****************************************************************************}
  65. function tx86inlinenode.first_pi : tnode;
  66. begin
  67. expectloc:=LOC_FPUREGISTER;
  68. registersfpu:=1;
  69. first_pi := nil;
  70. end;
  71. function tx86inlinenode.first_arctan_real : tnode;
  72. begin
  73. expectloc:=LOC_FPUREGISTER;
  74. registersint:=left.registersint;
  75. registersfpu:=max(left.registersfpu,2);
  76. {$ifdef SUPPORT_MMX}
  77. registersmmx:=left.registersmmx;
  78. {$endif SUPPORT_MMX}
  79. first_arctan_real := nil;
  80. end;
  81. function tx86inlinenode.first_abs_real : tnode;
  82. begin
  83. expectloc:=LOC_FPUREGISTER;
  84. registersint:=left.registersint;
  85. registersfpu:=max(left.registersfpu,1);
  86. {$ifdef SUPPORT_MMX}
  87. registersmmx:=left.registersmmx;
  88. {$endif SUPPORT_MMX}
  89. first_abs_real := nil;
  90. end;
  91. function tx86inlinenode.first_sqr_real : tnode;
  92. begin
  93. expectloc:=LOC_FPUREGISTER;
  94. registersint:=left.registersint;
  95. registersfpu:=max(left.registersfpu,1);
  96. {$ifdef SUPPORT_MMX}
  97. registersmmx:=left.registersmmx;
  98. {$endif SUPPORT_MMX}
  99. first_sqr_real := nil;
  100. end;
  101. function tx86inlinenode.first_sqrt_real : tnode;
  102. begin
  103. expectloc:=LOC_FPUREGISTER;
  104. registersint:=left.registersint;
  105. registersfpu:=max(left.registersfpu,1);
  106. {$ifdef SUPPORT_MMX}
  107. registersmmx:=left.registersmmx;
  108. {$endif SUPPORT_MMX}
  109. first_sqrt_real := nil;
  110. end;
  111. function tx86inlinenode.first_ln_real : tnode;
  112. begin
  113. expectloc:=LOC_FPUREGISTER;
  114. registersint:=left.registersint;
  115. registersfpu:=max(left.registersfpu,2);
  116. {$ifdef SUPPORT_MMX}
  117. registersmmx:=left.registersmmx;
  118. {$endif SUPPORT_MMX}
  119. first_ln_real := nil;
  120. end;
  121. function tx86inlinenode.first_cos_real : tnode;
  122. begin
  123. expectloc:=LOC_FPUREGISTER;
  124. registersint:=left.registersint;
  125. registersfpu:=max(left.registersfpu,1);
  126. {$ifdef SUPPORT_MMX}
  127. registersmmx:=left.registersmmx;
  128. {$endif SUPPORT_MMX}
  129. first_cos_real := nil;
  130. end;
  131. function tx86inlinenode.first_sin_real : tnode;
  132. begin
  133. expectloc:=LOC_FPUREGISTER;
  134. registersint:=left.registersint;
  135. registersfpu:=max(left.registersfpu,1);
  136. {$ifdef SUPPORT_MMX}
  137. registersmmx:=left.registersmmx;
  138. {$endif SUPPORT_MMX}
  139. first_sin_real := nil;
  140. end;
  141. procedure tx86inlinenode.second_Pi;
  142. begin
  143. location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
  144. emit_none(A_FLDPI,S_NO);
  145. tcgx86(cg).inc_fpu_stack;
  146. location.register:=NR_FPU_RESULT_REG;
  147. end;
  148. { load the FPU into the an fpu register }
  149. procedure tx86inlinenode.load_fpu_location;
  150. begin
  151. location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
  152. location.register:=NR_FPU_RESULT_REG;
  153. secondpass(left);
  154. case left.location.loc of
  155. LOC_FPUREGISTER:
  156. ;
  157. LOC_CFPUREGISTER:
  158. begin
  159. cg.a_loadfpu_reg_reg(exprasmlist,left.location.size,
  160. left.location.register,location.register);
  161. end;
  162. LOC_REFERENCE,LOC_CREFERENCE:
  163. begin
  164. cg.a_loadfpu_ref_reg(exprasmlist,
  165. def_cgsize(left.resulttype.def),
  166. left.location.reference,location.register);
  167. end
  168. else
  169. internalerror(309991);
  170. end;
  171. end;
  172. procedure tx86inlinenode.second_arctan_real;
  173. begin
  174. load_fpu_location;
  175. emit_none(A_FLD1,S_NO);
  176. emit_none(A_FPATAN,S_NO);
  177. end;
  178. procedure tx86inlinenode.second_abs_real;
  179. begin
  180. load_fpu_location;
  181. emit_none(A_FABS,S_NO);
  182. end;
  183. procedure tx86inlinenode.second_sqr_real;
  184. begin
  185. if use_sse(resulttype.def) then
  186. begin
  187. secondpass(left);
  188. location_force_mmregscalar(exprasmlist,left.location,false);
  189. location:=left.location;
  190. cg.a_opmm_loc_reg(exprasmlist,OP_MUL,left.location.size,left.location,left.location.register,mms_movescalar);
  191. end
  192. else
  193. begin
  194. load_fpu_location;
  195. emit_reg_reg(A_FMUL,S_NO,NR_ST0,NR_ST0);
  196. end;
  197. end;
  198. procedure tx86inlinenode.second_sqrt_real;
  199. begin
  200. if use_sse(resulttype.def) then
  201. begin
  202. secondpass(left);
  203. location_force_mmregscalar(exprasmlist,left.location,false);
  204. location:=left.location;
  205. case tfloatdef(resulttype.def).typ of
  206. s32real:
  207. exprasmlist.concat(taicpu.op_reg_reg(A_SQRTSS,S_XMM,location.register,location.register));
  208. s64real:
  209. exprasmlist.concat(taicpu.op_reg_reg(A_SQRTSD,S_XMM,location.register,location.register));
  210. else
  211. internalerror(200510031);
  212. end;
  213. end
  214. else
  215. begin
  216. load_fpu_location;
  217. emit_none(A_FSQRT,S_NO);
  218. end;
  219. end;
  220. procedure tx86inlinenode.second_ln_real;
  221. begin
  222. load_fpu_location;
  223. emit_none(A_FLDLN2,S_NO);
  224. emit_none(A_FXCH,S_NO);
  225. emit_none(A_FYL2X,S_NO);
  226. end;
  227. procedure tx86inlinenode.second_cos_real;
  228. begin
  229. load_fpu_location;
  230. emit_none(A_FCOS,S_NO);
  231. end;
  232. procedure tx86inlinenode.second_sin_real;
  233. begin
  234. load_fpu_location;
  235. emit_none(A_FSIN,S_NO)
  236. end;
  237. procedure tx86inlinenode.second_prefetch;
  238. var
  239. ref : treference;
  240. r : tregister;
  241. begin
  242. {$ifdef i386}
  243. if aktspecificoptprocessor>=ClassPentium3 then
  244. {$endif i386}
  245. begin
  246. secondpass(left);
  247. case left.location.loc of
  248. LOC_CREFERENCE,
  249. LOC_REFERENCE:
  250. begin
  251. r:=cg.getintregister(exprasmlist,OS_ADDR);
  252. cg.a_loadaddr_ref_reg(exprasmlist,left.location.reference,r);
  253. reference_reset_base(ref,r,0);
  254. exprasmlist.concat(taicpu.op_ref(A_PREFETCHNTA,S_NO,ref));
  255. end;
  256. else
  257. internalerror(200402021);
  258. end;
  259. end;
  260. end;
  261. {*****************************************************************************
  262. INCLUDE/EXCLUDE GENERIC HANDLING
  263. *****************************************************************************}
  264. procedure tx86inlinenode.second_IncludeExclude;
  265. var
  266. hregister : tregister;
  267. asmop : tasmop;
  268. bitsperop,l : longint;
  269. cgop : topcg;
  270. opsize : tcgsize;
  271. begin
  272. opsize:=OS_32;
  273. bitsperop:=(8*tcgsize2size[opsize]);
  274. secondpass(tcallparanode(left).left);
  275. if tcallparanode(tcallparanode(left).right).left.nodetype=ordconstn then
  276. begin
  277. { calculate bit position }
  278. l:=1 shl (tordconstnode(tcallparanode(tcallparanode(left).right).left).value mod bitsperop);
  279. { determine operator }
  280. if inlinenumber=in_include_x_y then
  281. cgop:=OP_OR
  282. else
  283. begin
  284. cgop:=OP_AND;
  285. l:=not(l);
  286. end;
  287. case tcallparanode(left).left.location.loc of
  288. LOC_REFERENCE :
  289. begin
  290. inc(tcallparanode(left).left.location.reference.offset,
  291. (tordconstnode(tcallparanode(tcallparanode(left).right).left).value div bitsperop)*tcgsize2size[opsize]);
  292. cg.a_op_const_ref(exprasmlist,cgop,opsize,l,tcallparanode(left).left.location.reference);
  293. end;
  294. LOC_CREGISTER :
  295. cg.a_op_const_reg(exprasmlist,cgop,tcallparanode(left).left.location.size,l,tcallparanode(left).left.location.register);
  296. else
  297. internalerror(200405022);
  298. end;
  299. end
  300. else
  301. begin
  302. { generate code for the element to set }
  303. secondpass(tcallparanode(tcallparanode(left).right).left);
  304. { determine asm operator }
  305. if inlinenumber=in_include_x_y then
  306. asmop:=A_BTS
  307. else
  308. asmop:=A_BTR;
  309. if tcallparanode(tcallparanode(left).right).left.location.loc in [LOC_CREGISTER,LOC_REGISTER] then
  310. { we don't need a mod 32 because this is done automatically }
  311. { by the bts instruction. For proper checking we would }
  312. { note: bts doesn't do any mod'ing, that's why we can also use }
  313. { it for normalsets! (JM) }
  314. { need a cmp and jmp, but this should be done by the }
  315. { type cast code which does range checking if necessary (FK) }
  316. hregister:=cg.makeregsize(exprasmlist,Tcallparanode(Tcallparanode(left).right).left.location.register,opsize)
  317. else
  318. hregister:=cg.getintregister(exprasmlist,opsize);
  319. cg.a_load_loc_reg(exprasmlist,opsize,tcallparanode(tcallparanode(left).right).left.location,hregister);
  320. if (tcallparanode(left).left.location.loc=LOC_REFERENCE) then
  321. emit_reg_ref(asmop,tcgsize2opsize[opsize],hregister,tcallparanode(left).left.location.reference)
  322. else
  323. emit_reg_reg(asmop,tcgsize2opsize[opsize],hregister,tcallparanode(left).left.location.register);
  324. end;
  325. end;
  326. end.