aoptcpu.pas 44 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the ARM optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. { $define DEBUG_AOPTCPU}
  21. Interface
  22. uses cpubase,cgbase,aasmtai,aopt,AoptObj,aoptcpub;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. { outputs a debug message into the assembler file }
  26. procedure DebugMsg(const s: string; p: tai);
  27. Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
  28. function RegInInstruction(Reg: TRegister; p1: tai): Boolean; override;
  29. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  30. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  31. { uses the same constructor as TAopObj }
  32. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  33. procedure PeepHoleOptPass2;override;
  34. End;
  35. Implementation
  36. uses
  37. cutils,
  38. verbose,
  39. cpuinfo,
  40. aasmbase,aasmcpu,aasmdata,
  41. aoptutils,
  42. globals,globtype,
  43. cgutils;
  44. type
  45. TAsmOpSet = set of TAsmOp;
  46. function CanBeCond(p : tai) : boolean;
  47. begin
  48. result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
  49. end;
  50. function RefsEqual(const r1, r2: treference): boolean;
  51. begin
  52. refsequal :=
  53. (r1.offset = r2.offset) and
  54. (r1.base = r2.base) and
  55. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  56. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  57. (r1.relsymbol = r2.relsymbol) and
  58. (r1.addressmode = r2.addressmode);
  59. end;
  60. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
  61. begin
  62. result:=oper1.typ=oper2.typ;
  63. if result then
  64. case oper1.typ of
  65. top_const:
  66. Result:=oper1.val = oper2.val;
  67. top_reg:
  68. Result:=oper1.reg = oper2.reg;
  69. top_ref:
  70. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  71. else Result:=false;
  72. end
  73. end;
  74. function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
  75. begin
  76. result := (oper.typ = top_reg) and (oper.reg = reg);
  77. end;
  78. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  79. begin
  80. result :=
  81. (instr.typ = ait_instruction) and
  82. (taicpu(instr).opcode = op);
  83. end;
  84. function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
  85. begin
  86. result :=
  87. (instr.typ = ait_instruction) and
  88. (taicpu(instr).opcode in ops);
  89. end;
  90. function MatchInstruction(const instr: tai; const ops: TAsmOpSet;opcount : byte): boolean;
  91. begin
  92. result :=
  93. (instr.typ = ait_instruction) and
  94. (taicpu(instr).opcode in ops) and
  95. (taicpu(instr).ops=opcount);
  96. end;
  97. {$ifdef DEBUG_AOPTCPU}
  98. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  99. begin
  100. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  101. end;
  102. {$else DEBUG_AOPTCPU}
  103. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  104. begin
  105. end;
  106. {$endif DEBUG_AOPTCPU}
  107. function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
  108. begin
  109. If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
  110. ((getsupreg(reg)=RS_R0) or (getsupreg(reg)=RS_R1)) then
  111. Result:=true
  112. else if (p1.typ = ait_instruction) and (taicpu(p1).opcode=A_MOVW) and
  113. ((TRegister(ord(taicpu(p1).oper[0]^.reg)+1)=reg) or (TRegister(ord(taicpu(p1).oper[1]^.reg)+1)=reg) or
  114. (taicpu(p1).oper[0]^.reg=reg) or (taicpu(p1).oper[1]^.reg=reg)) then
  115. Result:=true
  116. else
  117. Result:=inherited RegInInstruction(Reg, p1);
  118. end;
  119. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  120. var Next: tai; reg: TRegister): Boolean;
  121. begin
  122. Next:=Current;
  123. repeat
  124. Result:=GetNextInstruction(Next,Next);
  125. until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  126. (is_calljmp(taicpu(Next).opcode));
  127. end;
  128. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  129. var
  130. p: taicpu;
  131. begin
  132. if not assigned(hp) or
  133. (hp.typ <> ait_instruction) then
  134. begin
  135. Result := false;
  136. exit;
  137. end;
  138. p := taicpu(hp);
  139. Result := ((p.opcode in [A_LDI,A_MOV,A_LDS]) and (reg=p.oper[0]^.reg) and ((p.oper[1]^.typ<>top_reg) or (reg<>p.oper[0]^.reg))) or
  140. ((p.opcode in [A_LD,A_LDD,A_LPM]) and (reg=p.oper[0]^.reg) and not(RegInRef(reg,p.oper[1]^.ref^))) or
  141. ((p.opcode in [A_MOVW]) and ((reg=p.oper[0]^.reg) or (TRegister(ord(reg)+1)=p.oper[0]^.reg)) and not(reg=p.oper[1]^.reg) and not(TRegister(ord(reg)+1)=p.oper[1]^.reg)) or
  142. ((p.opcode in [A_POP]) and (reg=p.oper[0]^.reg));
  143. end;
  144. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  145. var
  146. p: taicpu;
  147. i: longint;
  148. begin
  149. Result := false;
  150. if not (assigned(hp) and (hp.typ = ait_instruction)) then
  151. exit;
  152. p:=taicpu(hp);
  153. i:=0;
  154. { we do not care about the stack pointer }
  155. if p.opcode in [A_POP] then
  156. exit;
  157. { first operand only written?
  158. then skip it }
  159. if p.opcode in [A_MOV,A_LD,A_LDD,A_LDS,A_LPM,A_LDI,A_MOVW] then
  160. i:=1;
  161. while i<p.ops do
  162. begin
  163. case p.oper[i]^.typ of
  164. top_reg:
  165. Result := (p.oper[i]^.reg = reg) or
  166. { MOVW }
  167. ((i=1) and (p.opcode=A_MOVW) and (getsupreg(p.oper[0]^.reg)+1=getsupreg(reg)));
  168. top_ref:
  169. Result :=
  170. (p.oper[i]^.ref^.base = reg) or
  171. (p.oper[i]^.ref^.index = reg);
  172. end;
  173. { Bailout if we found something }
  174. if Result then
  175. exit;
  176. Inc(i);
  177. end;
  178. end;
  179. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  180. var
  181. hp1,hp2,hp3,hp4,hp5: tai;
  182. alloc, dealloc: tai_regalloc;
  183. i: integer;
  184. l: TAsmLabel;
  185. TmpUsedRegs : TAllUsedRegs;
  186. begin
  187. result := false;
  188. case p.typ of
  189. ait_instruction:
  190. begin
  191. {
  192. change
  193. <op> reg,x,y
  194. cp reg,r1
  195. into
  196. <op>s reg,x,y
  197. }
  198. { this optimization can applied only to the currently enabled operations because
  199. the other operations do not update all flags and FPC does not track flag usage }
  200. if MatchInstruction(p, [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_DEC,A_EOR,
  201. A_INC,A_LSL,A_LSR,
  202. A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and
  203. GetNextInstruction(p, hp1) and
  204. ((MatchInstruction(hp1, A_CP) and
  205. (((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
  206. (taicpu(hp1).oper[1]^.reg = NR_R1)) or
  207. ((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  208. (taicpu(hp1).oper[0]^.reg = NR_R1) and
  209. (taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR,
  210. A_LSL,A_LSR,
  211. A_OR,A_ORI,A_ROL,A_ROR,A_SUB,A_SBI])))) or
  212. (MatchInstruction(hp1, A_CPI) and
  213. (taicpu(p).opcode = A_ANDI) and
  214. (taicpu(p).oper[1]^.typ=top_const) and
  215. (taicpu(hp1).oper[1]^.typ=top_const) and
  216. (taicpu(p).oper[1]^.val=taicpu(hp1).oper[1]^.val))) and
  217. GetNextInstruction(hp1, hp2) and
  218. { be careful here, following instructions could use other flags
  219. however after a jump fpc never depends on the value of flags }
  220. { All above instructions set Z and N according to the following
  221. Z := result = 0;
  222. N := result[31];
  223. EQ = Z=1; NE = Z=0;
  224. MI = N=1; PL = N=0; }
  225. MatchInstruction(hp2, A_BRxx) and
  226. ((taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) or
  227. { sub/sbc set all flags }
  228. (taicpu(p).opcode in [A_SUB,A_SBI])){ and
  229. no flag allocation tracking implemented yet on avr
  230. assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
  231. begin
  232. { move flag allocation if possible }
  233. { no flag allocation tracking implemented yet on avr
  234. GetLastInstruction(hp1, hp2);
  235. hp2:=FindRegAlloc(NR_DEFAULTFLAGS,tai(hp2.Next));
  236. if assigned(hp2) then
  237. begin
  238. asml.Remove(hp2);
  239. asml.insertbefore(hp2, p);
  240. end;
  241. }
  242. // If we compare to the same value we are masking then invert the comparison
  243. if (taicpu(hp1).opcode=A_CPI) or
  244. { sub/sbc with reverted? }
  245. ((taicpu(hp1).oper[0]^.reg = NR_R1) and (taicpu(p).opcode in [A_SUB,A_SBI])) then
  246. taicpu(hp2).condition:=inverse_cond(taicpu(hp2).condition);
  247. asml.InsertBefore(tai_regalloc.alloc(NR_DEFAULTFLAGS,p), p);
  248. asml.InsertAfter(tai_regalloc.dealloc(NR_DEFAULTFLAGS,hp2), hp2);
  249. IncludeRegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs);
  250. DebugMsg('Peephole OpCp2Op performed', p);
  251. asml.remove(hp1);
  252. hp1.free;
  253. Result:=true;
  254. end
  255. else
  256. case taicpu(p).opcode of
  257. A_LDI:
  258. begin
  259. { turn
  260. ldi reg0, imm
  261. cp/mov reg1, reg0
  262. dealloc reg0
  263. into
  264. cpi/ldi reg1, imm
  265. }
  266. if MatchOpType(taicpu(p),top_reg,top_const) and
  267. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  268. MatchInstruction(hp1,[A_CP,A_MOV],2) and
  269. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  270. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  271. (getsupreg(taicpu(hp1).oper[0]^.reg) in [16..31]) and
  272. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  273. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) then
  274. begin
  275. CopyUsedRegs(TmpUsedRegs);
  276. if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg, hp1, TmpUsedRegs)) then
  277. begin
  278. case taicpu(hp1).opcode of
  279. A_CP:
  280. taicpu(hp1).opcode:=A_CPI;
  281. A_MOV:
  282. taicpu(hp1).opcode:=A_LDI;
  283. else
  284. internalerror(2016111901);
  285. end;
  286. taicpu(hp1).loadconst(1, taicpu(p).oper[1]^.val);
  287. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  288. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  289. if assigned(alloc) and assigned(dealloc) then
  290. begin
  291. asml.Remove(alloc);
  292. alloc.Free;
  293. asml.Remove(dealloc);
  294. dealloc.Free;
  295. end;
  296. DebugMsg('Peephole LdiMov/Cp2Ldi/Cpi performed', p);
  297. RemoveCurrentP(p);
  298. end;
  299. ReleaseUsedRegs(TmpUsedRegs);
  300. end;
  301. end;
  302. A_STS:
  303. if (taicpu(p).oper[0]^.ref^.symbol=nil) and
  304. (taicpu(p).oper[0]^.ref^.relsymbol=nil) and
  305. (getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
  306. (getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
  307. (taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
  308. (taicpu(p).oper[0]^.ref^.offset>=32) and
  309. (taicpu(p).oper[0]^.ref^.offset<=95) then
  310. begin
  311. DebugMsg('Peephole Sts2Out performed', p);
  312. taicpu(p).opcode:=A_OUT;
  313. taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
  314. end;
  315. A_LDS:
  316. if (taicpu(p).oper[1]^.ref^.symbol=nil) and
  317. (taicpu(p).oper[1]^.ref^.relsymbol=nil) and
  318. (getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
  319. (getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
  320. (taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
  321. (taicpu(p).oper[1]^.ref^.offset>=32) and
  322. (taicpu(p).oper[1]^.ref^.offset<=95) then
  323. begin
  324. DebugMsg('Peephole Lds2In performed', p);
  325. taicpu(p).opcode:=A_IN;
  326. taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
  327. end;
  328. A_IN:
  329. if GetNextInstruction(p,hp1) then
  330. begin
  331. {
  332. in rX,Y
  333. ori rX,n
  334. out Y,rX
  335. into
  336. sbi rX,lg(n)
  337. }
  338. if (taicpu(p).oper[1]^.val<=31) and
  339. MatchInstruction(hp1,A_ORI) and
  340. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  341. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  342. GetNextInstruction(hp1,hp2) and
  343. MatchInstruction(hp2,A_OUT) and
  344. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  345. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  346. begin
  347. DebugMsg('Peephole InOriOut2Sbi performed', p);
  348. taicpu(p).opcode:=A_SBI;
  349. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  350. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  351. asml.Remove(hp1);
  352. hp1.Free;
  353. asml.Remove(hp2);
  354. hp2.Free;
  355. result:=true;
  356. end
  357. {
  358. in rX,Y
  359. andi rX,not(n)
  360. out Y,rX
  361. into
  362. cbi rX,lg(n)
  363. }
  364. else if (taicpu(p).oper[1]^.val<=31) and
  365. MatchInstruction(hp1,A_ANDI) and
  366. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  367. (PopCnt(byte(not(taicpu(hp1).oper[1]^.val)))=1) and
  368. GetNextInstruction(hp1,hp2) and
  369. MatchInstruction(hp2,A_OUT) and
  370. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  371. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  372. begin
  373. DebugMsg('Peephole InAndiOut2Cbi performed', p);
  374. taicpu(p).opcode:=A_CBI;
  375. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  376. taicpu(p).loadconst(1,BsrByte(not(taicpu(hp1).oper[1]^.val)));
  377. asml.Remove(hp1);
  378. hp1.Free;
  379. asml.Remove(hp2);
  380. hp2.Free;
  381. result:=true;
  382. end
  383. {
  384. in rX,Y
  385. andi rX,n
  386. breq/brne L1
  387. into
  388. sbis/sbic Y,lg(n)
  389. jmp L1
  390. .Ltemp:
  391. }
  392. else if (taicpu(p).oper[1]^.val<=31) and
  393. MatchInstruction(hp1,A_ANDI) and
  394. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  395. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  396. GetNextInstruction(hp1,hp2) and
  397. MatchInstruction(hp2,A_BRxx) and
  398. (taicpu(hp2).condition in [C_EQ,C_NE]) then
  399. begin
  400. if taicpu(hp2).condition=C_EQ then
  401. taicpu(p).opcode:=A_SBIS
  402. else
  403. taicpu(p).opcode:=A_SBIC;
  404. DebugMsg('Peephole InAndiBrx2SbixJmp performed', p);
  405. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  406. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  407. asml.Remove(hp1);
  408. hp1.Free;
  409. taicpu(hp2).condition:=C_None;
  410. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  411. taicpu(hp2).opcode:=A_JMP
  412. else
  413. taicpu(hp2).opcode:=A_RJMP;
  414. current_asmdata.getjumplabel(l);
  415. l.increfs;
  416. asml.InsertAfter(tai_label.create(l), hp2);
  417. result:=true;
  418. end;
  419. end;
  420. A_ANDI:
  421. begin
  422. {
  423. Turn
  424. andi rx, #pow2
  425. brne l
  426. <op>
  427. l:
  428. Into
  429. sbrs rx, #(1 shl imm)
  430. <op>
  431. l:
  432. }
  433. if (taicpu(p).ops=2) and
  434. (taicpu(p).oper[1]^.typ=top_const) and
  435. ispowerof2(taicpu(p).oper[1]^.val,i) and
  436. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  437. GetNextInstruction(p,hp1) and
  438. (hp1.typ=ait_instruction) and
  439. (taicpu(hp1).opcode=A_BRxx) and
  440. (taicpu(hp1).condition in [C_EQ,C_NE]) and
  441. (taicpu(hp1).ops>0) and
  442. (taicpu(hp1).oper[0]^.typ = top_ref) and
  443. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  444. GetNextInstruction(hp1,hp2) and
  445. (hp2.typ=ait_instruction) and
  446. GetNextInstruction(hp2,hp3) and
  447. (hp3.typ=ait_label) and
  448. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  449. begin
  450. DebugMsg('Peephole AndiBr2Sbr performed', p);
  451. taicpu(p).oper[1]^.val:=i;
  452. if taicpu(hp1).condition=C_NE then
  453. taicpu(p).opcode:=A_SBRS
  454. else
  455. taicpu(p).opcode:=A_SBRC;
  456. asml.Remove(hp1);
  457. hp1.free;
  458. result:=true;
  459. end
  460. {
  461. Remove
  462. andi rx, #y
  463. dealloc rx
  464. }
  465. else if (taicpu(p).ops=2) and
  466. (taicpu(p).oper[0]^.typ=top_reg) and
  467. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  468. (assigned(FindRegDeAlloc(NR_DEFAULTFLAGS,tai(p.Next))) or
  469. (not RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs))) then
  470. begin
  471. DebugMsg('Redundant Andi removed', p);
  472. result:=RemoveCurrentP(p);
  473. end;
  474. end;
  475. A_ADD:
  476. begin
  477. if (taicpu(p).oper[1]^.reg=NR_R1) and
  478. GetNextInstruction(p, hp1) and
  479. MatchInstruction(hp1,A_ADC) then
  480. begin
  481. DebugMsg('Peephole AddAdc2Add performed', p);
  482. result:=RemoveCurrentP(p);
  483. end;
  484. end;
  485. A_SUB:
  486. begin
  487. if (taicpu(p).oper[1]^.reg=NR_R1) and
  488. GetNextInstruction(p, hp1) and
  489. MatchInstruction(hp1,A_SBC) then
  490. begin
  491. DebugMsg('Peephole SubSbc2Sub performed', p);
  492. taicpu(hp1).opcode:=A_SUB;
  493. result:=RemoveCurrentP(p);
  494. end;
  495. end;
  496. A_CLR:
  497. begin
  498. { turn the common
  499. clr rX
  500. mov/ld rX, rY
  501. into
  502. mov/ld rX, rY
  503. }
  504. if (taicpu(p).ops=1) and
  505. (taicpu(p).oper[0]^.typ=top_reg) and
  506. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  507. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  508. (hp1.typ=ait_instruction) and
  509. (taicpu(hp1).opcode in [A_MOV,A_LD]) and
  510. (taicpu(hp1).ops>0) and
  511. (taicpu(hp1).oper[0]^.typ=top_reg) and
  512. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  513. begin
  514. DebugMsg('Peephole ClrMov2Mov performed', p);
  515. result:=RemoveCurrentP(p);
  516. end
  517. { turn
  518. clr rX
  519. ...
  520. adc rY, rX
  521. into
  522. ...
  523. adc rY, r1
  524. }
  525. else if (taicpu(p).ops=1) and
  526. (taicpu(p).oper[0]^.typ=top_reg) and
  527. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  528. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  529. (hp1.typ=ait_instruction) and
  530. (taicpu(hp1).opcode in [A_ADC,A_SBC]) and
  531. (taicpu(hp1).ops=2) and
  532. (taicpu(hp1).oper[1]^.typ=top_reg) and
  533. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  534. (taicpu(hp1).oper[0]^.reg<>taicpu(p).oper[0]^.reg) and
  535. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  536. begin
  537. DebugMsg('Peephole ClrAdc2Adc performed', p);
  538. taicpu(hp1).oper[1]^.reg:=NR_R1;
  539. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  540. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  541. if assigned(alloc) and assigned(dealloc) then
  542. begin
  543. asml.Remove(alloc);
  544. alloc.Free;
  545. asml.Remove(dealloc);
  546. dealloc.Free;
  547. end;
  548. result:=RemoveCurrentP(p);
  549. end;
  550. end;
  551. A_PUSH:
  552. begin
  553. { turn
  554. push reg0
  555. push reg1
  556. pop reg3
  557. pop reg2
  558. into
  559. movw reg2,reg0
  560. or
  561. mov reg3,reg1
  562. mov reg2,reg0
  563. }
  564. if GetNextInstruction(p,hp1) and
  565. MatchInstruction(hp1,A_PUSH) and
  566. GetNextInstruction(hp1,hp2) and
  567. MatchInstruction(hp2,A_POP) and
  568. GetNextInstruction(hp2,hp3) and
  569. MatchInstruction(hp3,A_POP) then
  570. begin
  571. if (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  572. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  573. (getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
  574. ((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
  575. begin
  576. DebugMsg('Peephole PushPushPopPop2Movw performed', p);
  577. taicpu(hp3).ops:=2;
  578. taicpu(hp3).opcode:=A_MOVW;
  579. taicpu(hp3).loadreg(1, taicpu(p).oper[0]^.reg);
  580. RemoveCurrentP(p);
  581. RemoveCurrentP(p);
  582. result:=RemoveCurrentP(p);
  583. end
  584. else
  585. begin
  586. DebugMsg('Peephole PushPushPopPop2MovMov performed', p);
  587. taicpu(p).ops:=2;
  588. taicpu(p).opcode:=A_MOV;
  589. taicpu(hp1).ops:=2;
  590. taicpu(hp1).opcode:=A_MOV;
  591. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  592. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  593. taicpu(hp1).loadreg(1, taicpu(hp1).oper[0]^.reg);
  594. taicpu(hp1).loadreg(0, taicpu(hp2).oper[0]^.reg);
  595. { life range of reg2 and reg3 is increased, fix register allocation entries }
  596. CopyUsedRegs(TmpUsedRegs);
  597. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  598. AllocRegBetween(taicpu(hp2).oper[0]^.reg,hp1,hp2,TmpUsedRegs);
  599. ReleaseUsedRegs(TmpUsedRegs);
  600. CopyUsedRegs(TmpUsedRegs);
  601. AllocRegBetween(taicpu(hp3).oper[0]^.reg,p,hp3,TmpUsedRegs);
  602. ReleaseUsedRegs(TmpUsedRegs);
  603. IncludeRegInUsedRegs(taicpu(hp3).oper[0]^.reg,UsedRegs);
  604. UpdateUsedRegs(tai(p.Next));
  605. asml.Remove(hp2);
  606. hp2.Free;
  607. asml.Remove(hp3);
  608. hp3.Free;
  609. result:=true;
  610. end
  611. end;
  612. end;
  613. A_CALL:
  614. if (cs_opt_level4 in current_settings.optimizerswitches) and
  615. GetNextInstruction(p,hp1) and
  616. MatchInstruction(hp1,A_RET) then
  617. begin
  618. DebugMsg('Peephole CallReg2Jmp performed', p);
  619. taicpu(p).opcode:=A_JMP;
  620. asml.Remove(hp1);
  621. hp1.Free;
  622. result:=true;
  623. end;
  624. A_RCALL:
  625. if (cs_opt_level4 in current_settings.optimizerswitches) and
  626. GetNextInstruction(p,hp1) and
  627. MatchInstruction(hp1,A_RET) then
  628. begin
  629. DebugMsg('Peephole RCallReg2RJmp performed', p);
  630. taicpu(p).opcode:=A_RJMP;
  631. asml.Remove(hp1);
  632. hp1.Free;
  633. result:=true;
  634. end;
  635. A_MOV:
  636. begin
  637. { change
  638. mov reg0, reg1
  639. dealloc reg0
  640. into
  641. dealloc reg0
  642. }
  643. if MatchOpType(taicpu(p),top_reg,top_reg) then
  644. begin
  645. CopyUsedRegs(TmpUsedRegs);
  646. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  647. if not(RegInUsedRegs(taicpu(p).oper[0]^.reg,TmpUsedRegs)) and
  648. { reg. allocation information before calls is not perfect, so don't do this before
  649. calls/icalls }
  650. GetNextInstruction(p,hp1) and
  651. not(MatchInstruction(hp1,[A_CALL,A_RCALL])) then
  652. begin
  653. DebugMsg('Peephole Mov2Nop performed', p);
  654. result:=RemoveCurrentP(p);
  655. ReleaseUsedRegs(TmpUsedRegs);
  656. exit;
  657. end;
  658. ReleaseUsedRegs(TmpUsedRegs);
  659. end;
  660. { turn
  661. mov reg0, reg1
  662. <op> reg2,reg0
  663. dealloc reg0
  664. into
  665. <op> reg2,reg1
  666. }
  667. if MatchOpType(taicpu(p),top_reg,top_reg) and
  668. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  669. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
  670. (MatchInstruction(hp1,[A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_ADC,A_SBC,A_EOR,A_AND,A_OR,
  671. A_OUT,A_IN]) or
  672. { the reference register of ST/STD cannot be replaced }
  673. (MatchInstruction(hp1,[A_STD,A_ST]) and (MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^)))) and
  674. (not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and
  675. {(taicpu(hp1).ops=1) and
  676. (taicpu(hp1).oper[0]^.typ = top_reg) and
  677. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and }
  678. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  679. begin
  680. DebugMsg('Peephole MovOp2Op performed', p);
  681. for i := 0 to taicpu(hp1).ops-1 do
  682. if taicpu(hp1).oper[i]^.typ=top_reg then
  683. if taicpu(hp1).oper[i]^.reg=taicpu(p).oper[0]^.reg then
  684. taicpu(hp1).oper[i]^.reg:=taicpu(p).oper[1]^.reg;
  685. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  686. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  687. if assigned(alloc) and assigned(dealloc) then
  688. begin
  689. asml.Remove(alloc);
  690. alloc.Free;
  691. asml.Remove(dealloc);
  692. dealloc.Free;
  693. end;
  694. { life range of reg1 is increased }
  695. AllocRegBetween(taicpu(p).oper[1]^.reg,p,hp1,usedregs);
  696. { p will be removed, update used register as we continue
  697. with the next instruction after p }
  698. result:=RemoveCurrentP(p);
  699. end
  700. { remove
  701. mov reg0,reg0
  702. }
  703. else if (taicpu(p).ops=2) and
  704. (taicpu(p).oper[0]^.typ = top_reg) and
  705. (taicpu(p).oper[1]^.typ = top_reg) and
  706. (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
  707. begin
  708. DebugMsg('Peephole RedundantMov performed', p);
  709. result:=RemoveCurrentP(p);
  710. end
  711. {
  712. Turn
  713. mov rx,ry
  714. op rx,rz
  715. mov ry, rx
  716. Into
  717. op ry,rz
  718. }
  719. else if (taicpu(p).ops=2) and
  720. MatchOpType(taicpu(p),top_reg,top_reg) and
  721. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  722. (hp1.typ=ait_instruction) and
  723. (taicpu(hp1).ops >= 1) and
  724. (taicpu(hp1).oper[0]^.typ = top_reg) and
  725. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  726. MatchInstruction(hp2,A_MOV) and
  727. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  728. (taicpu(hp2).oper[0]^.reg = taicpu(p).oper[1]^.reg) and
  729. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  730. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  731. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp2)) and
  732. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_EOR,
  733. A_INC,A_DEC,
  734. A_LSL,A_LSR,A_ASR,A_ROR,A_ROL]) and
  735. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  736. begin
  737. DebugMsg('Peephole MovOpMov2Op performed', p);
  738. if (taicpu(hp1).ops=2) and
  739. (taicpu(hp1).oper[1]^.typ=top_reg) and
  740. (taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
  741. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  742. taicpu(hp1).oper[0]^.reg:=taicpu(p).oper[1]^.reg;
  743. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  744. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  745. if assigned(alloc) and assigned(dealloc) then
  746. begin
  747. asml.Remove(alloc);
  748. alloc.Free;
  749. asml.Remove(dealloc);
  750. dealloc.Free;
  751. end;
  752. asml.remove(hp2);
  753. hp2.free;
  754. result:=RemoveCurrentP(p);
  755. end
  756. {
  757. Turn
  758. mov rx,ry
  759. op rx,rw
  760. mov rw,rx
  761. Into
  762. op rw,ry
  763. }
  764. else if (taicpu(p).ops=2) and
  765. MatchOpType(taicpu(p),top_reg,top_reg) and
  766. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  767. (hp1.typ=ait_instruction) and
  768. (taicpu(hp1).ops = 2) and
  769. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  770. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  771. (hp2.typ=ait_instruction) and
  772. (taicpu(hp2).opcode=A_MOV) and
  773. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  774. (taicpu(hp2).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  775. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  776. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  777. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) and
  778. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_AND,A_OR,A_EOR]) and
  779. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  780. begin
  781. DebugMsg('Peephole MovOpMov2Op2 performed', p);
  782. taicpu(hp1).oper[0]^.reg:=taicpu(hp2).oper[0]^.reg;
  783. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  784. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  785. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  786. if assigned(alloc) and assigned(dealloc) then
  787. begin
  788. asml.Remove(alloc);
  789. alloc.Free;
  790. asml.Remove(dealloc);
  791. dealloc.Free;
  792. end;
  793. result:=RemoveCurrentP(p);
  794. asml.remove(hp2);
  795. hp2.free;
  796. end
  797. { fold
  798. mov reg2,reg0
  799. mov reg3,reg1
  800. to
  801. movw reg2,reg0
  802. }
  803. else if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
  804. (taicpu(p).ops=2) and
  805. (taicpu(p).oper[0]^.typ = top_reg) and
  806. (taicpu(p).oper[1]^.typ = top_reg) and
  807. getnextinstruction(p,hp1) and
  808. (hp1.typ = ait_instruction) and
  809. (taicpu(hp1).opcode = A_MOV) and
  810. (taicpu(hp1).ops=2) and
  811. (taicpu(hp1).oper[0]^.typ = top_reg) and
  812. (taicpu(hp1).oper[1]^.typ = top_reg) and
  813. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  814. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  815. ((getsupreg(taicpu(p).oper[1]^.reg) mod 2)=0) and
  816. (getsupreg(taicpu(hp1).oper[1]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)+1) then
  817. begin
  818. DebugMsg('Peephole MovMov2Movw performed', p);
  819. alloc:=FindRegAllocBackward(taicpu(hp1).oper[0]^.reg,tai(hp1.Previous));
  820. if assigned(alloc) then
  821. begin
  822. asml.Remove(alloc);
  823. asml.InsertBefore(alloc,p);
  824. { proper book keeping of currently used registers }
  825. IncludeRegInUsedRegs(taicpu(hp1).oper[0]^.reg,UsedRegs);
  826. end;
  827. taicpu(p).opcode:=A_MOVW;
  828. asml.remove(hp1);
  829. hp1.free;
  830. result:=true;
  831. end
  832. {
  833. This removes the first mov from
  834. mov rX,...
  835. mov rX,...
  836. }
  837. else if GetNextInstruction(p,hp1) and MatchInstruction(hp1,A_MOV) then
  838. while MatchInstruction(hp1,A_MOV) and
  839. MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
  840. { don't remove the first mov if the second is a mov rX,rX }
  841. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
  842. begin
  843. DebugMsg('Peephole MovMov2Mov performed', p);
  844. result:=RemoveCurrentP(p);
  845. GetNextInstruction(hp1,hp1);
  846. if not assigned(hp1) then
  847. break;
  848. end;
  849. end;
  850. A_SBIC,
  851. A_SBIS:
  852. begin
  853. {
  854. Turn
  855. sbic/sbis X, y
  856. jmp .L1
  857. op
  858. .L1:
  859. into
  860. sbis/sbic X,y
  861. op
  862. .L1:
  863. }
  864. if GetNextInstruction(p, hp1) and
  865. (hp1.typ=ait_instruction) and
  866. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  867. (taicpu(hp1).ops>0) and
  868. (taicpu(hp1).oper[0]^.typ = top_ref) and
  869. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  870. GetNextInstruction(hp1, hp2) and
  871. (hp2.typ=ait_instruction) and
  872. (not taicpu(hp2).is_jmp) and
  873. GetNextInstruction(hp2, hp3) and
  874. (hp3.typ=ait_label) and
  875. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  876. begin
  877. DebugMsg('Peephole SbiJmp2Sbi performed',p);
  878. if taicpu(p).opcode=A_SBIC then
  879. taicpu(p).opcode:=A_SBIS
  880. else
  881. taicpu(p).opcode:=A_SBIC;
  882. tai_label(hp3).labsym.decrefs;
  883. AsmL.remove(hp1);
  884. taicpu(hp1).Free;
  885. result:=true;
  886. end
  887. {
  888. Turn
  889. sbiX X, y
  890. jmp .L1
  891. jmp .L2
  892. .L1:
  893. op
  894. .L2:
  895. into
  896. sbiX X,y
  897. .L1:
  898. op
  899. .L2:
  900. }
  901. else if GetNextInstruction(p, hp1) and
  902. (hp1.typ=ait_instruction) and
  903. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  904. (taicpu(hp1).ops>0) and
  905. (taicpu(hp1).oper[0]^.typ = top_ref) and
  906. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  907. GetNextInstruction(hp1, hp2) and
  908. (hp2.typ=ait_instruction) and
  909. (taicpu(hp2).opcode in [A_JMP,A_RJMP]) and
  910. (taicpu(hp2).ops>0) and
  911. (taicpu(hp2).oper[0]^.typ = top_ref) and
  912. (taicpu(hp2).oper[0]^.ref^.symbol is TAsmLabel) and
  913. GetNextInstruction(hp2, hp3) and
  914. (hp3.typ=ait_label) and
  915. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) and
  916. GetNextInstruction(hp3, hp4) and
  917. (hp4.typ=ait_instruction) and
  918. GetNextInstruction(hp4, hp5) and
  919. (hp3.typ=ait_label) and
  920. (taicpu(hp2).oper[0]^.ref^.symbol=tai_label(hp5).labsym) then
  921. begin
  922. DebugMsg('Peephole SbiJmpJmp2Sbi performed',p);
  923. tai_label(hp3).labsym.decrefs;
  924. tai_label(hp5).labsym.decrefs;
  925. AsmL.remove(hp1);
  926. taicpu(hp1).Free;
  927. AsmL.remove(hp2);
  928. taicpu(hp2).Free;
  929. result:=true;
  930. end;
  931. end;
  932. end;
  933. end;
  934. end;
  935. end;
  936. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  937. begin
  938. end;
  939. begin
  940. casmoptimizer:=TCpuAsmOptimizer;
  941. End.