ncginl.pas 35 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl and Carl Eric Codere
  3. Generate generic inline nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncginl;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ninl;
  22. type
  23. tcginlinenode = class(tinlinenode)
  24. procedure pass_generate_code;override;
  25. procedure pass_generate_code_cpu;virtual;
  26. procedure second_sizeoftypeof;virtual;
  27. procedure second_length;virtual;
  28. procedure second_predsucc;virtual;
  29. procedure second_incdec;virtual;
  30. procedure second_AndOrXorShiftRot_assign;virtual;
  31. procedure second_NegNot_assign;virtual;
  32. procedure second_typeinfo;virtual;
  33. procedure second_includeexclude;virtual;
  34. procedure second_pi; virtual;
  35. procedure second_arctan_real; virtual;
  36. procedure second_abs_real; virtual;
  37. procedure second_sqr_real; virtual;
  38. procedure second_sqrt_real; virtual;
  39. procedure second_ln_real; virtual;
  40. procedure second_cos_real; virtual;
  41. procedure second_sin_real; virtual;
  42. procedure second_assigned; virtual;
  43. procedure second_get_frame;virtual;
  44. procedure second_get_caller_frame;virtual;
  45. procedure second_get_caller_addr;virtual;
  46. procedure second_prefetch; virtual;
  47. procedure second_round_real; virtual;
  48. procedure second_trunc_real; virtual;
  49. procedure second_int_real; virtual;
  50. procedure second_abs_long; virtual;
  51. procedure second_rox_sar; virtual;
  52. procedure second_bsfbsr; virtual;
  53. procedure second_new; virtual;
  54. procedure second_setlength; virtual; abstract;
  55. procedure second_box; virtual; abstract;
  56. procedure second_popcnt; virtual;
  57. procedure second_seg; virtual; abstract;
  58. procedure second_fma; virtual;
  59. procedure second_frac_real; virtual;
  60. end;
  61. implementation
  62. uses
  63. globtype,constexp,
  64. verbose,globals,compinnr,
  65. symconst,symtype,symdef,defutil,
  66. aasmbase,aasmdata,
  67. cgbase,pass_2,
  68. cpubase,procinfo,
  69. ncon,ncal,
  70. tgobj,ncgutil,
  71. cgutils,cgobj,hlcgobj
  72. {$ifndef cpu64bitalu}
  73. ,cg64f32
  74. {$endif not cpu64bitalu}
  75. ;
  76. {*****************************************************************************
  77. TCGINLINENODE
  78. *****************************************************************************}
  79. procedure tcginlinenode.pass_generate_code;
  80. begin
  81. location_reset(location,LOC_VOID,OS_NO);
  82. case inlinenumber of
  83. in_sizeof_x,
  84. in_typeof_x :
  85. second_SizeofTypeOf;
  86. in_length_x :
  87. second_Length;
  88. in_pred_x,
  89. in_succ_x:
  90. second_PredSucc;
  91. in_dec_x,
  92. in_inc_x :
  93. second_IncDec;
  94. in_typeinfo_x:
  95. second_TypeInfo;
  96. in_include_x_y,
  97. in_exclude_x_y:
  98. second_IncludeExclude;
  99. in_pi_real:
  100. second_pi;
  101. in_sin_real:
  102. second_sin_real;
  103. in_arctan_real:
  104. second_arctan_real;
  105. in_abs_real:
  106. second_abs_real;
  107. in_abs_long:
  108. second_abs_long;
  109. in_round_real:
  110. second_round_real;
  111. in_trunc_real:
  112. second_trunc_real;
  113. in_int_real:
  114. second_int_real;
  115. in_sqr_real:
  116. second_sqr_real;
  117. in_sqrt_real:
  118. second_sqrt_real;
  119. in_ln_real:
  120. second_ln_real;
  121. in_cos_real:
  122. second_cos_real;
  123. in_frac_real:
  124. second_frac_real;
  125. in_prefetch_var:
  126. second_prefetch;
  127. in_assigned_x:
  128. second_assigned;
  129. in_get_frame:
  130. second_get_frame;
  131. in_get_caller_frame:
  132. second_get_caller_frame;
  133. in_get_caller_addr:
  134. second_get_caller_addr;
  135. in_unaligned_x:
  136. begin
  137. secondpass(tcallparanode(left).left);
  138. location:=tcallparanode(left).left.location;
  139. if location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
  140. location.reference.alignment:=1;
  141. end;
  142. in_aligned_x:
  143. begin
  144. secondpass(tcallparanode(left).left);
  145. location:=tcallparanode(left).left.location;
  146. if location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
  147. location.reference.alignment:=resultdef.alignment;
  148. end;
  149. {$ifdef SUPPORT_MMX}
  150. in_mmx_pcmpeqb..in_mmx_pcmpgtw:
  151. begin
  152. location_reset(location,LOC_MMXREGISTER,OS_NO);
  153. if left.location.loc=LOC_REGISTER then
  154. begin
  155. {!!!!!!!}
  156. end
  157. else if tcallparanode(left).left.location.loc=LOC_REGISTER then
  158. begin
  159. {!!!!!!!}
  160. end
  161. else
  162. begin
  163. {!!!!!!!}
  164. end;
  165. end;
  166. {$endif SUPPORT_MMX}
  167. in_rol_x,
  168. in_rol_x_y,
  169. in_ror_x,
  170. in_ror_x_y,
  171. in_sar_x,
  172. in_sar_x_y:
  173. second_rox_sar;
  174. in_bsf_x,
  175. in_bsr_x:
  176. second_BsfBsr;
  177. in_new_x:
  178. second_new;
  179. in_setlength_x:
  180. second_setlength;
  181. in_box_x:
  182. second_box;
  183. in_popcnt_x:
  184. second_popcnt;
  185. in_seg_x:
  186. second_seg;
  187. in_fma_single,
  188. in_fma_double,
  189. in_fma_extended,
  190. in_fma_float128:
  191. second_fma;
  192. in_and_assign_x_y,
  193. in_or_assign_x_y,
  194. in_xor_assign_x_y,
  195. in_sar_assign_x_y,
  196. in_shl_assign_x_y,
  197. in_shr_assign_x_y,
  198. in_rol_assign_x_y,
  199. in_ror_assign_x_y:
  200. second_AndOrXorShiftRot_assign;
  201. in_neg_assign_x,
  202. in_not_assign_x:
  203. second_NegNot_assign;
  204. else
  205. pass_generate_code_cpu;
  206. end;
  207. end;
  208. procedure tcginlinenode.pass_generate_code_cpu;
  209. begin
  210. Internalerror(2017110103);
  211. end;
  212. {*****************************************************************************
  213. SIZEOF / TYPEOF GENERIC HANDLING
  214. *****************************************************************************}
  215. { second_handle_ the sizeof and typeof routines }
  216. procedure tcginlinenode.second_SizeOfTypeOf;
  217. begin
  218. { handled in pass 1 }
  219. internalerror(2015122701);
  220. end;
  221. {*****************************************************************************
  222. LENGTH GENERIC HANDLING
  223. *****************************************************************************}
  224. procedure tcginlinenode.second_Length;
  225. var
  226. lengthlab : tasmlabel;
  227. hregister : tregister;
  228. lendef : tdef;
  229. href : treference;
  230. begin
  231. secondpass(left);
  232. if is_shortstring(left.resultdef) then
  233. begin
  234. location_copy(location,left.location);
  235. location.size:=OS_8;
  236. end
  237. else
  238. begin
  239. { length in ansi/wide strings and high in dynamic arrays is at offset -sizeof(pint) }
  240. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  241. current_asmdata.getjumplabel(lengthlab);
  242. hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,left.resultdef,OC_EQ,0,left.location.register,lengthlab);
  243. { the length of a widestring is a 32 bit unsigned int. Since every
  244. character occupies 2 bytes, on a 32 bit platform you can express
  245. the maximum length using 31 bits. On a 64 bit platform, it may be
  246. 32 bits. This means that regardless of the platform, a location
  247. with size OS_SINT/ossinttype can hold the length without
  248. overflowing (this code returns an ossinttype value) }
  249. if is_widestring(left.resultdef) then
  250. lendef:=u32inttype
  251. else
  252. lendef:=ossinttype;
  253. { volatility of the ansistring/widestring refers to the volatility of the
  254. string pointer, not of the string data }
  255. hlcg.reference_reset_base(href,left.resultdef,left.location.register,-lendef.size,ctempposinvalid,lendef.alignment,[]);
  256. { if the string pointer is nil, the length is 0 -> reuse the register
  257. that originally held the string pointer for the length, so that we
  258. can keep the original nil/0 as length in that case }
  259. hregister:=cg.makeregsize(current_asmdata.CurrAsmList,left.location.register,def_cgsize(resultdef));
  260. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,lendef,resultdef,href,hregister);
  261. if is_widestring(left.resultdef) then
  262. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHR,resultdef,1,hregister);
  263. { Dynamic arrays do not have their length attached but their maximum index }
  264. if is_dynamic_array(left.resultdef) then
  265. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_ADD,resultdef,1,hregister);
  266. cg.a_label(current_asmdata.CurrAsmList,lengthlab);
  267. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  268. location.register:=hregister;
  269. end;
  270. end;
  271. {*****************************************************************************
  272. PRED/SUCC GENERIC HANDLING
  273. *****************************************************************************}
  274. procedure tcginlinenode.second_PredSucc;
  275. var
  276. cgop : topcg;
  277. begin
  278. secondpass(left);
  279. if inlinenumber=in_pred_x then
  280. cgop:=OP_SUB
  281. else
  282. cgop:=OP_ADD;
  283. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  284. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  285. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  286. {$ifndef cpu64bitalu}
  287. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  288. begin
  289. location.register64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  290. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  291. cg64.a_op64_const_reg_reg(current_asmdata.CurrAsmList,cgop,def_cgsize(resultdef),1,left.location.register64,location.register64);
  292. end
  293. else
  294. {$endif not cpu64bitalu}
  295. begin
  296. location.register:=hlcg.getregisterfordef(current_asmdata.CurrAsmList,resultdef);
  297. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,1,left.location.register,location.register);
  298. end;
  299. end;
  300. {*****************************************************************************
  301. INC/DEC GENERIC HANDLING
  302. *****************************************************************************}
  303. procedure tcginlinenode.second_IncDec;
  304. const
  305. addsubop:array[in_inc_x..in_dec_x] of TOpCG=(OP_ADD,OP_SUB);
  306. var
  307. addvalue : TConstExprInt;
  308. addconstant : boolean;
  309. {$ifndef cpu64bitalu}
  310. hregisterhi,
  311. {$endif not cpu64bitalu}
  312. hregister : tregister;
  313. begin
  314. { set defaults }
  315. addconstant:=true;
  316. hregister:=NR_NO;
  317. {$ifndef cpu64bitalu}
  318. hregisterhi:=NR_NO;
  319. {$endif not cpu64bitalu}
  320. { first secondpass second argument, because if the first arg }
  321. { is used in that expression then SSL may move it to another }
  322. { register }
  323. if assigned(tcallparanode(left).right) then
  324. secondpass(tcallparanode(tcallparanode(left).right).left);
  325. { load first parameter, must be a reference }
  326. secondpass(tcallparanode(left).left);
  327. { get addvalue }
  328. case tcallparanode(left).left.resultdef.typ of
  329. orddef,
  330. enumdef :
  331. addvalue:=1;
  332. pointerdef :
  333. begin
  334. if is_void(tpointerdef(tcallparanode(left).left.resultdef).pointeddef) then
  335. addvalue:=1
  336. else
  337. addvalue:=tpointerdef(tcallparanode(left).left.resultdef).pointeddef.size;
  338. end;
  339. else
  340. internalerror(10081);
  341. end;
  342. { second_ argument specified?, must be a s32bit in register }
  343. if assigned(tcallparanode(left).right) then
  344. begin
  345. { when constant, just multiply the addvalue }
  346. if is_constintnode(tcallparanode(tcallparanode(left).right).left) then
  347. addvalue:=addvalue*get_ordinal_value(tcallparanode(tcallparanode(left).right).left)
  348. else if is_constpointernode(tcallparanode(tcallparanode(left).right).left) then
  349. addvalue:=addvalue*tpointerconstnode(tcallparanode(tcallparanode(left).right).left).value
  350. else
  351. begin
  352. hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,tcallparanode(tcallparanode(left).right).left.resultdef,cgsize_orddef(def_cgsize(left.resultdef)),addvalue<=1);
  353. hregister:=tcallparanode(tcallparanode(left).right).left.location.register;
  354. {$ifndef cpu64bitalu}
  355. hregisterhi:=tcallparanode(tcallparanode(left).right).left.location.register64.reghi;
  356. {$endif not cpu64bitalu}
  357. { insert multiply with addvalue if its >1 }
  358. if addvalue>1 then
  359. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,left.resultdef,addvalue.svalue,hregister);
  360. addconstant:=false;
  361. end;
  362. end;
  363. { write the add instruction }
  364. if addconstant then
  365. begin
  366. {$ifndef cpu64bitalu}
  367. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  368. cg64.a_op64_const_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],def_cgsize(left.resultdef),addvalue,tcallparanode(left).left.location)
  369. else
  370. {$endif not cpu64bitalu}
  371. hlcg.a_op_const_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],left.resultdef,
  372. {$ifdef cpu64bitalu}
  373. aint(addvalue.svalue),
  374. {$else cpu64bitalu}
  375. longint(addvalue.svalue), // can't use aint, because it breaks 16-bit and 8-bit CPUs
  376. {$endif cpu64bitalu}
  377. tcallparanode(left).left.location);
  378. end
  379. else
  380. begin
  381. {$ifndef cpu64bitalu}
  382. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  383. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],def_cgsize(left.resultdef),
  384. joinreg64(hregister,hregisterhi),tcallparanode(left).left.location)
  385. else
  386. {$endif not cpu64bitalu}
  387. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,addsubop[inlinenumber],left.resultdef,
  388. hregister,tcallparanode(left).left.location);
  389. end;
  390. { no overflow checking for pointers (see ninl), and range checking }
  391. { is not applicable for them }
  392. if (tcallparanode(left).left.resultdef.typ <> pointerdef) then
  393. begin
  394. { things which can overflow must NOT pass via here, but have to be }
  395. { handled via a regular add node (conversion in tinlinenode.pass_1) }
  396. { Or someone has to rewrite the above to use a_op_const_reg_reg_ov }
  397. { and friends in case of overflow checking, and ask everyone to }
  398. { implement these methods since they don't exist for all cpus (JM) }
  399. { Similarly, range checking also has to be handled separately, }
  400. { see mantis #14841 (JM) }
  401. if ([cs_check_overflow,cs_check_range] * current_settings.localswitches <> []) then
  402. internalerror(2006111010);
  403. // cg.g_overflowcheck(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).resultdef);
  404. // cg.g_rangecheck(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).left.resultdef,
  405. // tcallparanode(left).left.resultdef);
  406. end;
  407. end;
  408. {*****************************************************************************
  409. AND/OR/XOR/SHIFT/ROTATE ASSIGN GENERIC HANDLING
  410. *****************************************************************************}
  411. procedure tcginlinenode.second_AndOrXorShiftRot_assign;
  412. const
  413. andorxorop:array[in_and_assign_x_y..in_ror_assign_x_y] of TOpCG=
  414. (OP_AND,OP_OR,OP_XOR,OP_SAR,OP_SHL,OP_SHR,OP_ROL,OP_ROR);
  415. var
  416. maskvalue : TConstExprInt;
  417. maskconstant : boolean;
  418. {$ifndef cpu64bitalu}
  419. hregisterhi,
  420. {$endif not cpu64bitalu}
  421. hregister : tregister;
  422. begin
  423. { set defaults }
  424. maskconstant:=true;
  425. hregister:=NR_NO;
  426. maskvalue:=0;
  427. {$ifndef cpu64bitalu}
  428. hregisterhi:=NR_NO;
  429. {$endif not cpu64bitalu}
  430. { first secondpass first argument, because if the second arg }
  431. { is used in that expression then SSL may move it to another }
  432. { register }
  433. secondpass(tcallparanode(left).left);
  434. { load second parameter, must be a reference }
  435. secondpass(tcallparanode(tcallparanode(left).right).left);
  436. { when constant, just get the maskvalue }
  437. if is_constintnode(tcallparanode(left).left) then
  438. maskvalue:=get_ordinal_value(tcallparanode(left).left)
  439. else
  440. begin
  441. { for shift/rotate the shift count can be of different size than the shifted variable }
  442. if inlinenumber in [in_sar_assign_x_y,in_shl_assign_x_y,in_shr_assign_x_y,in_rol_assign_x_y,in_ror_assign_x_y] then
  443. hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).left.resultdef,tcallparanode(left).left.resultdef,true)
  444. else
  445. hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(left).left.location,tcallparanode(left).left.resultdef,tcallparanode(left).right.resultdef,true);
  446. hregister:=tcallparanode(left).left.location.register;
  447. {$ifndef cpu64bitalu}
  448. hregisterhi:=tcallparanode(left).left.location.register64.reghi;
  449. {$endif not cpu64bitalu}
  450. maskconstant:=false;
  451. end;
  452. { write the and/or/xor/sar/shl/shr/rol/ror instruction }
  453. if maskconstant then
  454. begin
  455. if inlinenumber in [in_sar_assign_x_y,in_shl_assign_x_y,in_shr_assign_x_y,in_rol_assign_x_y,in_ror_assign_x_y] then
  456. if def_cgsize(tcallparanode(left).right.resultdef) in [OS_64,OS_S64] then
  457. maskvalue:=maskvalue and 63
  458. else
  459. maskvalue:=maskvalue and 31;
  460. {$ifndef cpu64bitalu}
  461. if def_cgsize(tcallparanode(left).right.resultdef) in [OS_64,OS_S64] then
  462. cg64.a_op64_const_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],def_cgsize(tcallparanode(left).right.resultdef),maskvalue.svalue,tcallparanode(tcallparanode(left).right).left.location)
  463. else
  464. {$endif not cpu64bitalu}
  465. hlcg.a_op_const_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],tcallparanode(left).right.resultdef,
  466. {$ifdef cpu64bitalu}
  467. aint(maskvalue.svalue),
  468. {$else cpu64bitalu}
  469. longint(maskvalue.svalue), // can't use aint, because it breaks 16-bit and 8-bit CPUs
  470. {$endif cpu64bitalu}
  471. tcallparanode(tcallparanode(left).right).left.location);
  472. end
  473. else
  474. begin
  475. {$ifndef cpu64bitalu}
  476. if def_cgsize(tcallparanode(left).right.resultdef) in [OS_64,OS_S64] then
  477. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],def_cgsize(tcallparanode(left).right.resultdef),
  478. joinreg64(hregister,hregisterhi),tcallparanode(tcallparanode(left).right).left.location)
  479. else
  480. {$endif not cpu64bitalu}
  481. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,andorxorop[inlinenumber],tcallparanode(left).right.resultdef,
  482. hregister,tcallparanode(tcallparanode(left).right).left.location);
  483. end;
  484. end;
  485. {*****************************************************************************
  486. NEG/NOT ASSIGN GENERIC HANDLING
  487. *****************************************************************************}
  488. procedure tcginlinenode.second_NegNot_assign;
  489. const
  490. negnotop:array[in_neg_assign_x..in_not_assign_x] of TOpCG=(OP_NEG,OP_NOT);
  491. {$ifndef cpu64bitalu}
  492. var
  493. NR_NO64: tregister64=(reglo:NR_NO;reghi:NR_NO);
  494. {$endif not cpu64bitalu}
  495. begin
  496. { load parameter, must be a reference }
  497. secondpass(left);
  498. location_reset(location,LOC_VOID,OS_NO);
  499. if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  500. begin
  501. {$ifndef cpu64bitalu}
  502. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  503. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],def_cgsize(left.resultdef),left.location.register64,left.location)
  504. else
  505. {$endif not cpu64bitalu}
  506. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],left.resultdef,left.location.register,left.location);
  507. end
  508. else if left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  509. begin
  510. {$ifndef cpu64bitalu}
  511. if def_cgsize(left.resultdef) in [OS_64,OS_S64] then
  512. cg64.a_op64_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],def_cgsize(left.resultdef),NR_NO64,left.location)
  513. else
  514. {$endif not cpu64bitalu}
  515. hlcg.a_op_reg_loc(current_asmdata.CurrAsmList,negnotop[inlinenumber],left.resultdef,NR_NO,left.location);
  516. end
  517. else
  518. internalerror(2017040701);
  519. end;
  520. {*****************************************************************************
  521. TYPEINFO GENERIC HANDLING
  522. *****************************************************************************}
  523. procedure tcginlinenode.second_typeinfo;
  524. begin
  525. internalerror(2013060301);
  526. end;
  527. {*****************************************************************************
  528. INCLUDE/EXCLUDE GENERIC HANDLING
  529. *****************************************************************************}
  530. procedure tcginlinenode.second_IncludeExclude;
  531. var
  532. setpara, elepara: tnode;
  533. begin
  534. { the set }
  535. secondpass(tcallparanode(left).left);
  536. { the element to set }
  537. secondpass(tcallparanode(tcallparanode(left).right).left);
  538. setpara:=tcallparanode(left).left;
  539. elepara:=tcallparanode(tcallparanode(left).right).left;
  540. if elepara.location.loc=LOC_CONSTANT then
  541. begin
  542. hlcg.a_bit_set_const_loc(current_asmdata.CurrAsmList,(inlinenumber=in_include_x_y),
  543. setpara.resultdef,elepara.location.value-tsetdef(setpara.resultdef).setbase,setpara.location);
  544. end
  545. else
  546. begin
  547. hlcg.location_force_reg(current_asmdata.CurrAsmList,elepara.location,elepara.resultdef,u32inttype,true);
  548. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,u32inttype,elepara.location,tsetdef(setpara.resultdef).setbase);
  549. hlcg.a_bit_set_reg_loc(current_asmdata.CurrAsmList,(inlinenumber=in_include_x_y),
  550. u32inttype,setpara.resultdef,elepara.location.register,setpara.location);
  551. end;
  552. end;
  553. {*****************************************************************************
  554. FLOAT GENERIC HANDLING
  555. *****************************************************************************}
  556. {
  557. These routines all call internal RTL routines, so if they are
  558. called here, they give an internal error
  559. }
  560. procedure tcginlinenode.second_pi;
  561. begin
  562. internalerror(20020718);
  563. end;
  564. procedure tcginlinenode.second_arctan_real;
  565. begin
  566. internalerror(20020718);
  567. end;
  568. procedure tcginlinenode.second_abs_real;
  569. begin
  570. internalerror(20020718);
  571. end;
  572. procedure tcginlinenode.second_round_real;
  573. begin
  574. internalerror(20020718);
  575. end;
  576. procedure tcginlinenode.second_trunc_real;
  577. begin
  578. internalerror(20020718);
  579. end;
  580. procedure tcginlinenode.second_int_real;
  581. begin
  582. internalerror(2016112702);
  583. end;
  584. procedure tcginlinenode.second_sqr_real;
  585. begin
  586. internalerror(20020718);
  587. end;
  588. procedure tcginlinenode.second_sqrt_real;
  589. begin
  590. internalerror(20020718);
  591. end;
  592. procedure tcginlinenode.second_ln_real;
  593. begin
  594. internalerror(20020718);
  595. end;
  596. procedure tcginlinenode.second_cos_real;
  597. begin
  598. internalerror(20020718);
  599. end;
  600. procedure tcginlinenode.second_sin_real;
  601. begin
  602. internalerror(20020718);
  603. end;
  604. procedure tcginlinenode.second_prefetch;
  605. begin
  606. end;
  607. procedure tcginlinenode.second_frac_real;
  608. begin
  609. internalerror(2017052104);
  610. end;
  611. procedure tcginlinenode.second_abs_long;
  612. var
  613. tempreg1, tempreg2: tregister;
  614. begin
  615. secondpass(left);
  616. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  617. location:=left.location;
  618. location.register:=hlcg.getintregister(current_asmdata.CurrAsmList,left.resultdef);
  619. tempreg1:=hlcg.getintregister(current_asmdata.CurrAsmList,left.resultdef);
  620. tempreg2:=hlcg.getintregister(current_asmdata.CurrAsmList,left.resultdef);
  621. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SAR,left.resultdef,left.resultdef.size*8-1,left.location.register,tempreg1);
  622. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_XOR,left.resultdef,left.location.register,tempreg1,tempreg2);
  623. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmlist,OP_SUB,left.resultdef,tempreg1,tempreg2,location.register);
  624. end;
  625. {*****************************************************************************
  626. ASSIGNED GENERIC HANDLING
  627. *****************************************************************************}
  628. procedure tcginlinenode.second_assigned;
  629. begin
  630. internalerror(2013091602);
  631. end;
  632. procedure Tcginlinenode.second_get_frame;
  633. begin
  634. {$if defined(x86) or defined(arm)}
  635. if current_procinfo.framepointer=NR_STACK_POINTER_REG then
  636. begin
  637. location_reset(location,LOC_CONSTANT,OS_ADDR);
  638. location.value:=0;
  639. end
  640. else
  641. {$endif defined(x86) or defined(arm)}
  642. begin
  643. location_reset(location,LOC_CREGISTER,OS_ADDR);
  644. location.register:=current_procinfo.framepointer;
  645. end;
  646. end;
  647. procedure Tcginlinenode.second_get_caller_frame;
  648. var
  649. frame_reg:Tregister;
  650. use_frame_pointer:boolean;
  651. begin
  652. frame_reg:=NR_NO;
  653. if left<>nil then
  654. begin
  655. secondpass(left);
  656. if left.location.loc=LOC_CONSTANT then
  657. use_frame_pointer:=true
  658. else
  659. begin
  660. hlcg.location_force_reg(current_asmdata.currasmlist,left.location,left.resultdef,voidpointertype,false);
  661. frame_reg:=left.location.register;
  662. use_frame_pointer:=false;
  663. end
  664. end
  665. else
  666. begin
  667. use_frame_pointer:=current_procinfo.framepointer=NR_STACK_POINTER_REG;
  668. frame_reg:=current_procinfo.framepointer;
  669. end;
  670. if use_frame_pointer then
  671. begin
  672. location_reset(location,LOC_CREGISTER,OS_ADDR);
  673. location.register:=NR_FRAME_POINTER_REG;
  674. end
  675. else
  676. begin
  677. location_reset_ref(location,LOC_REFERENCE,OS_ADDR,sizeof(pint),[]);
  678. location.reference.base:=frame_reg;
  679. end;
  680. end;
  681. procedure Tcginlinenode.second_get_caller_addr;
  682. var
  683. frame_ref:Treference;
  684. begin
  685. if current_procinfo.framepointer=NR_STACK_POINTER_REG then
  686. begin
  687. location_reset(location,LOC_REGISTER,OS_ADDR);
  688. location.register:=cg.getaddressregister(current_asmdata.currasmlist);
  689. reference_reset_base(frame_ref,NR_STACK_POINTER_REG,{current_procinfo.calc_stackframe_size}tg.lasttemp,ctempposinvalid,sizeof(pint),[]);
  690. cg.a_load_ref_reg(current_asmdata.currasmlist,OS_ADDR,OS_ADDR,frame_ref,location.register);
  691. end
  692. else
  693. begin
  694. location_reset(location,LOC_REGISTER,OS_ADDR);
  695. location.register:=cg.getaddressregister(current_asmdata.currasmlist);
  696. reference_reset_base(frame_ref,current_procinfo.framepointer,sizeof(pint),ctempposinvalid,sizeof(pint),[]);
  697. cg.a_load_ref_reg(current_asmdata.currasmlist,OS_ADDR,OS_ADDR,frame_ref,location.register);
  698. end;
  699. end;
  700. procedure tcginlinenode.second_rox_sar;
  701. var
  702. op : topcg;
  703. op1,op2 : tnode;
  704. begin
  705. { one or two parameters? }
  706. if (left.nodetype=callparan) and
  707. assigned(tcallparanode(left).right) then
  708. begin
  709. op1:=tcallparanode(tcallparanode(left).right).left;
  710. op2:=tcallparanode(left).left;
  711. secondpass(op2);
  712. end
  713. else
  714. begin
  715. op1:=left;
  716. op2:=nil;
  717. end;
  718. secondpass(op1);
  719. case inlinenumber of
  720. in_ror_x,
  721. in_ror_x_y:
  722. op:=OP_ROR;
  723. in_rol_x,
  724. in_rol_x_y:
  725. op:=OP_ROL;
  726. in_sar_x,
  727. in_sar_x_y:
  728. op:=OP_SAR;
  729. else
  730. internalerror(2013120110);
  731. end;
  732. hlcg.location_force_reg(current_asmdata.CurrAsmList,op1.location,op1.resultdef,resultdef,true);
  733. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  734. {$ifndef cpu64bitalu}
  735. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  736. begin
  737. location.register64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  738. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  739. end
  740. else
  741. {$endif not cpu64bitalu}
  742. location.register:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  743. if assigned(op2) then
  744. begin
  745. { rotating by a constant directly coded: }
  746. if op2.nodetype=ordconstn then
  747. {$ifndef cpu64bitalu}
  748. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  749. cg64.a_op64_const_reg_reg(current_asmdata.CurrAsmList,op,def_cgsize(resultdef),
  750. tordconstnode(op2).value.uvalue and (resultdef.size*8-1),
  751. op1.location.register64, location.register64)
  752. else
  753. {$endif not cpu64bitalu}
  754. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,resultdef,
  755. tordconstnode(op2).value.uvalue and (resultdef.size*8-1),
  756. op1.location.register, location.register)
  757. else
  758. begin
  759. {$ifndef cpu64bitalu}
  760. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  761. begin
  762. hlcg.location_force_reg(current_asmdata.CurrAsmList,op2.location,
  763. op2.resultdef,alusinttype,true);
  764. cg64.a_op64_reg_reg_reg(current_asmdata.CurrAsmList,op,def_cgsize(resultdef),
  765. joinreg64(op2.location.register,NR_NO),op1.location.register64,
  766. location.register64);
  767. end
  768. else
  769. {$endif not cpu64bitalu}
  770. begin
  771. hlcg.location_force_reg(current_asmdata.CurrAsmList,op2.location,
  772. op2.resultdef,resultdef,true);
  773. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,resultdef,
  774. op2.location.register,op1.location.register,
  775. location.register);
  776. end;
  777. end;
  778. end
  779. else
  780. {$ifndef cpu64bitalu}
  781. if def_cgsize(resultdef) in [OS_64,OS_S64] then
  782. cg64.a_op64_const_reg_reg(current_asmdata.CurrAsmList,op,def_cgsize(resultdef),1,
  783. op1.location.register64,location.register64)
  784. else
  785. {$endif not cpu64bitalu}
  786. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,resultdef,1,
  787. op1.location.register,location.register);
  788. end;
  789. procedure tcginlinenode.second_BsfBsr;
  790. var
  791. reverse: boolean;
  792. opsize: tcgsize;
  793. begin
  794. reverse:=(inlinenumber = in_bsr_x);
  795. secondpass(left);
  796. opsize:=tcgsize2unsigned[left.location.size];
  797. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  798. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,cgsize_orddef(opsize),true);
  799. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  800. location.register:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  801. cg.a_bit_scan_reg_reg(current_asmdata.CurrAsmList,reverse,opsize,location.size,left.location.register,location.register);
  802. end;
  803. procedure tcginlinenode.second_new;
  804. begin
  805. internalerror(2011012202);
  806. end;
  807. procedure tcginlinenode.second_popcnt;
  808. begin
  809. internalerror(2012082601);
  810. end;
  811. procedure tcginlinenode.second_fma;
  812. begin
  813. internalerror(2014032701);
  814. end;
  815. begin
  816. cinlinenode:=tcginlinenode;
  817. end. s