Added FPv4_d16 FPU instructions, and a few extra registers

git-svn-id: branches/laksen/arm-embedded@22596 -

compiler/arm/armatt.inc

@@ -296,6 +296,35 @@
 'itttt',
 'tbb',
 'tbh',
+'movw',
 'cbz',
-'cbnz'
+'cbnz',
+'vabs',
+'vadd',
+'vcmp',
+'vcmpe',
+'vcvt',
+'vdiv',
+'vldm',
+'vldr',
+'vmov',
+'vmrs',
+'vmsr',
+'vmul',
+'vmla',
+'vmls',
+'vnmla',
+'vnmls',
+'vfma',
+'vfms',
+'vfnma',
+'vfnms',
+'vneg',
+'vnmul',
+'vpop',
+'vpush',
+'vsqrt',
+'vstm',
+'vstr',
+'vsub'
 );

compiler/arm/armatts.inc

@@ -297,5 +297,34 @@ attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
 attsufNONE
 );

compiler/arm/armins.dat

@@ -753,5 +753,37 @@ reg32,reg32,reg32,reg32  \x16\x00\x80\x90		 ARM7
 [TBB]
 [TBH]
 
+[MOVW]
+
 [CBZ]
-[CBNZ]
+[CBNZ]
+
+; FPv4-s16 - ARMv7M floating point
+[VABS]
+[VADD]
+[VCMP]
+[VCMPE]
+[VCVT]
+[VDIV]
+[VLDM]
+[VLDR]
+[VMOV]
+[VMRS]
+[VMSR]
+[VMUL]
+[VMLA]
+[VMLS]
+[VNMLA]
+[VNMLS]
+[VFMA]
+[VFMS]
+[VFNMA]
+[VFNMS]
+[VNEG]
+[VNMUL]
+[VPOP]
+[VPUSH]
+[VSQRT]
+[VSTM]
+[VSTR]
+[VSUB]

compiler/arm/armop.inc

@@ -296,6 +296,35 @@ A_ITETT,
 A_ITTTT,
 A_TBB,
 A_TBH,
+A_MOVW,
 A_CBZ,
-A_CBNZ
+A_CBNZ,
+A_VABS,
+A_VADD,
+A_VCMP,
+A_VCMPE,
+A_VCVT,
+A_VDIV,
+A_VLDM,
+A_VLDR,
+A_VMOV,
+A_VMRS,
+A_VMSR,
+A_VMUL,
+A_VMLA,
+A_VMLS,
+A_VNMLA,
+A_VNMLS,
+A_VFMA,
+A_VFMS,
+A_VFNMA,
+A_VFNMS,
+A_VNEG,
+A_VNMUL,
+A_VPOP,
+A_VPUSH,
+A_VSQRT,
+A_VSTM,
+A_VSTR,
+A_VSUB
 );

compiler/arm/armreg.dat

@@ -109,4 +109,5 @@ D31,$04,$07,$1F,d31,0,0
 ; special registers
 CPSR,$05,$00,$00,cpsr,0,0
 FPSCR,$05,$00,$01,fpscr,0,0
-SPSR,$05,$00,$02,spsr,0,0
+SPSR,$05,$00,$02,spsr,0,0
+APSR_nzcv,$05,$00,$03,apsr_nzcv,0,0

compiler/arm/rarmcon.inc

@@ -91,3 +91,4 @@ NR_D31 = tregister($0407001F);
 NR_CPSR = tregister($05000000);
 NR_FPSCR = tregister($05000001);
 NR_SPSR = tregister($05000002);
+NR_APSR_nzcv = tregister($05000003);

compiler/arm/rarmdwa.inc

@@ -90,4 +90,5 @@
 0,
 0,
 0,
+0,
 0

compiler/arm/rarmnor.inc

@@ -1,2 +1,2 @@
 { don't edit, this file is generated from armreg.dat }
-92
+93

compiler/arm/rarmnum.inc

@@ -90,4 +90,5 @@ tregister($0407001E),
 tregister($0407001F),
 tregister($05000000),
 tregister($05000001),
-tregister($05000002)
+tregister($05000002),
+tregister($05000003)

compiler/arm/rarmrni.inc

@@ -90,4 +90,5 @@
 88,
 89,
 90,
-91
+91,
+92

compiler/arm/rarmsri.inc

@@ -1,5 +1,6 @@
 { don't edit, this file is generated from armreg.dat }
 0,
+92,
 89,
 27,
 30,

compiler/arm/rarmsta.inc

@@ -90,4 +90,5 @@
 0,
 0,
 0,
+0,
 0

compiler/arm/rarmstd.inc

@@ -90,4 +90,5 @@
 'd31',
 'cpsr',
 'fpscr',
-'spsr'
+'spsr',
+'apsr_nzcv'

compiler/arm/rarmsup.inc

@@ -91,3 +91,4 @@ RS_D31 = $1F;
 RS_CPSR = $00;
 RS_FPSCR = $01;
 RS_SPSR = $02;
+RS_APSR_nzcv = $03;

compiler/avr/cpubase.pas

@@ -326,7 +326,7 @@ unit cpubase;
 
 
     const
-      std_regname_table : array[tregisterindex] of string[7] = (
+      std_regname_table : array[tregisterindex] of string[10] = (
         {$i ravrstd.inc}
       );
 

compiler/m68k/cpubase.pas

@@ -353,7 +353,7 @@ implementation
 
 
     const
-      std_regname_table : array[tregisterindex] of string[7] = (
+      std_regname_table : array[tregisterindex] of string[10] = (
         {$i r68kstd.inc}
       );
 

compiler/mips/cpubase.pas

@@ -295,7 +295,7 @@ unit cpubase;
 
 
     const
-      std_regname_table : array[tregisterindex] of string[7] = (
+      std_regname_table : array[tregisterindex] of string[10] = (
         {$i rmipsstd.inc}
       );
 

compiler/powerpc/cpubase.pas

@@ -422,7 +422,7 @@ implementation
       rgbase,verbose;
 
     const
-      std_regname_table : array[tregisterindex] of string[7] = (
+      std_regname_table : array[tregisterindex] of string[10] = (
         {$i rppcstd.inc}
       );
 

compiler/powerpc64/cpubase.pas

@@ -424,7 +424,7 @@ uses
   rgBase, verbose, itcpugas;
 
 const
-  std_regname_table: array[tregisterindex] of string[7] = (
+  std_regname_table: array[tregisterindex] of string[10] = (
 {$I rppcstd.inc}
     );
 

compiler/x86/cpubase.pas

@@ -268,7 +268,7 @@ implementation
 
     const
     {$ifdef x86_64}
-      std_regname_table : array[tregisterindex] of string[7] = (
+      std_regname_table : array[tregisterindex] of string[10] = (
         {$i r8664std.inc}
       );
 
@@ -279,7 +279,7 @@ implementation
         {$i r8664sri.inc}
       );
     {$else x86_64}
-      std_regname_table : array[tregisterindex] of string[7] = (
+      std_regname_table : array[tregisterindex] of string[10] = (
         {$i r386std.inc}
       );