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@@ -31,9 +31,9 @@ interface
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cpubase,cgbase,parabase,cgutils,
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aasmbase,aasmtai,aasmdata,aasmcpu,
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symconst,symbase,symdef,symsym,symtype
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-{$ifndef cpu64bitalu}
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+{$if not defined(cpu64bitalu) and not defined(cpuhighleveltarget)}
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,cg64f32
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-{$endif not cpu64bitalu}
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+{$endif not cpu64bitalu and not cpuhighleveltarget}
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;
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type
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@@ -63,10 +63,6 @@ interface
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procedure location_force_mmreg(list:TAsmList;var l: tlocation;maybeconst:boolean);
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procedure location_allocate_register(list:TAsmList;out l: tlocation;def: tdef;constant: boolean);
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- { loads a cgpara into a tlocation; assumes that loc.loc is already
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- initialised }
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- procedure gen_load_cgpara_loc(list: TAsmList; vardef: tdef; const para: TCGPara; var destloc: tlocation; reusepara: boolean);
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-
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{ allocate registers for a tlocation; assumes that loc.loc is already
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set to LOC_CREGISTER/LOC_CFPUREGISTER/... }
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procedure gen_alloc_regloc(list:TAsmList;var loc: tlocation;def: tdef);
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@@ -80,7 +76,6 @@ interface
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procedure gen_proc_exit_code(list:TAsmList);
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procedure gen_save_used_regs(list:TAsmList);
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procedure gen_restore_used_regs(list:TAsmList);
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- procedure gen_load_para_value(list:TAsmList);
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procedure get_used_regvars(n: tnode; var rv: tusedregvars);
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{ adds the regvars used in n and its children to rv.allregvars,
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@@ -101,6 +96,9 @@ interface
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procedure gen_load_frame_for_exceptfilter(list : TAsmList);
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+ procedure gen_alloc_regvar(list:TAsmList;sym: tabstractnormalvarsym; allocreg: boolean);
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+
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+
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implementation
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uses
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@@ -142,7 +140,7 @@ implementation
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LOC_REGISTER,
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LOC_CREGISTER:
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begin
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-{$ifdef cpu64bitalu}
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+{$if defined(cpu64bitalu)}
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{ x86-64 system v abi:
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structs with up to 16 bytes are returned in registers }
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if location.size in [OS_128,OS_S128] then
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@@ -152,7 +150,8 @@ implementation
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if getsupreg(location.registerhi)<first_int_imreg then
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cg.ungetcpuregister(list,location.registerhi);
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end
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-{$else cpu64bitalu}
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+ else
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+{$elseif not defined(cpuhighleveltarget)}
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if location.size in [OS_64,OS_S64] then
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begin
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if getsupreg(location.register64.reglo)<first_int_imreg then
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@@ -160,8 +159,8 @@ implementation
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if getsupreg(location.register64.reghi)<first_int_imreg then
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cg.ungetcpuregister(list,location.register64.reghi);
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end
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-{$endif cpu64bitalu}
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else
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+{$endif cpu64bitalu and not cpuhighleveltarget}
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if getsupreg(location.register)<first_int_imreg then
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cg.ungetcpuregister(list,location.register);
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end;
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@@ -296,7 +295,7 @@ implementation
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end;
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LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE :
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begin
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-{$ifdef cpu64bitalu}
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+{$if defined(cpu64bitalu)}
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if opsize in [OS_128,OS_S128] then
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begin
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hlcg.location_force_reg(list,p.location,p.resultdef,cgsize_orddef(opsize),true);
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@@ -306,7 +305,7 @@ implementation
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p.location.register:=tmpreg;
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opsize:=OS_64;
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end;
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-{$else cpu64bitalu}
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+{$elseif not defined(cpuhighleveltarget)}
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if opsize in [OS_64,OS_S64] then
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begin
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hlcg.location_force_reg(list,p.location,p.resultdef,cgsize_orddef(opsize),true);
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@@ -316,7 +315,7 @@ implementation
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p.location.register:=tmpreg;
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opsize:=OS_32;
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end;
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-{$endif cpu64bitalu}
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+{$endif cpu64bitalu and not cpuhighleveltarget}
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cg.a_cmp_const_loc_label(list,opsize,OC_NE,0,p.location,truelabel);
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cg.a_jmp_always(list,falselabel);
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end;
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@@ -460,21 +459,21 @@ implementation
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location_reset(l,LOC_CREGISTER,l.size)
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else
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location_reset(l,LOC_REGISTER,l.size);
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-{$ifdef cpu64bitalu}
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+{$if defined(cpu64bitalu)}
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if l.size in [OS_128,OS_S128,OS_F128] then
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begin
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l.register128.reglo:=cg.getintregister(list,OS_64);
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l.register128.reghi:=cg.getintregister(list,OS_64);
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end
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else
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-{$else cpu64bitalu}
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+{$elseif not defined(cpuhighleveltarget)}
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if l.size in [OS_64,OS_S64,OS_F64] then
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begin
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l.register64.reglo:=cg.getintregister(list,OS_32);
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l.register64.reghi:=cg.getintregister(list,OS_32);
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end
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else
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-{$endif cpu64bitalu}
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+{$endif cpu64bitalu and not cpuhighleveltarget}
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{ Note: for widths of records (and maybe objects, classes, etc.) an
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address register could be set here, but that is later
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changed to an intregister neverthless when in the
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@@ -560,21 +559,21 @@ implementation
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case loc.loc of
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LOC_CREGISTER:
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begin
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-{$ifdef cpu64bitalu}
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+{$if defined(cpu64bitalu)}
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if loc.size in [OS_128,OS_S128] then
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begin
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loc.register128.reglo:=cg.getintregister(list,OS_64);
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loc.register128.reghi:=cg.getintregister(list,OS_64);
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end
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else
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-{$else cpu64bitalu}
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+{$elseif not defined(cpuhighleveltarget)}
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if loc.size in [OS_64,OS_S64] then
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begin
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loc.register64.reglo:=cg.getintregister(list,OS_32);
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loc.register64.reghi:=cg.getintregister(list,OS_32);
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end
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else
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-{$endif cpu64bitalu}
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+{$endif cpu64bitalu and not cpuhighleveltarget}
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if hlcg.def2regtyp(def)=R_ADDRESSREGISTER then
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loc.register:=hlcg.getaddressregister(list,def)
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else
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@@ -616,14 +615,14 @@ implementation
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cg.a_reg_sync(list,sym.initialloc.register128.reghi);
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end
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else
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-{$elseif defined(cpu32bitalu)}
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+{$elseif defined(cpu32bitalu) and not defined(cpuhighleveltarget)}
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if sym.initialloc.size in [OS_64,OS_S64] then
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begin
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cg.a_reg_sync(list,sym.initialloc.register64.reglo);
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cg.a_reg_sync(list,sym.initialloc.register64.reghi);
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end
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else
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-{$elseif defined(cpu16bitalu)}
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+{$elseif defined(cpu16bitalu) and not defined(cpuhighleveltarget)}
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if sym.initialloc.size in [OS_64,OS_S64] then
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begin
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cg.a_reg_sync(list,sym.initialloc.register64.reglo);
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@@ -638,7 +637,7 @@ implementation
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cg.a_reg_sync(list,cg.GetNextReg(sym.initialloc.register));
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end
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else
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-{$elseif defined(cpu8bitalu)}
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+{$elseif defined(cpu8bitalu) and not defined(cpuhighleveltarget)}
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if sym.initialloc.size in [OS_64,OS_S64] then
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begin
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cg.a_reg_sync(list,sym.initialloc.register64.reglo);
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@@ -668,640 +667,20 @@ implementation
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{$endif}
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cg.a_reg_sync(list,sym.initialloc.register);
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end;
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-{$ifdef cpu64bitalu}
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+{$if defined(cpu64bitalu)}
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if (sym.initialloc.size in [OS_128,OS_S128]) then
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varloc:=tai_varloc.create128(sym,sym.initialloc.register,sym.initialloc.registerhi)
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-{$else cpu64bitalu}
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+ else
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+{$elseif not defined(cpuhighleveltarget)}
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if (sym.initialloc.size in [OS_64,OS_S64]) then
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varloc:=tai_varloc.create64(sym,sym.initialloc.register,sym.initialloc.registerhi)
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-{$endif cpu64bitalu}
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else
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+{$endif cpu64bitalu and not cpuhighleveltarget}
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varloc:=tai_varloc.create(sym,sym.initialloc.register);
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list.concat(varloc);
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end;
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- procedure gen_load_cgpara_loc(list: TAsmList; vardef: tdef; const para: TCGPara; var destloc: tlocation; reusepara: boolean);
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-
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- procedure unget_para(const paraloc:TCGParaLocation);
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- begin
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- case paraloc.loc of
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- LOC_REGISTER :
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- begin
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- if getsupreg(paraloc.register)<first_int_imreg then
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- cg.ungetcpuregister(list,paraloc.register);
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- end;
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- LOC_MMREGISTER :
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- begin
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- if getsupreg(paraloc.register)<first_mm_imreg then
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- cg.ungetcpuregister(list,paraloc.register);
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- end;
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- LOC_FPUREGISTER :
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- begin
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- if getsupreg(paraloc.register)<first_fpu_imreg then
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- cg.ungetcpuregister(list,paraloc.register);
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- end;
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- end;
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- end;
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-
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- var
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- paraloc : pcgparalocation;
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- href : treference;
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- sizeleft : aint;
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- tempref : treference;
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- loadsize : tcgint;
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- tempreg : tregister;
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-{$ifdef mips}
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- //tmpreg : tregister;
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-{$endif mips}
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-{$ifndef cpu64bitalu}
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- reg64 : tregister64;
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-{$if defined(cpu8bitalu)}
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- curparaloc : PCGParaLocation;
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-{$endif defined(cpu8bitalu)}
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-{$endif not cpu64bitalu}
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- begin
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- paraloc:=para.location;
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- if not assigned(paraloc) then
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- internalerror(200408203);
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- { skip e.g. empty records }
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- if (paraloc^.loc = LOC_VOID) then
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- exit;
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- case destloc.loc of
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- LOC_REFERENCE :
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- begin
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- { If the parameter location is reused we don't need to copy
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- anything }
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- if not reusepara then
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- begin
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- href:=destloc.reference;
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- sizeleft:=para.intsize;
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- while assigned(paraloc) do
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- begin
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- if (paraloc^.size=OS_NO) then
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- begin
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- { Can only be a reference that contains the rest
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- of the parameter }
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- if (paraloc^.loc<>LOC_REFERENCE) or
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- assigned(paraloc^.next) then
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- internalerror(2005013010);
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- cg.a_load_cgparaloc_ref(list,paraloc^,href,sizeleft,destloc.reference.alignment);
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- inc(href.offset,sizeleft);
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- sizeleft:=0;
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- end
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- else
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- begin
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- { the min(...) call ensures that we do not store more than place is left as
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- paraloc^.size could be bigger than destloc.size of a parameter occupies a full register
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- and as on big endian system the parameters might be left aligned, we have to work
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- with the full register size for paraloc^.size }
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- if tcgsize2size[destloc.size]<>0 then
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- loadsize:=min(min(tcgsize2size[paraloc^.size],tcgsize2size[destloc.size]),sizeleft)
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- else
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- loadsize:=min(tcgsize2size[paraloc^.size],sizeleft);
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-
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- cg.a_load_cgparaloc_ref(list,paraloc^,href,loadsize,destloc.reference.alignment);
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- inc(href.offset,loadsize);
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- dec(sizeleft,loadsize);
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- end;
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- unget_para(paraloc^);
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- paraloc:=paraloc^.next;
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- end;
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- end;
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- end;
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- LOC_REGISTER,
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- LOC_CREGISTER :
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- begin
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-{$ifdef cpu64bitalu}
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- if (para.size in [OS_128,OS_S128,OS_F128]) and
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- ({ in case of fpu emulation, or abi's that pass fpu values
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- via integer registers }
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- (vardef.typ=floatdef) or
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- is_methodpointer(vardef) or
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- is_record(vardef)) then
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- begin
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- case paraloc^.loc of
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- LOC_REGISTER,
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- LOC_MMREGISTER:
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- begin
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- if not assigned(paraloc^.next) then
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- internalerror(200410104);
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- case tcgsize2size[paraloc^.size] of
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- 8:
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- begin
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- if (target_info.endian=ENDIAN_BIG) then
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- begin
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- { paraloc^ -> high
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- paraloc^.next -> low }
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- unget_para(paraloc^);
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- gen_alloc_regloc(list,destloc,vardef);
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- { reg->reg, alignment is irrelevant }
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- cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^,destloc.register128.reghi,8);
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- unget_para(paraloc^.next^);
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- cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^.next^,destloc.register128.reglo,8);
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- end
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- else
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- begin
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- { paraloc^ -> low
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- paraloc^.next -> high }
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- unget_para(paraloc^);
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- gen_alloc_regloc(list,destloc,vardef);
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- cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^,destloc.register128.reglo,8);
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- unget_para(paraloc^.next^);
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- cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^.next^,destloc.register128.reghi,8);
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- end;
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- end;
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- 4:
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- begin
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- { The 128-bit parameter is located in 4 32-bit MM registers.
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- It is needed to copy them to 2 64-bit int registers.
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- A code generator or a target cpu must support loading of a 32-bit MM register to
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- a 64-bit int register, zero extending it. }
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- if target_info.endian=ENDIAN_BIG then
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- internalerror(2018101702); // Big endian support not implemented yet
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- gen_alloc_regloc(list,destloc,vardef);
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- tempreg:=cg.getintregister(list,OS_64);
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- // Low part of the 128-bit param
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- unget_para(paraloc^);
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- cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^,tempreg,4);
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- paraloc:=paraloc^.next;
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- if paraloc=nil then
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- internalerror(2018101703);
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- unget_para(paraloc^);
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- cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^,destloc.register128.reglo,4);
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- cg.a_op_const_reg(list,OP_SHL,OS_64,32,destloc.register128.reglo);
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- cg.a_op_reg_reg(list,OP_OR,OS_64,tempreg,destloc.register128.reglo);
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- // High part of the 128-bit param
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- paraloc:=paraloc^.next;
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- if paraloc=nil then
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- internalerror(2018101704);
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- unget_para(paraloc^);
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- cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^,tempreg,4);
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- paraloc:=paraloc^.next;
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- if paraloc=nil then
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- internalerror(2018101705);
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- unget_para(paraloc^);
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- cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^,destloc.register128.reghi,4);
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- cg.a_op_const_reg(list,OP_SHL,OS_64,32,destloc.register128.reghi);
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- cg.a_op_reg_reg(list,OP_OR,OS_64,tempreg,destloc.register128.reghi);
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- end
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- else
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- internalerror(2018101701);
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- end;
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- end;
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- LOC_REFERENCE:
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- begin
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- gen_alloc_regloc(list,destloc,vardef);
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- reference_reset_base(href,paraloc^.reference.index,paraloc^.reference.offset,ctempposinvalid,para.alignment,[]);
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- cg128.a_load128_ref_reg(list,href,destloc.register128);
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- unget_para(paraloc^);
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- end;
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- else
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- internalerror(2012090607);
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- end
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|
|
- end
|
|
|
- else
|
|
|
-{$else cpu64bitalu}
|
|
|
- if (para.size in [OS_64,OS_S64,OS_F64]) and
|
|
|
- (is_64bit(vardef) or
|
|
|
- { in case of fpu emulation, or abi's that pass fpu values
|
|
|
- via integer registers }
|
|
|
- (vardef.typ=floatdef) or
|
|
|
- is_methodpointer(vardef) or
|
|
|
- is_record(vardef)) then
|
|
|
- begin
|
|
|
- case paraloc^.loc of
|
|
|
- LOC_REGISTER:
|
|
|
- begin
|
|
|
- case para.locations_count of
|
|
|
-{$if defined(cpu8bitalu)}
|
|
|
- { 8 paralocs? }
|
|
|
- 8:
|
|
|
- if (target_info.endian=ENDIAN_BIG) then
|
|
|
- begin
|
|
|
- { is there any big endian 8 bit ALU/16 bit Addr CPU? }
|
|
|
- internalerror(2015041003);
|
|
|
- { paraloc^ -> high
|
|
|
- paraloc^.next^.next^.next^.next -> low }
|
|
|
- unget_para(paraloc^);
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- { reg->reg, alignment is irrelevant }
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^,cg.GetNextReg(destloc.register64.reghi),1);
|
|
|
- unget_para(paraloc^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^,destloc.register64.reghi,1);
|
|
|
- unget_para(paraloc^.next^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^,cg.GetNextReg(destloc.register64.reglo),1);
|
|
|
- unget_para(paraloc^.next^.next^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^.next^,destloc.register64.reglo,1);
|
|
|
- end
|
|
|
- else
|
|
|
- begin
|
|
|
- { paraloc^ -> low
|
|
|
- paraloc^.next^.next^.next^.next -> high }
|
|
|
- curparaloc:=paraloc;
|
|
|
- unget_para(curparaloc^);
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^,destloc.register64.reglo,2);
|
|
|
- unget_para(curparaloc^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^,cg.GetNextReg(destloc.register64.reglo),1);
|
|
|
- unget_para(curparaloc^.next^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^.next^,cg.GetNextReg(cg.GetNextReg(destloc.register64.reglo)),1);
|
|
|
- unget_para(curparaloc^.next^.next^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^.next^.next^,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(destloc.register64.reglo))),1);
|
|
|
-
|
|
|
- curparaloc:=paraloc^.next^.next^.next^.next;
|
|
|
- unget_para(curparaloc^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^,destloc.register64.reghi,2);
|
|
|
- unget_para(curparaloc^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^,cg.GetNextReg(destloc.register64.reghi),1);
|
|
|
- unget_para(curparaloc^.next^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^.next^,cg.GetNextReg(cg.GetNextReg(destloc.register64.reghi)),1);
|
|
|
- unget_para(curparaloc^.next^.next^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_8,curparaloc^.next^.next^.next^,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(destloc.register64.reghi))),1);
|
|
|
- end;
|
|
|
-{$endif defined(cpu8bitalu)}
|
|
|
-{$if defined(cpu16bitalu) or defined(cpu8bitalu)}
|
|
|
- { 4 paralocs? }
|
|
|
- 4:
|
|
|
- if (target_info.endian=ENDIAN_BIG) then
|
|
|
- begin
|
|
|
- { paraloc^ -> high
|
|
|
- paraloc^.next^.next -> low }
|
|
|
- unget_para(paraloc^);
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- { reg->reg, alignment is irrelevant }
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^,cg.GetNextReg(destloc.register64.reghi),2);
|
|
|
- unget_para(paraloc^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^,destloc.register64.reghi,2);
|
|
|
- unget_para(paraloc^.next^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^,cg.GetNextReg(destloc.register64.reglo),2);
|
|
|
- unget_para(paraloc^.next^.next^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^.next^,destloc.register64.reglo,2);
|
|
|
- end
|
|
|
- else
|
|
|
- begin
|
|
|
- { paraloc^ -> low
|
|
|
- paraloc^.next^.next -> high }
|
|
|
- unget_para(paraloc^);
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^,destloc.register64.reglo,2);
|
|
|
- unget_para(paraloc^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^,cg.GetNextReg(destloc.register64.reglo),2);
|
|
|
- unget_para(paraloc^.next^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^,destloc.register64.reghi,2);
|
|
|
- unget_para(paraloc^.next^.next^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^.next^,cg.GetNextReg(destloc.register64.reghi),2);
|
|
|
- end;
|
|
|
-{$endif defined(cpu16bitalu) or defined(cpu8bitalu)}
|
|
|
- 2:
|
|
|
- if (target_info.endian=ENDIAN_BIG) then
|
|
|
- begin
|
|
|
- { paraloc^ -> high
|
|
|
- paraloc^.next -> low }
|
|
|
- unget_para(paraloc^);
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- { reg->reg, alignment is irrelevant }
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^,destloc.register64.reghi,4);
|
|
|
- unget_para(paraloc^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^.next^,destloc.register64.reglo,4);
|
|
|
- end
|
|
|
- else
|
|
|
- begin
|
|
|
- { paraloc^ -> low
|
|
|
- paraloc^.next -> high }
|
|
|
- unget_para(paraloc^);
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^,destloc.register64.reglo,4);
|
|
|
- unget_para(paraloc^.next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^.next^,destloc.register64.reghi,4);
|
|
|
- end;
|
|
|
- else
|
|
|
- { unexpected number of paralocs }
|
|
|
- internalerror(200410104);
|
|
|
- end;
|
|
|
- end;
|
|
|
- LOC_REFERENCE:
|
|
|
- begin
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- reference_reset_base(href,paraloc^.reference.index,paraloc^.reference.offset,ctempposinvalid,para.alignment,[]);
|
|
|
- cg64.a_load64_ref_reg(list,href,destloc.register64);
|
|
|
- unget_para(paraloc^);
|
|
|
- end;
|
|
|
- else
|
|
|
- internalerror(2005101501);
|
|
|
- end
|
|
|
- end
|
|
|
- else
|
|
|
-{$endif cpu64bitalu}
|
|
|
- begin
|
|
|
- if assigned(paraloc^.next) then
|
|
|
- begin
|
|
|
- if (destloc.size in [OS_PAIR,OS_SPAIR]) and
|
|
|
- (para.Size in [OS_PAIR,OS_SPAIR]) then
|
|
|
- begin
|
|
|
- unget_para(paraloc^);
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^,destloc.register,sizeof(aint));
|
|
|
- unget_para(paraloc^.Next^);
|
|
|
- {$if defined(cpu16bitalu) or defined(cpu8bitalu)}
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,cg.GetNextReg(destloc.register),sizeof(aint));
|
|
|
- {$else}
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,destloc.registerhi,sizeof(aint));
|
|
|
- {$endif}
|
|
|
- end
|
|
|
-{$if defined(cpu8bitalu)}
|
|
|
- else if (destloc.size in [OS_32,OS_S32]) and
|
|
|
- (para.Size in [OS_32,OS_S32]) then
|
|
|
- begin
|
|
|
- unget_para(paraloc^);
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_8,paraloc^,destloc.register,sizeof(aint));
|
|
|
- unget_para(paraloc^.Next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_8,paraloc^.Next^,cg.GetNextReg(destloc.register),sizeof(aint));
|
|
|
- unget_para(paraloc^.Next^.Next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_8,paraloc^.Next^.Next^,cg.GetNextReg(cg.GetNextReg(destloc.register)),sizeof(aint));
|
|
|
- unget_para(paraloc^.Next^.Next^.Next^);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_8,paraloc^.Next^.Next^.Next^,cg.GetNextReg(cg.GetNextReg(cg.GetNextReg(destloc.register))),sizeof(aint));
|
|
|
- end
|
|
|
-{$endif defined(cpu8bitalu)}
|
|
|
- else
|
|
|
- begin
|
|
|
- { this can happen if a parameter is spread over
|
|
|
- multiple paralocs, e.g. if a record with two single
|
|
|
- fields must be passed in two single precision
|
|
|
- registers }
|
|
|
- { does it fit in the register of destloc? }
|
|
|
- sizeleft:=para.intsize;
|
|
|
- if sizeleft<>vardef.size then
|
|
|
- internalerror(2014122806);
|
|
|
- if sizeleft<>tcgsize2size[destloc.size] then
|
|
|
- internalerror(200410105);
|
|
|
- { store everything first to memory, then load it in
|
|
|
- destloc }
|
|
|
- tg.gettemp(list,sizeleft,sizeleft,tt_persistent,tempref);
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- while sizeleft>0 do
|
|
|
- begin
|
|
|
- if not assigned(paraloc) then
|
|
|
- internalerror(2014122807);
|
|
|
- unget_para(paraloc^);
|
|
|
- cg.a_load_cgparaloc_ref(list,paraloc^,tempref,sizeleft,newalignment(para.alignment,para.intsize-sizeleft));
|
|
|
- if (paraloc^.size=OS_NO) and
|
|
|
- assigned(paraloc^.next) then
|
|
|
- internalerror(2014122805);
|
|
|
- inc(tempref.offset,tcgsize2size[paraloc^.size]);
|
|
|
- dec(sizeleft,tcgsize2size[paraloc^.size]);
|
|
|
- paraloc:=paraloc^.next;
|
|
|
- end;
|
|
|
- dec(tempref.offset,para.intsize);
|
|
|
- cg.a_load_ref_reg(list,para.size,para.size,tempref,destloc.register);
|
|
|
- tg.ungettemp(list,tempref);
|
|
|
- end;
|
|
|
- end
|
|
|
- else
|
|
|
- begin
|
|
|
- unget_para(paraloc^);
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- { we can't directly move regular registers into fpu
|
|
|
- registers }
|
|
|
- if getregtype(paraloc^.register)=R_FPUREGISTER then
|
|
|
- begin
|
|
|
- { store everything first to memory, then load it in
|
|
|
- destloc }
|
|
|
- tg.gettemp(list,tcgsize2size[paraloc^.size],para.intsize,tt_persistent,tempref);
|
|
|
- cg.a_load_cgparaloc_ref(list,paraloc^,tempref,tcgsize2size[paraloc^.size],tempref.alignment);
|
|
|
- cg.a_load_ref_reg(list,int_cgsize(tcgsize2size[paraloc^.size]),destloc.size,tempref,destloc.register);
|
|
|
- tg.ungettemp(list,tempref);
|
|
|
- end
|
|
|
- else
|
|
|
- cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,sizeof(aint));
|
|
|
- end;
|
|
|
- end;
|
|
|
- end;
|
|
|
- LOC_FPUREGISTER,
|
|
|
- LOC_CFPUREGISTER :
|
|
|
- begin
|
|
|
-{$ifdef mips}
|
|
|
- if (destloc.size = paraloc^.Size) and
|
|
|
- (paraloc^.Loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
|
|
|
- begin
|
|
|
- unget_para(paraloc^);
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,para.alignment);
|
|
|
- end
|
|
|
- else if (destloc.size = OS_F32) and
|
|
|
- (paraloc^.Loc in [LOC_REGISTER,LOC_CREGISTER]) then
|
|
|
- begin
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- unget_para(paraloc^);
|
|
|
- list.Concat(taicpu.op_reg_reg(A_MTC1,paraloc^.register,destloc.register));
|
|
|
- end
|
|
|
-{ TODO: Produces invalid code, needs fixing together with regalloc setup. }
|
|
|
-{
|
|
|
- else if (destloc.size = OS_F64) and
|
|
|
- (paraloc^.Loc in [LOC_REGISTER,LOC_CREGISTER]) and
|
|
|
- (paraloc^.next^.Loc in [LOC_REGISTER,LOC_CREGISTER]) then
|
|
|
- begin
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
-
|
|
|
- tmpreg:=destloc.register;
|
|
|
- unget_para(paraloc^);
|
|
|
- list.Concat(taicpu.op_reg_reg(A_MTC1,paraloc^.register,tmpreg));
|
|
|
- setsupreg(tmpreg,getsupreg(tmpreg)+1);
|
|
|
- unget_para(paraloc^.next^);
|
|
|
- list.Concat(taicpu.op_reg_reg(A_MTC1,paraloc^.Next^.register,tmpreg));
|
|
|
- end
|
|
|
-}
|
|
|
- else
|
|
|
- begin
|
|
|
- sizeleft := TCGSize2Size[destloc.size];
|
|
|
- tg.GetTemp(list,sizeleft,sizeleft,tt_normal,tempref);
|
|
|
- href:=tempref;
|
|
|
- while assigned(paraloc) do
|
|
|
- begin
|
|
|
- unget_para(paraloc^);
|
|
|
- cg.a_load_cgparaloc_ref(list,paraloc^,href,sizeleft,destloc.reference.alignment);
|
|
|
- inc(href.offset,TCGSize2Size[paraloc^.size]);
|
|
|
- dec(sizeleft,TCGSize2Size[paraloc^.size]);
|
|
|
- paraloc:=paraloc^.next;
|
|
|
- end;
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- cg.a_loadfpu_ref_reg(list,destloc.size,destloc.size,tempref,destloc.register);
|
|
|
- tg.UnGetTemp(list,tempref);
|
|
|
- end;
|
|
|
-{$else mips}
|
|
|
-{$if defined(sparc) or defined(arm)}
|
|
|
- { Arm and Sparc passes floats in int registers, when loading to fpu register
|
|
|
- we need a temp }
|
|
|
- sizeleft := TCGSize2Size[destloc.size];
|
|
|
- tg.GetTemp(list,sizeleft,sizeleft,tt_normal,tempref);
|
|
|
- href:=tempref;
|
|
|
- while assigned(paraloc) do
|
|
|
- begin
|
|
|
- unget_para(paraloc^);
|
|
|
- cg.a_load_cgparaloc_ref(list,paraloc^,href,sizeleft,destloc.reference.alignment);
|
|
|
- inc(href.offset,TCGSize2Size[paraloc^.size]);
|
|
|
- dec(sizeleft,TCGSize2Size[paraloc^.size]);
|
|
|
- paraloc:=paraloc^.next;
|
|
|
- end;
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- cg.a_loadfpu_ref_reg(list,destloc.size,destloc.size,tempref,destloc.register);
|
|
|
- tg.UnGetTemp(list,tempref);
|
|
|
-{$else defined(sparc) or defined(arm)}
|
|
|
- unget_para(paraloc^);
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- { from register to register -> alignment is irrelevant }
|
|
|
- cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,0);
|
|
|
- if assigned(paraloc^.next) then
|
|
|
- internalerror(200410109);
|
|
|
-{$endif defined(sparc) or defined(arm)}
|
|
|
-{$endif mips}
|
|
|
- end;
|
|
|
- LOC_MMREGISTER,
|
|
|
- LOC_CMMREGISTER :
|
|
|
- begin
|
|
|
-{$ifndef cpu64bitalu}
|
|
|
- { ARM vfp floats are passed in integer registers }
|
|
|
- if (para.size=OS_F64) and
|
|
|
- (paraloc^.size in [OS_32,OS_S32]) and
|
|
|
- use_vectorfpu(vardef) then
|
|
|
- begin
|
|
|
- { we need 2x32bit reg }
|
|
|
- if not assigned(paraloc^.next) or
|
|
|
- assigned(paraloc^.next^.next) then
|
|
|
- internalerror(2009112421);
|
|
|
- unget_para(paraloc^.next^);
|
|
|
- case paraloc^.next^.loc of
|
|
|
- LOC_REGISTER:
|
|
|
- tempreg:=paraloc^.next^.register;
|
|
|
- LOC_REFERENCE:
|
|
|
- begin
|
|
|
- tempreg:=cg.getintregister(list,OS_32);
|
|
|
- cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^.next^,tempreg,4);
|
|
|
- end;
|
|
|
- else
|
|
|
- internalerror(2012051301);
|
|
|
- end;
|
|
|
- { don't free before the above, because then the getintregister
|
|
|
- could reallocate this register and overwrite it }
|
|
|
- unget_para(paraloc^);
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- if (target_info.endian=endian_big) then
|
|
|
- { paraloc^ -> high
|
|
|
- paraloc^.next -> low }
|
|
|
- reg64:=joinreg64(tempreg,paraloc^.register)
|
|
|
- else
|
|
|
- reg64:=joinreg64(paraloc^.register,tempreg);
|
|
|
- cg64.a_loadmm_intreg64_reg(list,OS_F64,reg64,destloc.register);
|
|
|
- end
|
|
|
- else
|
|
|
-{$endif not cpu64bitalu}
|
|
|
- begin
|
|
|
- if not assigned(paraloc^.next) then
|
|
|
- begin
|
|
|
- unget_para(paraloc^);
|
|
|
- gen_alloc_regloc(list,destloc,vardef);
|
|
|
- { from register to register -> alignment is irrelevant }
|
|
|
- cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,0);
|
|
|
- end
|
|
|
- else
|
|
|
- begin
|
|
|
- internalerror(200410108);
|
|
|
- end;
|
|
|
- { data could come in two memory locations, for now
|
|
|
- we simply ignore the sanity check (FK)
|
|
|
- if assigned(paraloc^.next) then
|
|
|
- internalerror(200410108);
|
|
|
- }
|
|
|
- end;
|
|
|
- end;
|
|
|
- else
|
|
|
- internalerror(2010052903);
|
|
|
- end;
|
|
|
- end;
|
|
|
-
|
|
|
-
|
|
|
- procedure gen_load_para_value(list:TAsmList);
|
|
|
-
|
|
|
- procedure get_para(const paraloc:TCGParaLocation);
|
|
|
- begin
|
|
|
- case paraloc.loc of
|
|
|
- LOC_REGISTER :
|
|
|
- begin
|
|
|
- if getsupreg(paraloc.register)<first_int_imreg then
|
|
|
- cg.getcpuregister(list,paraloc.register);
|
|
|
- end;
|
|
|
- LOC_MMREGISTER :
|
|
|
- begin
|
|
|
- if getsupreg(paraloc.register)<first_mm_imreg then
|
|
|
- cg.getcpuregister(list,paraloc.register);
|
|
|
- end;
|
|
|
- LOC_FPUREGISTER :
|
|
|
- begin
|
|
|
- if getsupreg(paraloc.register)<first_fpu_imreg then
|
|
|
- cg.getcpuregister(list,paraloc.register);
|
|
|
- end;
|
|
|
- end;
|
|
|
- end;
|
|
|
-
|
|
|
-
|
|
|
- var
|
|
|
- i : longint;
|
|
|
- currpara : tparavarsym;
|
|
|
- paraloc : pcgparalocation;
|
|
|
- begin
|
|
|
- if (po_assembler in current_procinfo.procdef.procoptions) or
|
|
|
- { exceptfilters have a single hidden 'parentfp' parameter, which
|
|
|
- is handled by tcg.g_proc_entry. }
|
|
|
- (current_procinfo.procdef.proctypeoption=potype_exceptfilter) then
|
|
|
- exit;
|
|
|
-
|
|
|
- { Allocate registers used by parameters }
|
|
|
- for i:=0 to current_procinfo.procdef.paras.count-1 do
|
|
|
- begin
|
|
|
- currpara:=tparavarsym(current_procinfo.procdef.paras[i]);
|
|
|
- paraloc:=currpara.paraloc[calleeside].location;
|
|
|
- while assigned(paraloc) do
|
|
|
- begin
|
|
|
- if paraloc^.loc in [LOC_REGISTER,LOC_FPUREGISTER,LOC_MMREGISTER] then
|
|
|
- get_para(paraloc^);
|
|
|
- paraloc:=paraloc^.next;
|
|
|
- end;
|
|
|
- end;
|
|
|
-
|
|
|
- { Copy parameters to local references/registers }
|
|
|
- for i:=0 to current_procinfo.procdef.paras.count-1 do
|
|
|
- begin
|
|
|
- currpara:=tparavarsym(current_procinfo.procdef.paras[i]);
|
|
|
- { don't use currpara.vardef, as this will be wrong in case of
|
|
|
- call-by-reference parameters (it won't contain the pointerdef) }
|
|
|
- gen_load_cgpara_loc(list,currpara.paraloc[calleeside].def,currpara.paraloc[calleeside],currpara.initialloc,paramanager.param_use_paraloc(currpara.paraloc[calleeside]));
|
|
|
- { gen_load_cgpara_loc() already allocated the initialloc
|
|
|
- -> don't allocate again }
|
|
|
- if currpara.initialloc.loc in [LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER] then
|
|
|
- begin
|
|
|
- gen_alloc_regvar(list,currpara,false);
|
|
|
- hlcg.varsym_set_localloc(list,currpara);
|
|
|
- end;
|
|
|
- end;
|
|
|
-
|
|
|
- { generate copies of call by value parameters, must be done before
|
|
|
- the initialization and body is parsed because the refcounts are
|
|
|
- incremented using the local copies }
|
|
|
- current_procinfo.procdef.parast.SymList.ForEachCall(@hlcg.g_copyvalueparas,list);
|
|
|
- if not(po_assembler in current_procinfo.procdef.procoptions) then
|
|
|
- begin
|
|
|
- { initialize refcounted paras, and trash others. Needed here
|
|
|
- instead of in gen_initialize_code, because when a reference is
|
|
|
- intialised or trashed while the pointer to that reference is kept
|
|
|
- in a regvar, we add a register move and that one again has to
|
|
|
- come after the parameter loading code as far as the register
|
|
|
- allocator is concerned }
|
|
|
- current_procinfo.procdef.parast.SymList.ForEachCall(@init_paras,list);
|
|
|
- end;
|
|
|
- end;
|
|
|
-
|
|
|
-
|
|
|
{****************************************************************************
|
|
|
Entry/Exit
|
|
|
****************************************************************************}
|
Jonas Maebe