+ the ES register made volatile on i8086 as per the 16-bit x86 calling conventions

git-svn-id: trunk@24462 -

compiler/fpcdefs.inc

@@ -57,6 +57,7 @@
   {$define cpuneedsmulhelper}
   { TODO: add another define in order to disable the div helper for 16-bit divs? }
   {$define cpuneedsdiv32helper}
+  {$define VOLATILE_ES}
 {$endif i8086}
 
 {$ifdef i386}

compiler/x86/cgx86.pas

@@ -1976,13 +1976,21 @@ unit cgx86;
           begin
             getcpuregister(list,REGDI);
             if (dest.segment=NR_NO) then
-              a_loadaddr_ref_reg(list,dest,REGDI)
+              begin
+                a_loadaddr_ref_reg(list,dest,REGDI);
+{$ifdef volatile_es}
+                list.concat(taicpu.op_reg(A_PUSH,S_L,NR_DS));
+                list.concat(taicpu.op_reg(A_POP,S_L,NR_ES));
+{$endif volatile_es}
+              end
             else
               begin
                 dstref:=dest;
                 dstref.segment:=NR_NO;
                 a_loadaddr_ref_reg(list,dstref,REGDI);
+{$ifndef volatile_es}
                 list.concat(taicpu.op_reg(A_PUSH,S_L,NR_ES));
+{$endif not volatile_es}
                 list.concat(taicpu.op_reg(A_PUSH,S_L,dest.segment));
                 list.concat(taicpu.op_reg(A_POP,S_L,NR_ES));
               end;
@@ -2047,8 +2055,10 @@ unit cgx86;
             ungetcpuregister(list,REGDI);
             if (source.segment<>NR_NO) then
               list.concat(taicpu.op_reg(A_POP,S_L,NR_DS));
+{$ifndef volatile_es}
             if (dest.segment<>NR_NO) then
               list.concat(taicpu.op_reg(A_POP,S_L,NR_ES));
+{$endif not volatile_es}
           end;
         end;
     end;

rtl/msdos/prt0.asm

@@ -54,10 +54,6 @@ no_bss:
         int 21h
         jc mem_realloc_err
 
-        ; init ES
-        mov ax, dgroup
-        mov es, ax
-
         ; bx = the new size in paragraphs
         add bx, word [dos_psp]
         sub bx, dgroup
@@ -111,7 +107,6 @@ FPC_INTR:
         mov bp, sp
         mov al, byte [ss:bp + 6]
         mov byte [cs:int_number], al
-        push es
         mov si, [ss:bp + 4]
         push ds
         mov ax, word [si + 16]
@@ -156,7 +151,6 @@ int_number:
         mov word [si + 18], ax
         
         pop ds
-        pop es
         pop bp
         ret 4