* Aarch64: set register size correctly for AndStrb2Strb optimization, resolves #37427

git-svn-id: trunk@45872 -

.gitattributes

@@ -18390,6 +18390,7 @@ tests/webtbs/tw37397.pp svneol=native#text/plain
 tests/webtbs/tw37398.pp svneol=native#text/pascal
 tests/webtbs/tw37400.pp svneol=native#text/pascal
 tests/webtbs/tw3742.pp svneol=native#text/plain
+tests/webtbs/tw37427.pp svneol=native#text/pascal
 tests/webtbs/tw3751.pp svneol=native#text/plain
 tests/webtbs/tw3758.pp svneol=native#text/plain
 tests/webtbs/tw3764.pp svneol=native#text/plain

compiler/armgen/aoptarm.pas

@@ -874,7 +874,11 @@ Implementation
             not(RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
             begin
               DebugMsg('Peephole AndStrb2Strb done', p);
+{$ifdef AARCH64}
+              taicpu(hp1).loadReg(0,newreg(R_INTREGISTER,getsupreg(taicpu(p).oper[1]^.reg),R_SUBD));
+{$else AARCH64}
               taicpu(hp1).loadReg(0,taicpu(p).oper[1]^.reg);
+{$endif AARCH64}
               AllocRegBetween(taicpu(p).oper[1]^.reg,p,hp1,UsedRegs);
               RemoveCurrentP(p);
               result:=true;

tests/webtbs/tw37427.pp

@@ -0,0 +1,15 @@
+program ByteCompilerError;
+
+
+{$Q+}
+
+function NativeGetHashBytes: Byte;
+var
+   LBitSize: Int64;
+   bob: byte;
+begin
+  bob := LBitSize and $FF;
+end;
+
+begin
+end.