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@@ -2549,7 +2549,7 @@ unit cgcpu;
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cg.a_load_const_reg(list,OS_S32,longint(highvalue),hreg);
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{ don't use cg.a_op_const_reg() here, because a possible optimized
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ADDQ/SUBQ wouldn't set the eXtend bit }
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- list.concat(taicpu.op_const_reg(opcode,S_L,lowvalue,regdst.reglo));
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+ list.concat(taicpu.op_const_reg(opcode,S_L,longint(lowvalue),regdst.reglo));
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list.concat(taicpu.op_reg_reg(xopcode,S_L,hreg,regdst.reghi));
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end;
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OP_AND,OP_OR,OP_XOR:
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pierre