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@@ -0,0 +1,667 @@
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+{******************************************************************************
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+Register definitions and startup code for ATMEL ATmega48/88
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+
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+******************************************************************************}
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+unit atmega48fam;
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+
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+{$goto on}
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+
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+ interface
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+
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+ var
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+ PINB : byte absolute $23;
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+ DDRB : byte absolute $24;
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+ PORTB : byte absolute $25;
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+ PINC : byte absolute $26;
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+ DDRC : byte absolute $27;
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+ PORTC : byte absolute $28;
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+ PIND : byte absolute $29;
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+ DDRD : byte absolute $2A;
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+ PORTD : byte absolute $2B;
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+ TIFR0 : byte absolute $35;
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+ TIFR1 : byte absolute $36;
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+ PCIFR : byte absolute $3B;
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+ EIFR : byte absolute $3C;
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+ EIMSK : byte absolute $3D;
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+ GPIOR0 : byte absolute $3E;
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+ EECR : byte absolute $3F;
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+ EEDR : byte absolute $40;
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+ EEARL : byte absolute $41;
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+ EEARH : byte absolute $42;
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+ EEAR : word absolute $41;
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+ GTCCR : byte absolute $43;
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+ TCCR0A : byte absolute $44;
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+ TCCR0B : byte absolute $45;
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+ TCNT0 : byte absolute $46;
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+ OCR0A : byte absolute $47;
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+ OCR0B : byte absolute $48;
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+ GPIOR1 : byte absolute $4A;
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+ GPIOR2 : byte absolute $4B;
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+ SPCR : byte absolute $4C;
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+ SPSR : byte absolute $4D;
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+ SPDR : byte absolute $4E;
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+ ACSR : byte absolute $50;
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+ SMCR : byte absolute $53;
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+ MCUSR : byte absolute $54;
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+ MCUCR : byte absolute $55;
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+ SPMCSR : byte absolute $57;
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+ SPL : byte absolute $5D;
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+ SPH : byte absolute $5E;
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+ SP : word absolute $5D;
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+ SREG : byte absolute $5F;
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+ WDTCSR : byte absolute $60;
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+ CLKPR : byte absolute $61;
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+ PRR : byte absolute $64;
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+ OSCCAL : byte absolute $66;
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+ PCICR : byte absolute $68;
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+ EICRA : byte absolute $69;
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+ PCMSK0 : byte absolute $6B;
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+ PCMSK1 : byte absolute $6C;
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+ PCMSK2 : byte absolute $6D;
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+ TIMSK0 : byte absolute $6E;
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+ TIMSK1 : byte absolute $6F;
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+ TIMSK2 : byte absolute $70;
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+ ADCL : byte absolute $78;
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+ ADCH : byte absolute $79;
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+ ADC : word absolute $78;
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+ ADCSRA : byte absolute $7A;
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+ ADCSRB : byte absolute $7B;
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+ ADMUX : byte absolute $7C;
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+ DIDR0 : byte absolute $7E;
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+ DIDR1 : byte absolute $7F;
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+ TCCR1A : byte absolute $80;
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+ TCCR1B : byte absolute $81;
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+ TCCR1C : byte absolute $82;
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+ TCNT1L : byte absolute $84;
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+ TCNT1H : byte absolute $85;
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+ TCNT1 : word absolute $84;
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+ ICRL : byte absolute $86;
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+ ICR1H : byte absolute $87;
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+ OCR1AL : byte absolute $88;
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+ OCR1AH : byte absolute $89;
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+ OCR1A : word absolute $88;
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+ OCR1BL : byte absolute $8A;
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+ OCR1BH : byte absolute $8B;
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+ OCR1B : word absolute $8A;
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+ TCCR2A : byte absolute $B0;
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+ TCCR2B : byte absolute $B1;
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+ TCNT2 : byte absolute $B2;
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+ OCR2A : byte absolute $B3;
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+ OCR2B : byte absolute $B4;
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+ ASSR : byte absolute $B6;
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+ TWBR : byte absolute $B8;
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+ TWSR : byte absolute $B9;
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+ TWAR : byte absolute $BA;
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+ TWDR : byte absolute $BB;
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+ TWCR : byte absolute $BC;
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+ TWAMR : byte absolute $BD;
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+ UCSR0A : byte absolute $C0;
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+ UCSR0B : byte absolute $C1;
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+ UCSR0C : byte absolute $C2;
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+ UBRR0L : byte absolute $C4;
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+ UBRR0H : byte absolute $C5;
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+ UBRR0 : word absolute $C4;
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+ UDR0 : byte absolute $C6;
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+
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+ const
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+ { PINB }
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+ PINB7 = 7;
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+ PINB6 = 6;
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+ PINB5 = 5;
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+ PINB4 = 4;
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+ PINB3 = 3;
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+ PINB2 = 2;
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+ PINB1 = 1;
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+ PINB0 = 0;
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+
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+ { DDRB }
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+ DDB7 = 7;
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+ DDB6 = 6;
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+ DDB5 = 5;
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+ DDB4 = 4;
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+ DDB3 = 3;
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+ DDB2 = 2;
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+ DDB1 = 1;
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+ DDB0 = 0;
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+
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+ { PORTB }
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+ PORTB7 = 7;
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+ PORTB6 = 6;
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+ PORTB5 = 5;
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+ PORTB4 = 4;
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+ PORTB3 = 3;
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+ PORTB2 = 2;
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+ PORTB1 = 1;
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+ PORTB0 = 0;
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+
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+ { PINC }
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+ PINC6 = 6;
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+ PINC5 = 5;
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+ PINC4 = 4;
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+ PINC3 = 3;
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+ PINC2 = 2;
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+ PINC1 = 1;
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+ PINC0 = 0;
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+
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+ { DDRC }
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+ DDC6 = 6;
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+ DDC5 = 5;
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+ DDC4 = 4;
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+ DDC3 = 3;
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+ DDC2 = 2;
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+ DDC1 = 1;
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+ DDC0 = 0;
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+
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+ { PORTC }
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+ PORTC6 = 6;
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+ PORTC5 = 5;
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+ PORTC4 = 4;
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+ PORTC3 = 3;
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+ PORTC2 = 2;
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+ PORTC1 = 1;
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+ PORTC0 = 0;
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+
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+ { PIND }
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+ PIND7 = 7;
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+ PIND6 = 6;
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+ PIND5 = 5;
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+ PIND4 = 4;
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+ PIND3 = 3;
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+ PIND2 = 2;
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+ PIND1 = 1;
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+ PIND0 = 0;
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+
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+ { DDRD }
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+ DDD7 = 7;
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+ DDD6 = 6;
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+ DDD5 = 5;
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+ DDD4 = 4;
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+ DDD3 = 3;
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+ DDD2 = 2;
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+ DDD1 = 1;
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+ DDD0 = 0;
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+
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+ { PORTD }
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+ PORTD7 = 7;
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+ PORTD6 = 6;
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+ PORTD5 = 5;
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+ PORTD4 = 4;
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+ PORTD3 = 3;
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+ PORTD2 = 2;
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+ PORTD1 = 1;
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+ PORTD0 = 0;
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+
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+ { TIFR0 }
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+ OCF0B = 2;
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+ OCF0A = 1;
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+ TOV0 = 0;
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+
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+ { TIFR1 }
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+ ICF1 = 5;
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+ OCF1B = 2;
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+ OCF1A = 1;
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+ TOV1 = 0;
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+
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+ { PCIFR }
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+ PCIF2 = 2;
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+ PCIF1 = 1;
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+ PCIF0 = 0;
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+
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+ { EIFR }
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+ INTF1 = 1;
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+ INTF0 = 0;
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+
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+ { EIMSK }
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+ INT1 = 1;
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+ INT0 = 0;
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+
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+ { EECR }
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+ EEPM1 = 5;
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+ EEPM0 = 4;
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+ EERIE = 3;
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+ EEMPE = 2;
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+ EEPE = 1;
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+ EERE = 0;
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+
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+ { GTCCR }
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+ TSM = 7;
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+ PSRASY = 1;
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+ PSRSYNC = 0;
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+
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+ { TCCR0A }
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+ COM0A1 = 7;
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+ COM0A0 = 6;
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+ COM0B1 = 5;
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+ COM0B0 = 4;
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+ WGM01 = 1;
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+ WGM00 = 0;
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+
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+ { TCCR0B }
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+ FOC0A = 7;
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+ FOC0B = 6;
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+ WGM02 = 3;
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+ CS02 = 2;
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+ CS01 = 1;
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+ CS00 = 0;
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+
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+ { SPCR }
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+ SPIE = 7;
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+ SPE = 6;
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+ DORD = 5;
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+ MSTR = 4;
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+ CPOL = 3;
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+ CPHA = 2;
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+ SPR1 = 1;
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+ SPR0 = 0;
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+
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+ { SPSR }
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+ SPIF = 7;
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+ WCOL = 6;
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+ SPI2X = 0;
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+
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+ { ACSR }
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+ ACD = 7;
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+ ACBG = 6;
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+ ACO = 5;
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+ ACI = 4;
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+ ACIE = 3;
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+ ACIC = 2;
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+ ACIS1 = 1;
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+ ACIS0 = 0;
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+
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+ { SMCR }
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+ SM2 = 3;
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+ SM1 = 2;
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+ SM0 = 1;
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+ SE = 0;
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+
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+ { MCUSR }
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+ WDRF = 3;
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+ BORF = 2;
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+ EXTRF = 1;
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+ PORF = 0;
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+
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+ { MCUCR }
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+ PUD = 4;
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+ IVSEL = 1;
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+ IVCE = 0;
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+
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+ { SPMCSR }
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+ SPMIE = 7;
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+ RWWSB = 6;
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+ RWWSRE = 4;
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+ BLBSET = 3;
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+ PGWRT = 2;
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+ PGERS = 1;
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+ SPMEN = 0;
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+
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+ { WDTCSR }
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+ WDIF = 7;
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+ WDIE = 6;
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+ WDP3 = 5;
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+ WDCE = 4;
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+ WDE = 3;
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+ WDP2 = 2;
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+ WDP1 = 1;
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+ WDP0 = 0;
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+
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+ { CLKPR }
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+ CLKPCE = 7;
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+ CLKPS3 = 3;
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+ CLKPS2 = 2;
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+ CLKPS1 = 1;
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+ CLKPS0 = 0;
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+
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+ { PRR }
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+ PRTWI = 7;
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+ PRTIM2 = 6;
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+ PRTIM0 = 5;
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+ PRTIM1 = 3;
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+ PRSPI = 2;
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+ PRUSART0 = 1;
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+ PRADC = 0;
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+
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+ { PCICR }
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+ PCIE2 = 2;
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+ PCIE1 = 1;
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+ PCIE0 = 0;
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+
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+ { EICRA }
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+ ISC11 = 3;
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+ ISC10 = 2;
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+ ISC01 = 1;
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+ ISC00 = 0;
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+
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+ { PCMSK0 }
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+ PCINT7 = 7;
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+ PCINT6 = 6;
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+ PCINT5 = 5;
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+ PCINT4 = 4;
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+ PCINT3 = 3;
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+ PCINT2 = 2;
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+ PCINT1 = 1;
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+ PCINT0 = 0;
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+
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+ { PCMSK1 }
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+ PCINT14 = 6;
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+ PCINT13 = 5;
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+ PCINT12 = 4;
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+ PCINT11 = 3;
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+ PCINT10 = 2;
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+ PCINT9 = 1;
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+ PCINT8 = 0;
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+
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+ { PCMSK2 }
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+ PCINT23 = 7;
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+ PCINT22 = 6;
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+ PCINT21 = 5;
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+ PCINT20 = 4;
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+ PCINT19 = 3;
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+ PCINT18 = 2;
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+ PCINT17 = 1;
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+ PCINT16 = 0;
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+
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+ { TIMSK0 }
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+ OCIE0B = 2;
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+ OCIE0A = 1;
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+ TOIE0 = 0;
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+
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+ { TIMSK1 }
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+ ICIE1 = 5;
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+ OCIE1B = 2;
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+ OCIE1A = 1;
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+ TOIE1 = 0;
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+
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+ { TIMSK2 }
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+ OCIE2B = 2;
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+ OCIE2A = 1;
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+ TOIE2 = 0;
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+
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+ { ADCSRA }
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+ ADEN = 7;
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+ ADSC = 6;
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+ ADATE = 5;
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+ ADIF = 4;
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+ ADIE = 3;
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+ ADPS2 = 2;
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+ ADPS1 = 1;
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+ ADPS0 = 0;
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+
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+ { ADCSRB }
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+ ACME = 6;
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+ ADTS2 = 2;
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+ ADTS1 = 1;
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+ ADTS0 = 0;
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+
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+ { ADMUX }
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+ REFS1 = 7;
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+ REFS0 = 6;
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+ ADLAR = 5;
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+ MUX3 = 3;
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+ MUX2 = 2;
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+ MUX1 = 1;
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+ MUX0 = 0;
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+
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+ { DIDR0 }
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+ ADC5D = 5;
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+ ADC4D = 4;
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+ ADC3D = 3;
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+ ADC2D = 2;
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+ ADC1D = 1;
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+ ADC0D = 0;
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+
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+ { DIDR1 }
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+ AIN1D = 1;
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+ AIN0D = 0;
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+
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+ { TCCR1A }
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+ COM1A1 = 7;
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+ COM1A0 = 6;
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+ COM1B1 = 5;
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+ COM1B0 = 4;
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+ WGM11 = 1;
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+ WGM10 = 0;
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+
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+ { TCCR1B }
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+ ICNC1 = 7;
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+ ICES1 = 6;
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+ WGM13 = 4;
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+ WGM12 = 3;
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+ CS12 = 2;
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+ CS11 = 1;
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+ CS10 = 0;
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+
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+ { TCCR1C }
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+ FOC1A = 7;
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+ FOC1B = 6;
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+
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+ { TCCR2A }
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+ COM2A1 = 7;
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+ COM2A0 = 6;
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+ COM2B1 = 5;
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+ COM2B0 = 4;
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+ WGM21 = 1;
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+ WGM20 = 0;
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+
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+ { TCCR2B }
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+ FOC2A = 7;
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+ FOC2B = 6;
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+ WGM22 = 3;
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+ CS22 = 2;
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+ CS21 = 1;
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+ CS20 = 0;
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+
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+ { ASSR }
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+ EXCLK = 6;
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+ AS2 = 5;
|
|
|
+ TCN2UB = 4;
|
|
|
+ OCR2AUB = 3;
|
|
|
+ OCR2BUB = 2;
|
|
|
+ TCR2AUB = 1;
|
|
|
+ TCR2BUB = 0;
|
|
|
+
|
|
|
+ { TWSR }
|
|
|
+ TWS7 = 7;
|
|
|
+ TWS6 = 6;
|
|
|
+ TWS5 = 5;
|
|
|
+ TWS4 = 4;
|
|
|
+ TWS3 = 3;
|
|
|
+ TWPS1 = 1;
|
|
|
+ TWPS0 = 0;
|
|
|
+
|
|
|
+ { TWAR }
|
|
|
+ TWA6 = 7;
|
|
|
+ TWA5 = 6;
|
|
|
+ TWA4 = 5;
|
|
|
+ TWA3 = 4;
|
|
|
+ TWA2 = 3;
|
|
|
+ TWA1 = 2;
|
|
|
+ TWA0 = 1;
|
|
|
+
|
|
|
+ { TWCR }
|
|
|
+ TWINT = 7;
|
|
|
+ TWEA = 6;
|
|
|
+ TWSTA = 5;
|
|
|
+ TWSTO = 4;
|
|
|
+ TWWC = 3;
|
|
|
+ TWEN = 2;
|
|
|
+ TWIE = 0;
|
|
|
+
|
|
|
+ { TWAMR }
|
|
|
+ TWAM6 = 7;
|
|
|
+ TWAM5 = 6;
|
|
|
+ TWAM4 = 5;
|
|
|
+ TWAM3 = 4;
|
|
|
+ TWAM2 = 3;
|
|
|
+ TWAM1 = 2;
|
|
|
+ TWAM0 = 1;
|
|
|
+
|
|
|
+ { UCSR0A }
|
|
|
+ RXC0 = 7;
|
|
|
+ TXC0 = 6;
|
|
|
+ UDRE0 = 5;
|
|
|
+ FE0 = 4;
|
|
|
+ DOR0 = 3;
|
|
|
+ UPE0 = 2;
|
|
|
+ U2X0 = 1;
|
|
|
+ MPCM0 = 0;
|
|
|
+
|
|
|
+ { UCSR0B }
|
|
|
+ RXCIE0 = 7;
|
|
|
+ TXCIE0 = 6;
|
|
|
+ UDRIE0 = 5;
|
|
|
+ RXEN0 = 4;
|
|
|
+ TXEN0 = 3;
|
|
|
+ UCVSZ02 = 2;
|
|
|
+ RXB80 = 1;
|
|
|
+ TXB80 = 0;
|
|
|
+
|
|
|
+ { UCSR0C }
|
|
|
+ UMSEL01 = 7;
|
|
|
+ UMSEL00 = 6;
|
|
|
+ UPM01 = 5;
|
|
|
+ UPM00 = 4;
|
|
|
+ USBS0 = 3;
|
|
|
+ UCVSZ01 = 2;
|
|
|
+ UCVSZ00 = 1;
|
|
|
+ UCPOL0 = 0;
|
|
|
+
|
|
|
+ implementation
|
|
|
+
|
|
|
+{$define RELBRANCHES}
|
|
|
+
|
|
|
+{$i avrcommon.inc}
|
|
|
+
|
|
|
+ procedure Int00Handler; external name 'Int00Handler';
|
|
|
+ procedure Int01Handler; external name 'Int01Handler';
|
|
|
+ procedure Int02Handler; external name 'Int02Handler';
|
|
|
+ procedure Int03Handler; external name 'Int03Handler';
|
|
|
+ procedure Int04Handler; external name 'Int04Handler';
|
|
|
+ procedure Int05Handler; external name 'Int05Handler';
|
|
|
+ procedure Int06Handler; external name 'Int06Handler';
|
|
|
+ procedure Int07Handler; external name 'Int07Handler';
|
|
|
+ procedure Int08Handler; external name 'Int08Handler';
|
|
|
+ procedure Int09Handler; external name 'Int09Handler';
|
|
|
+ procedure Int10Handler; external name 'Int10Handler';
|
|
|
+ procedure Int11Handler; external name 'Int11Handler';
|
|
|
+ procedure Int12Handler; external name 'Int12Handler';
|
|
|
+ procedure Int13Handler; external name 'Int13Handler';
|
|
|
+ procedure Int14Handler; external name 'Int14Handler';
|
|
|
+ procedure Int15Handler; external name 'Int15Handler';
|
|
|
+ procedure Int16Handler; external name 'Int16Handler';
|
|
|
+ procedure Int17Handler; external name 'Int17Handler';
|
|
|
+ procedure Int18Handler; external name 'Int18Handler';
|
|
|
+ procedure Int19Handler; external name 'Int19Handler';
|
|
|
+ procedure Int20Handler; external name 'Int20Handler';
|
|
|
+ procedure Int21Handler; external name 'Int21Handler';
|
|
|
+ procedure Int22Handler; external name 'Int22Handler';
|
|
|
+ procedure Int23Handler; external name 'Int23Handler';
|
|
|
+ procedure Int24Handler; external name 'Int24Handler';
|
|
|
+ procedure Int25Handler; external name 'Int25Handler';
|
|
|
+ procedure Int26Handler; external name 'Int26Handler';
|
|
|
+ procedure Int27Handler; external name 'Int27Handler';
|
|
|
+ procedure Int28Handler; external name 'Int28Handler';
|
|
|
+ procedure Int29Handler; external name 'Int29Handler';
|
|
|
+ procedure Int30Handler; external name 'Int30Handler';
|
|
|
+ procedure Int31Handler; external name 'Int31Handler';
|
|
|
+ procedure Int32Handler; external name 'Int32Handler';
|
|
|
+ procedure Int33Handler; external name 'Int33Handler';
|
|
|
+ procedure Int34Handler; external name 'Int34Handler';
|
|
|
+
|
|
|
+ procedure _FPC_start; assembler; nostackframe;
|
|
|
+ label
|
|
|
+ _start;
|
|
|
+ asm
|
|
|
+ .init
|
|
|
+ .globl _start
|
|
|
+
|
|
|
+ rjmp _start
|
|
|
+ rjmp Int00Handler
|
|
|
+ rjmp Int01Handler
|
|
|
+ rjmp Int02Handler
|
|
|
+ rjmp Int03Handler
|
|
|
+ rjmp Int04Handler
|
|
|
+ rjmp Int05Handler
|
|
|
+ rjmp Int06Handler
|
|
|
+ rjmp Int07Handler
|
|
|
+ rjmp Int08Handler
|
|
|
+ rjmp Int09Handler
|
|
|
+ rjmp Int10Handler
|
|
|
+ rjmp Int11Handler
|
|
|
+ rjmp Int12Handler
|
|
|
+ rjmp Int13Handler
|
|
|
+ rjmp Int14Handler
|
|
|
+ rjmp Int15Handler
|
|
|
+ rjmp Int16Handler
|
|
|
+ rjmp Int17Handler
|
|
|
+ rjmp Int18Handler
|
|
|
+ rjmp Int19Handler
|
|
|
+ rjmp Int20Handler
|
|
|
+ rjmp Int21Handler
|
|
|
+ rjmp Int22Handler
|
|
|
+ rjmp Int23Handler
|
|
|
+ rjmp Int24Handler
|
|
|
+ rjmp Int25Handler
|
|
|
+
|
|
|
+ {
|
|
|
+ all ATMEL MCUs use the same startup code, the details are
|
|
|
+ governed by defines
|
|
|
+ }
|
|
|
+ {$i start.inc}
|
|
|
+
|
|
|
+ .weak Int00Handler
|
|
|
+ .weak Int01Handler
|
|
|
+ .weak Int02Handler
|
|
|
+ .weak Int03Handler
|
|
|
+ .weak Int04Handler
|
|
|
+ .weak Int05Handler
|
|
|
+ .weak Int06Handler
|
|
|
+ .weak Int07Handler
|
|
|
+ .weak Int08Handler
|
|
|
+ .weak Int09Handler
|
|
|
+ .weak Int10Handler
|
|
|
+ .weak Int11Handler
|
|
|
+ .weak Int12Handler
|
|
|
+ .weak Int13Handler
|
|
|
+ .weak Int14Handler
|
|
|
+ .weak Int15Handler
|
|
|
+ .weak Int16Handler
|
|
|
+ .weak Int17Handler
|
|
|
+ .weak Int18Handler
|
|
|
+ .weak Int19Handler
|
|
|
+ .weak Int20Handler
|
|
|
+ .weak Int21Handler
|
|
|
+ .weak Int22Handler
|
|
|
+ .weak Int23Handler
|
|
|
+ .weak Int24Handler
|
|
|
+ .weak Int25Handler
|
|
|
+
|
|
|
+ .set Int00Handler, Default_IRQ_handler
|
|
|
+ .set Int01Handler, Default_IRQ_handler
|
|
|
+ .set Int02Handler, Default_IRQ_handler
|
|
|
+ .set Int03Handler, Default_IRQ_handler
|
|
|
+ .set Int04Handler, Default_IRQ_handler
|
|
|
+ .set Int05Handler, Default_IRQ_handler
|
|
|
+ .set Int06Handler, Default_IRQ_handler
|
|
|
+ .set Int07Handler, Default_IRQ_handler
|
|
|
+ .set Int08Handler, Default_IRQ_handler
|
|
|
+ .set Int09Handler, Default_IRQ_handler
|
|
|
+ .set Int10Handler, Default_IRQ_handler
|
|
|
+ .set Int11Handler, Default_IRQ_handler
|
|
|
+ .set Int12Handler, Default_IRQ_handler
|
|
|
+ .set Int13Handler, Default_IRQ_handler
|
|
|
+ .set Int14Handler, Default_IRQ_handler
|
|
|
+ .set Int15Handler, Default_IRQ_handler
|
|
|
+ .set Int16Handler, Default_IRQ_handler
|
|
|
+ .set Int17Handler, Default_IRQ_handler
|
|
|
+ .set Int18Handler, Default_IRQ_handler
|
|
|
+ .set Int19Handler, Default_IRQ_handler
|
|
|
+ .set Int20Handler, Default_IRQ_handler
|
|
|
+ .set Int21Handler, Default_IRQ_handler
|
|
|
+ .set Int22Handler, Default_IRQ_handler
|
|
|
+ .set Int23Handler, Default_IRQ_handler
|
|
|
+ .set Int24Handler, Default_IRQ_handler
|
|
|
+ .set Int25Handler, Default_IRQ_handler
|
|
|
+ end;
|
|
|
+
|
|
|
+end.
|
florian