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* arm assembler instructions can have 4 operands
* qword comparisations fixed

florian 21 ani în urmă
părinte
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1280635cc4
2 a modificat fișierele cu 13 adăugiri și 5 ștergeri
  1. 6 2
      compiler/arm/cpubase.pas
  2. 7 3
      compiler/arm/narmadd.pas

+ 6 - 2
compiler/arm/cpubase.pas

@@ -314,7 +314,7 @@ unit cpubase;
 *****************************************************************************}
 *****************************************************************************}
 
 
     const
     const
-      max_operands = 3;
+      max_operands = 4;
 
 
       {# Constant defining possibly all registers which might require saving }
       {# Constant defining possibly all registers which might require saving }
       ALL_OTHERREGISTERS = [];
       ALL_OTHERREGISTERS = [];
@@ -570,7 +570,11 @@ unit cpubase;
 end.
 end.
 {
 {
   $Log$
   $Log$
-  Revision 1.28  2004-03-13 18:45:40  florian
+  Revision 1.29  2004-03-23 21:03:50  florian
+    * arm assembler instructions can have 4 operands
+    * qword comparisations fixed
+
+  Revision 1.28  2004/03/13 18:45:40  florian
     * floating compares fixed
     * floating compares fixed
     * unary minus for floats fixed
     * unary minus for floats fixed
 
 

+ 7 - 3
compiler/arm/narmadd.pas

@@ -261,8 +261,8 @@ interface
         { operation requiring proper N, Z and C flags ? }
         { operation requiring proper N, Z and C flags ? }
         if unsigned or (nodetype in [equaln,unequaln]) then
         if unsigned or (nodetype in [equaln,unequaln]) then
           begin
           begin
-            exprasmlist.concat(taicpu.op_reg_reg(A_CMP,left.location.register64.reglo,right.location.register64.reglo));
-            exprasmlist.concat(setcondition(taicpu.op_reg_reg(A_CMP,left.location.register64.reghi,right.location.register64.reghi),C_EQ));
+            exprasmlist.concat(taicpu.op_reg_reg(A_CMP,left.location.register64.reghi,right.location.register64.reghi));
+            exprasmlist.concat(setcondition(taicpu.op_reg_reg(A_CMP,left.location.register64.reglo,right.location.register64.reglo),C_EQ));
           end
           end
         { operation requiring proper N, V and C flags ? }
         { operation requiring proper N, V and C flags ? }
         else if nodetype in [gten,ltn] then
         else if nodetype in [gten,ltn] then
@@ -343,7 +343,11 @@ begin
 end.
 end.
 {
 {
   $Log$
   $Log$
-  Revision 1.13  2004-03-13 18:45:40  florian
+  Revision 1.14  2004-03-23 21:03:50  florian
+    * arm assembler instructions can have 4 operands
+    * qword comparisations fixed
+
+  Revision 1.13  2004/03/13 18:45:40  florian
     * floating compares fixed
     * floating compares fixed
     * unary minus for floats fixed
     * unary minus for floats fixed