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Fixed invalid peephole optimization of ADD/SUB(SP) instructions for ARMv7*M targets.

git-svn-id: trunk@26612 -
Jeppe Johansen 11 years ago
parent
commit
184baa3f99
1 changed files with 2 additions and 0 deletions
  1. 2 0
      compiler/arm/aoptcpu.pas

+ 2 - 0
compiler/arm/aoptcpu.pas

@@ -2824,6 +2824,8 @@ Implementation
           else if MatchInstruction(p, [A_ADD,A_SUB], [C_None], [PF_None]) and
           else if MatchInstruction(p, [A_ADD,A_SUB], [C_None], [PF_None]) and
             (taicpu(p).ops = 2) and
             (taicpu(p).ops = 2) and
             (taicpu(p).oper[1]^.typ=top_reg) and
             (taicpu(p).oper[1]^.typ=top_reg) and
+            (not MatchOperand(taicpu(p).oper[0]^, NR_STACK_POINTER_REG)) and
+            (not MatchOperand(taicpu(p).oper[1]^, NR_STACK_POINTER_REG)) and
             (not RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs)) then
             (not RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs)) then
             begin
             begin
               DebugMsg('Peephole AddSub2*s done', p);
               DebugMsg('Peephole AddSub2*s done', p);