* arm is working again as before the new register naming scheme was implemented

compiler/arm/agarmgas.pas

@@ -84,11 +84,11 @@ unit agarmgas;
             inc(offset,offsetfixup);
 
 {$ifdef extdebug}
-            if base=NR_NO then
-              internalerror(200308292);
+            // if base=NR_NO then
+            //   internalerror(200308292);
 
-            if ((index<>NR_NO) or (shiftmode<>SM_None)) and ((offset<>0) or (symbol<>nil)) then
-              internalerror(200308293);
+            // if ((index<>NR_NO) or (shiftmode<>SM_None)) and ((offset<>0) or (symbol<>nil)) then
+            //   internalerror(200308293);
 {$endif extdebug}
 
             if assigned(symbol) then
@@ -117,7 +117,10 @@ unit agarmgas;
 
                      if shiftmode<>SM_None then
                        s:=s+' ,'+gas_shiftmode2str[shiftmode]+' #'+tostr(shiftimm);
-                  end;
+                  end
+                else if offset<>0 then
+                  s:=s+', #'+tostr(offset);
+
                 case addressmode of
                   AM_OFFSET:
                     s:=s+']';
@@ -213,7 +216,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.9  2003-09-04 00:15:29  florian
+  Revision 1.10  2003-09-05 23:57:01  florian
+    * arm is working again as before the new register naming scheme was implemented
+
+  Revision 1.9  2003/09/04 00:15:29  florian
     * first bunch of adaptions of arm compiler for new register type
 
   Revision 1.8  2003/09/03 19:10:30  florian

compiler/arm/cgcpu.pas

@@ -694,8 +694,6 @@ unit cgcpu;
 
 
     procedure tcgarm.g_stackframe_entry(list : taasmoutput;localsize : longint);
-      var
-        rip,rsp,rfp : tregister;
       begin
         LocalSize:=align(LocalSize,4);
 
@@ -705,7 +703,7 @@ unit cgcpu;
 
         list.concat(taicpu.op_reg_reg(A_MOV,NR_R12,NR_STACK_POINTER_REG));
         { restore int registers and return }
-        list.concat(setoppostfix(taicpu.op_reg_regset(A_STM,rsp,rg.used_in_proc_int-[RS_R0..RS_R3]+[RS_R11,RS_R12,RS_R15]),PF_FD));
+        list.concat(setoppostfix(taicpu.op_reg_regset(A_STM,NR_STACK_POINTER_REG,rg.used_in_proc_int-[RS_R0..RS_R3]+[RS_R11,RS_R12,RS_R15]),PF_FD));
 
         list.concat(taicpu.op_reg_reg_const(A_SUB,NR_FRAME_POINTER_REG,NR_R12,4));
         a_reg_alloc(list,NR_R12);
@@ -800,7 +798,7 @@ unit cgcpu;
             if ref.index<>NR_NO then
               begin
                 list.concat(taicpu.op_reg_reg_reg(A_ADD,tmpreg,ref.base,tmpreg));
-                rg.ungetregister(list,ref.base);
+                rg.ungetregisterint(list,ref.base);
                 ref.base:=tmpreg;
               end
             else
@@ -818,7 +816,6 @@ unit cgcpu;
       end;
 
 
-
     procedure tcgarm.g_concatcopy(list : taasmoutput;const source,dest : treference;len : aword; delsource,loadref : boolean);
       var
         srcref,dstref:treference;
@@ -1085,7 +1082,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.14  2003-09-04 21:07:03  florian
+  Revision 1.15  2003-09-05 23:57:01  florian
+    * arm is working again as before the new register naming scheme was implemented
+
+  Revision 1.14  2003/09/04 21:07:03  florian
     * ARM compiler compiles again
 
   Revision 1.13  2003/09/04 00:15:29  florian

compiler/arm/cpubase.pas

@@ -84,31 +84,10 @@ unit cpubase;
       tregisterindex=0..{$i rarmnor.inc}-1;
 
     const
-      { Super registers: }
-      RS_NONE=$00;
-      RS_R0 = $01;  RS_R1 = $02; RS_R2 = $03;
-      RS_R3 = $04;  RS_R4 = $05; RS_R5 = $06;
-      RS_R6 = $07;  RS_R7 = $08; RS_R8 = $09;
-      RS_R9 = $0A;  RS_R10 = $0B; RS_R11 = $0C;
-      RS_R12 = $0D; RS_R13 = $0E; RS_R14 = $0F;
-      RS_R15 = $10;
-      RS_PC = RS_R15;
+      { Available Superregisters }
+      {$i rarmsup.inc}
 
-      RS_F0=$00;
-      RS_F1=$01;
-      RS_F2=$02;
-      RS_F3=$03;
-      RS_F4=$04;
-      RS_F5=$05;
-      RS_F6=$06;
-      RS_F7=$07;
-
-      RS_D0 = $01;  RS_D1 = $02; RS_D2 = $03;
-      RS_D3 = $04;  RS_D4 = $05; RS_D5 = $06;
-      RS_D6 = $07;  RS_D7 = $08; RS_D8 = $09;
-      RS_D9 = $0A;  RS_D10 = $0B; RS_D11 = $0C;
-      RS_D12 = $0D; RS_D13 = $0E; RS_D14 = $0F;
-      RS_D15 = $10;
+      RS_PC = RS_R15;
 
       { No Subregisters }
       R_SUBWHOLE = R_SUBNONE;
@@ -121,7 +100,7 @@ unit cpubase;
 
       { Integer Super registers first and last }
 {$warning Supreg shall be $00-$1f}
-      first_int_supreg = RS_R3;
+      first_int_supreg = RS_R0;
       last_int_supreg = RS_R15;
 
       first_int_imreg = $20;
@@ -537,6 +516,7 @@ unit cpubase;
 
     function cgsize2subreg(s:Tcgsize):Tsubregister;
       begin
+        cgsize2subreg:=R_SUBWHOLE;
       end;
 
 
@@ -549,7 +529,12 @@ unit cpubase;
 
 
     procedure inverse_flags(var f: TResFlags);
+      const
+        inv_flags: array[TResFlags] of TResFlags =
+          (F_NE,F_NE,F_CC,F_CS,F_PL,F_MI,F_VC,F_VS,F_LS,F_HI,
+          F_LT,F_GE,F_LE,F_GT);
       begin
+        f:=inv_flags[f];
       end;
 
 
@@ -635,7 +620,10 @@ unit cpubase;
 end.
 {
   $Log$
-  Revision 1.13  2003-09-04 21:07:03  florian
+  Revision 1.14  2003-09-05 23:57:01  florian
+    * arm is working again as before the new register naming scheme was implemented
+
+  Revision 1.13  2003/09/04 21:07:03  florian
     * ARM compiler compiles again
 
   Revision 1.12  2003/09/04 00:15:29  florian

compiler/arm/cpupara.pas

@@ -180,8 +180,8 @@ unit cpupara;
            if nextintreg<=NR_R3 then
              begin
                 paraloc.loc:=LOC_REGISTER;
-                paraloc.register:=nextintreg;
-                inc(nextintreg,NR_R1-NR_R0);
+                paraloc.register:=newreg(R_INTREGISTER,nextintreg,R_SUBWHOLE);;
+                inc(nextintreg);
              end
            else
               begin
@@ -234,10 +234,10 @@ unit cpupara;
                            paraloc.loc:=LOC_REGISTER;
 		           if is_64bit then
                              begin
-                               paraloc.registerhigh:=nextintreg;
+                               paraloc.registerhigh:=newreg(R_INTREGISTER,nextintreg,R_SUBWHOLE);;
                                inc(nextintreg);
                              end;
-                           paraloc.registerlow:=nextintreg;
+                           paraloc.registerlow:=newreg(R_INTREGISTER,nextintreg,R_SUBWHOLE);;
                            inc(nextintreg);
                         end
                       else
@@ -328,7 +328,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.4  2003-09-04 00:15:29  florian
+  Revision 1.5  2003-09-05 23:57:01  florian
+    * arm is working again as before the new register naming scheme was implemented
+
+  Revision 1.4  2003/09/04 00:15:29  florian
     * first bunch of adaptions of arm compiler for new register type
 
   Revision 1.3  2003/08/27 00:27:56  florian