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Disable 64bit shifts for thumb2 - Fix for Mantis #22520

In r21686 I've introduced optimized 64bit shifts for ARM. But the
methods did not check for which machine it has to generate the code.

This patch disables the optimized code for now if the target is in
cpu_thumb2 and falls back to the generic code.

There are 2 problems with the current code:

1.) Thumb-2 does not support shift by register on all data instruction
as ARM does.
2.) The code does not generate the required IT-block for the conditional
executed code.

git-svn-id: trunk@21997 -
masta 13 years ago
parent
commit
1c51b8d906
1 changed files with 10 additions and 1 deletions
  1. 10 1
      compiler/arm/narmmat.pas

+ 10 - 1
compiler/arm/narmmat.pas

@@ -356,7 +356,10 @@ implementation
 
 
     function tarmshlshrnode.first_shlshr64bitint: tnode;
     function tarmshlshrnode.first_shlshr64bitint: tnode;
       begin
       begin
-        result := nil;
+        if (current_settings.cputype in cpu_thumb2) then
+          result:=inherited
+        else
+          result := nil;
       end;
       end;
 
 
     procedure tarmshlshrnode.second_64bit;
     procedure tarmshlshrnode.second_64bit;
@@ -423,6 +426,12 @@ implementation
         end;
         end;
 
 
       begin
       begin
+        if (current_settings.cputype in cpu_thumb2) then
+        begin
+          inherited;
+          exit;
+        end;
+
         location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
         location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
 
 
         { load left operator in a register }
         { load left operator in a register }