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@@ -0,0 +1,782 @@
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+{
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+ $Id$
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+ Copyright (c) 2000-2002 by the FPC development team
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+
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+ Code generation for add nodes (generic version)
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+
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+ This program is free software; you can redistribute it and/or modify
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+ it under the terms of the GNU General Public License as published by
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+ the Free Software Foundation; either version 2 of the License, or
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+ (at your option) any later version.
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+
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+ This program is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ GNU General Public License for more details.
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+
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+ You should have received a copy of the GNU General Public License
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+ along with this program; if not, write to the Free Software
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+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+
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+ ****************************************************************************
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+}
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+unit ncgcadd;
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+
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+{$i fpcdefs.inc}
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+
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+interface
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+
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+ uses
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+ node,nadd,cpubase,cginfo;
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+
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+ type
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+ tppcaddnode = class(taddnode)
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+ function pass_1: tnode; override;
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+ procedure pass_2;override;
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+ private
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+ procedure pass_left_and_right;
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+ procedure load_left_right(cmpop, load_constants: boolean);
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+ procedure clear_left_right(cmpop: boolean);
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+ function getresflags : tresflags;
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+ procedure emit_compare(unsigned : boolean);
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+ procedure second_addfloat;
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+ procedure second_addboolean;
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+ procedure second_addsmallset;
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+ procedure second_add64bit; { done }
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+ end;
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+
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+ implementation
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+
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+ uses
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+ globtype,systems,
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+ cutils,verbose,globals,
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+ symconst,symdef,paramgr,
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+ aasmbase,aasmtai,aasmcpu,defutil,htypechk,
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+ cgbase,cpuinfo,pass_1,pass_2,regvars,
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+ cpupara,
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+ ncon,nset,
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+ cga,ncgutil,tgobj,rgobj,rgcpu,cgobj,cg64f32;
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+
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+
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+
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+{*****************************************************************************
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+ Helpers
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+*****************************************************************************}
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+
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+ function tcgaddnode.getresflags(unsigned : boolean) : tresflags;
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+ begin
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+ case nodetype of
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+ equaln : getresflags:=F_E;
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+ unequaln : getresflags:=F_NE;
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+ else
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+ if not(unsigned) then
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+ begin
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+ if nf_swaped in flags then
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+ case nodetype of
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+ ltn : getresflags:=F_G;
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+ lten : getresflags:=F_GE;
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+ gtn : getresflags:=F_L;
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+ gten : getresflags:=F_LE;
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+ end
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+ else
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+ case nodetype of
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+ ltn : getresflags:=F_L;
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+ lten : getresflags:=F_LE;
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+ gtn : getresflags:=F_G;
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+ gten : getresflags:=F_GE;
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+ end;
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+ end
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+ else
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+ begin
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+ if nf_swaped in flags then
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+ case nodetype of
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+ ltn : getresflags:=F_A;
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+ lten : getresflags:=F_AE;
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+ gtn : getresflags:=F_B;
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+ gten : getresflags:=F_BE;
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+ end
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+ else
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+ case nodetype of
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+ ltn : getresflags:=F_B;
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+ lten : getresflags:=F_BE;
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+ gtn : getresflags:=F_A;
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+ gten : getresflags:=F_AE;
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+ end;
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+ end;
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+ end;
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+ end;
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+
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+
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+ procedure tcgaddnode.pass_left_and_right;
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+ var
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+ pushedregs : tmaybesave;
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+ tmpreg : tregister;
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+ pushedfpu : boolean;
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+ begin
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+ { calculate the operator which is more difficult }
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+ firstcomplex(self);
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+
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+ { in case of constant put it to the left }
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+ if (left.nodetype=ordconstn) then
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+ swapleftright;
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+
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+ secondpass(left);
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+
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+ { are too few registers free? }
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+ maybe_save(exprasmlist,right.registers32,left.location,pushedregs);
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+ if location.loc=LOC_FPUREGISTER then
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+ pushedfpu:=maybe_pushfpu(exprasmlist,right.registersfpu,left.location)
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+ else
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+ pushedfpu:=false;
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+ secondpass(right);
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+ maybe_restore(exprasmlist,left.location,pushedregs);
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+ if pushedfpu then
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+ begin
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+ tmpreg := rg.getregisterfpu(exprasmlist);
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+ cg.a_loadfpu_loc_reg(exprasmlist,left.location,tmpreg);
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+ location_reset(left.location,LOC_FPUREGISTER,left.location.size);
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+ left.location.register := tmpreg;
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+ end;
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+ end;
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+
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+
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+ procedure tcgaddnode.load_left_right(cmpop, load_constants: boolean);
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+
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+ procedure load_node(var n: tnode);
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+ begin
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+ case n.location.loc of
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+ LOC_REGISTER:
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+ if not cmpop then
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+ begin
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+ location.register := n.location.register;
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+ if is_64bitint(n.resulttype.def) then
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+ location.registerhigh := n.location.registerhigh;
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+ end;
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+ LOC_REFERENCE,LOC_CREFERENCE:
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+ begin
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+ location_force_reg(exprasmlist,n.location,def_cgsize(n.resulttype.def),false);
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+ if not cmpop then
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+ begin
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+ location.register := n.location.register;
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+ if is_64bitint(n.resulttype.def) then
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+ location.registerhigh := n.location.registerhigh;
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+ end;
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+ end;
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+ LOC_CONSTANT:
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+ begin
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+ if load_constants then
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+ begin
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+ location_force_reg(exprasmlist,n.location,def_cgsize(n.resulttype.def),false);
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+ if not cmpop then
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+ location.register := n.location.register;
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+ if is_64bitint(n.resulttype.def) then
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+ location.registerhigh := n.location.registerhigh;
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+ end;
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+ end;
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+ end;
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+ end;
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+
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+ begin
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+ load_node(left);
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+ load_node(right);
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+ end;
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+
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+
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+{*****************************************************************************
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+ AddSmallSet
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+*****************************************************************************}
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+ procedure tppcaddnode.second_opsmallset;
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+ var
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+ cmpop : boolean;
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+ begin
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+ cmpop := false;
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+ pass_left_and_right;
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+
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+ { when a setdef is passed, it has to be a smallset }
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+ if ((left.resulttype.def.deftype=setdef) and
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+ (tsetdef(left.resulttype.def).settype<>smallset)) or
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+ ((right.resulttype.def.deftype=setdef) and
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+ (tsetdef(right.resulttype.def).settype<>smallset)) then
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+ internalerror(200203301);
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+
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+ if nodetype in [equaln,unequaln,gtn,gten,lte,lten] then
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+ cmpop := true;
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+
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+ load_left_right(cmpop,false);
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+
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+ if cmpop then
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+ second_cmpsmallset
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+ else
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+ second_addsmallset;
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+
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+ clear_left_right(cmpop);
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+ end;
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+
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+
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+ procedure tcgaddnode.second_cmpsmallset;
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+ begin
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+ location_reset(location,LOC_FLAGS,OS_NO);
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+
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+ case nodetype of
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+ equaln,
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+ unequaln :
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+ begin
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+ {emit_compare(true);}
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+ end;
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+ lten,gten:
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+ begin
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+(*
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+ If (not(nf_swaped in flags) and
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+ (nodetype = lten)) or
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+ ((nf_swaped in flags) and
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+ (nodetype = gten)) then
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+ swapleftright;
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+ // now we have to check whether left >= right
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+ tmpreg := cg.get_scratch_reg_int(exprasmlist);
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+ if left.location.loc = LOC_CONSTANT then
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+ begin
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+ cg.a_op_const_reg_reg(exprasmlist,OP_AND,OS_INT,
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+ not(left.location.value),right.location.register,tmpreg);
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+ exprasmlist.concat(taicpu.op_reg_const(A_CMPWI,tmpreg,0));
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+ // the two instructions above should be folded together by
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+ // the peepholeoptimizer
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+ end
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+ else
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+ begin
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+ if right.location.loc = LOC_CONSTANT then
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+ begin
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+ cg.a_load_const_reg(exprasmlist,OS_INT,
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+ aword(right.location.value),tmpreg);
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+ exprasmlist.concat(taicpu.op_reg_reg_reg(A_ANDC_,tmpreg,
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+ tmpreg,left.location.register));
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+ end
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+ else
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+ exprasmlist.concat(taicpu.op_reg_reg_reg(A_ANDC_,tmpreg,
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+ right.location.register,left.location.register));
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+ end;
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+ cg.free_scratch_reg(exprasmlist,tmpreg);
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+ location.resflags.cr := R_CR0;
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+ location.resflags.flag := F_EQ;
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+ opdone := true;*)
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+ end;
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+ else
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+ internalerror(2002072701);
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+ end;
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+
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+
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+ end;
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+
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+
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+ procedure tppcaddnode.second_addsmallset;
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+ var
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+ cgop : TOpCg;
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+ tmpreg : tregister;
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+ opdone,
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+ cmpop : boolean;
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+ begin
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+
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+
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+ opdone := false;
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+
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+ location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def))
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+
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+ if (location.register = R_NO) then
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+ location.register := rg.getregisterint(exprasmlist);
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+
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+ case nodetype of
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+ addn :
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+ begin
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+ if (nf_swaped in flags) and (left.nodetype=setelementn) then
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+ swapleftright;
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+ { are we adding set elements ? }
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+ if right.nodetype=setelementn then
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+ begin
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+ { no range support for smallsets! }
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+ if assigned(tsetelementnode(right).right) then
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+ internalerror(43244);
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+ if (right.location.loc = LOC_CONSTANT) then
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+ cg.a_op_const_reg_reg(exprasmlist,OP_OR,OS_INT,
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+ aword(1 shl aword(right.location.value)),
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+ left.location.register,location.register)
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+ else
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+ begin
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+ tmpreg := cg.get_scratch_reg_int(exprasmlist);
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+ cg.a_load_const_reg(exprasmlist,OS_INT,1,tmpreg);
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+ cg.a_op_reg_reg(exprasmlist,OP_SHL,OS_INT,
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+ right.location.register,tmpreg);
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+ if left.location.loc <> LOC_CONSTANT then
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+ cg.a_op_reg_reg_reg(exprasmlist,OP_OR,OS_INT,tmpreg,
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+ left.location.register,location.register)
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+ else
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+ cg.a_op_const_reg_reg(exprasmlist,OP_OR,OS_INT,
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+ aword(left.location.value),tmpreg,location.register);
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+ cg.free_scratch_reg(exprasmlist,tmpreg);
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+ end;
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+ opdone := true;
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+ end
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+ else
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+ cgop := OP_OR;
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+ end;
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+ symdifn :
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+ cgop:=OP_XOR;
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+ muln :
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+ cgop:=OP_AND;
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+ subn :
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+ begin
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+ cgop:=OP_AND;
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+ if (not(nf_swaped in flags)) then
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+ if (right.location.loc=LOC_CONSTANT) then
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+ right.location.value := not(right.location.value)
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+ else
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+ opdone := true
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+ else if (left.location.loc=LOC_CONSTANT) then
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+ left.location.value := not(left.location.value)
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+ else
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+ begin
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+ swapleftright;
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+ opdone := true;
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+ end;
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+ if opdone then
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+ begin
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+ if left.location.loc = LOC_CONSTANT then
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+ begin
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+ tmpreg := cg.get_scratch_reg_int(exprasmlist);
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+ cg.a_load_const_reg(exprasmlist,OS_INT,
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+ aword(left.location.value),tmpreg);
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+ cg.a_op_reg(OP_NOT,OS_INT,right.location.register);
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+ cg.a_op_reg_reg(OP_AND,OS_INT,right.location.register,tmpreg);
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+ cg.a_load_reg_reg(OS_INT,tmpreg,location.register);
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+ cg.free_scratch_reg(exprasmlist,tmpreg);
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+ end
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+ else
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+ begin
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+ cg.a_op_reg(OP_NOT,OS_INT,right.location.register);
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+ cg.a_op_reg_reg(OP_AND,OS_INT,right.location.register,left.location.register);
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+ cg.a_load_reg_reg(OS_INT,left.location.register,location.register);
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+ end;
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+ end;
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+ end;
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+ else
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+ internalerror(2002072701);
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+ end;
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+
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+ if not opdone then
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+ begin
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+ // these are all commutative operations
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+ if (left.location.loc = LOC_CONSTANT) then
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+ swapleftright;
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+ if (right.location.loc = LOC_CONSTANT) then
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+ cg.a_op_const_reg_reg(exprasmlist,cgop,OS_INT,
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+ aword(right.location.value),left.location.register,
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+ location.register)
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+ else
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+ cg.a_op_reg_reg_reg(exprasmlist,cgop,OS_INT,
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+ right.location.register,left.location.register,
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+ location.register);
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+ end;
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+
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+ end;
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+
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+{*****************************************************************************
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+ AddBoolean
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+*****************************************************************************}
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+
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+ procedure tppcaddnode.second_opboolean
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+ begin
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+ { calculate the operator which is more difficult }
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+ firstcomplex(self);
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+
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+ end;
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+
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+ procedure tppcaddnode.second_cmpboolean;
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+ begin
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+ end;
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+
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+ procedure tppcaddnode.second_addboolean;
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+ var
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+ cgop : TOpCg;
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+ cgsize : TCgSize;
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+ cmpop,
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+ isjump : boolean;
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+ otl,ofl : tasmlabel;
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+ pushedregs : tmaybesave;
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+ begin
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+
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+ cmpop:=false;
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+ if (torddef(left.resulttype.def).typ=bool8bit) or
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+ (torddef(right.resulttype.def).typ=bool8bit) then
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+ cgsize:=OS_8
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+ else
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+ if (torddef(left.resulttype.def).typ=bool16bit) or
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+ (torddef(right.resulttype.def).typ=bool16bit) then
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+ cgsize:=OS_16
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+ else
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+ cgsize:=OS_32;
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+(*
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+ if (cs_full_boolean_eval in aktlocalswitches) or
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+ (nodetype in [unequaln,ltn,lten,gtn,gten,equaln,xorn]) then
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+ begin
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+ if left.nodetype in [ordconstn,realconstn] then
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+ swapleftright;
|
|
|
+
|
|
|
+ isjump:=(left.location.loc=LOC_JUMP);
|
|
|
+ if isjump then
|
|
|
+ begin
|
|
|
+ otl:=truelabel;
|
|
|
+ objectlibrary.getlabel(truelabel);
|
|
|
+ ofl:=falselabel;
|
|
|
+ objectlibrary.getlabel(falselabel);
|
|
|
+ end;
|
|
|
+ secondpass(left);
|
|
|
+ if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
|
|
|
+ location_force_reg(exprasmlist,left.location,cgsize,false);
|
|
|
+ if isjump then
|
|
|
+ begin
|
|
|
+ truelabel:=otl;
|
|
|
+ falselabel:=ofl;
|
|
|
+ end;
|
|
|
+
|
|
|
+ maybe_save(exprasmlist,right.registers32,left.location,pushedregs);
|
|
|
+ isjump:=(right.location.loc=LOC_JUMP);
|
|
|
+ if isjump then
|
|
|
+ begin
|
|
|
+ otl:=truelabel;
|
|
|
+ objectlibrary.getlabel(truelabel);
|
|
|
+ ofl:=falselabel;
|
|
|
+ objectlibrary.getlabel(falselabel);
|
|
|
+ end;
|
|
|
+ secondpass(right);
|
|
|
+ maybe_restore(exprasmlist,left.location,pushedregs);
|
|
|
+ if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
|
|
|
+ location_force_reg(exprasmlist,right.location,cgsize,false);
|
|
|
+ if isjump then
|
|
|
+ begin
|
|
|
+ truelabel:=otl;
|
|
|
+ falselabel:=ofl;
|
|
|
+ end;
|
|
|
+
|
|
|
+ cmpop := nodetype in [ltn,lten,gtn,gten,equaln,unequaln];
|
|
|
+
|
|
|
+ { set result location }
|
|
|
+ if not cmpop then
|
|
|
+ location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def))
|
|
|
+ else
|
|
|
+ location_reset(location,LOC_FLAGS,OS_NO);
|
|
|
+
|
|
|
+ load_left_right(cmpop,false);
|
|
|
+
|
|
|
+ if (left.location.loc = LOC_CONSTANT) then
|
|
|
+ swapleftright;
|
|
|
+
|
|
|
+ { compare the }
|
|
|
+ case nodetype of
|
|
|
+ ltn,lten,gtn,gten,
|
|
|
+ equaln,unequaln :
|
|
|
+ begin
|
|
|
+ if (right.location.loc <> LOC_CONSTANT) then
|
|
|
+ exprasmlist.concat(taicpu.op_reg_reg(A_CMPLW,
|
|
|
+ left.location.register,right.location.register))
|
|
|
+ else
|
|
|
+ exprasmlist.concat(taicpu.op_reg_const(A_CMPLWI,
|
|
|
+ left.location.register,longint(right.location.value)));
|
|
|
+ location.resflags := getresflags;
|
|
|
+ end;
|
|
|
+ else
|
|
|
+ begin
|
|
|
+ case nodetype of
|
|
|
+ xorn :
|
|
|
+ cgop:=OP_XOR;
|
|
|
+ orn :
|
|
|
+ cgop:=OP_OR;
|
|
|
+ andn :
|
|
|
+ cgop:=OP_AND;
|
|
|
+ else
|
|
|
+ internalerror(200203247);
|
|
|
+ end;
|
|
|
+
|
|
|
+ if right.location.loc <> LOC_CONSTANT then
|
|
|
+ cg.a_op_reg_reg_reg(exprasmlist,cgop,OS_INT,
|
|
|
+ left.location.register,right.location.register,
|
|
|
+ location.register)
|
|
|
+ else
|
|
|
+ cg.a_op_const_reg_reg(exprasmlist,cgop,OS_INT,
|
|
|
+ aword(right.location.value),left.location.register,
|
|
|
+ location.register);
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+ end
|
|
|
+ else
|
|
|
+ begin
|
|
|
+ // just to make sure we free the right registers
|
|
|
+ cmpop := true;
|
|
|
+ case nodetype of
|
|
|
+ andn,
|
|
|
+ orn :
|
|
|
+ begin
|
|
|
+ location_reset(location,LOC_JUMP,OS_NO);
|
|
|
+ case nodetype of
|
|
|
+ andn :
|
|
|
+ begin
|
|
|
+ otl:=truelabel;
|
|
|
+ objectlibrary.getlabel(truelabel);
|
|
|
+ secondpass(left);
|
|
|
+ maketojumpbool(exprasmlist,left,lr_load_regvars);
|
|
|
+ cg.a_label(exprasmlist,truelabel);
|
|
|
+ truelabel:=otl;
|
|
|
+ end;
|
|
|
+ orn :
|
|
|
+ begin
|
|
|
+ ofl:=falselabel;
|
|
|
+ objectlibrary.getlabel(falselabel);
|
|
|
+ secondpass(left);
|
|
|
+ maketojumpbool(exprasmlist,left,lr_load_regvars);
|
|
|
+ cg.a_label(exprasmlist,falselabel);
|
|
|
+ falselabel:=ofl;
|
|
|
+ end;
|
|
|
+ else
|
|
|
+ CGMessage(type_e_mismatch);
|
|
|
+ end;
|
|
|
+ secondpass(right);
|
|
|
+ maketojumpbool(exprasmlist,right,lr_load_regvars);
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+ end;*)
|
|
|
+ clear_left_right(cmpop);
|
|
|
+ end;
|
|
|
+
|
|
|
+
|
|
|
+{*****************************************************************************
|
|
|
+ Add64bit
|
|
|
+*****************************************************************************}
|
|
|
+
|
|
|
+ procedure tcgaddnode.second_op64bit;
|
|
|
+ var
|
|
|
+ cmpop : boolean;
|
|
|
+ begin
|
|
|
+ cmpop := false;
|
|
|
+ firstcomplex(self);
|
|
|
+
|
|
|
+ pass_left_and_right;
|
|
|
+
|
|
|
+ if nodetype in [equaln,unequaln,gtn,gten,lte,lten] then
|
|
|
+ cmpop := true;
|
|
|
+
|
|
|
+ if cmpop then
|
|
|
+ second_cmp64bit
|
|
|
+ else
|
|
|
+ second_add64bit;
|
|
|
+
|
|
|
+ clear_left_right(cmpop);
|
|
|
+ end;
|
|
|
+
|
|
|
+ procedure tcgaddnode.second_cmp64bit;
|
|
|
+ begin
|
|
|
+(* load_left_right(true,false);
|
|
|
+
|
|
|
+ case nodetype of
|
|
|
+ ltn,lten,
|
|
|
+ gtn,gten:
|
|
|
+ begin
|
|
|
+ emit_cmp64_hi;
|
|
|
+ firstjmp64bitcmp;
|
|
|
+ emit_cmp64_lo;
|
|
|
+ secondjmp64bitcmp;
|
|
|
+ end;
|
|
|
+ equaln,unequaln:
|
|
|
+ begin
|
|
|
+ // instead of doing a complicated compare, do
|
|
|
+ // (left.hi xor right.hi) or (left.lo xor right.lo)
|
|
|
+ // (somewhate optimized so that no superfluous 'mr's are
|
|
|
+ // generated)
|
|
|
+ if (left.location.loc = LOC_CONSTANT) then
|
|
|
+ swapleftright;
|
|
|
+ if (right.location.loc = LOC_CONSTANT) then
|
|
|
+ begin
|
|
|
+ if left.location.loc = LOC_REGISTER then
|
|
|
+ begin
|
|
|
+ tempreg64.reglo := left.location.registerlow;
|
|
|
+ tempreg64.reghi := left.location.registerhigh;
|
|
|
+ end
|
|
|
+ else
|
|
|
+ begin
|
|
|
+ if (aword(right.location.valueqword) <> 0) then
|
|
|
+ tempreg64.reglo := cg.get_scratch_reg_int(exprasmlist)
|
|
|
+ else
|
|
|
+ tempreg64.reglo := left.location.registerlow;
|
|
|
+ if ((right.location.valueqword shr 32) <> 0) then
|
|
|
+ tempreg64.reghi := cg.get_scratch_reg_int(exprasmlist)
|
|
|
+ else
|
|
|
+ tempreg64.reghi := left.location.registerhigh;
|
|
|
+ end;
|
|
|
+
|
|
|
+ if (aword(right.location.valueqword) <> 0) then
|
|
|
+ { negative values can be handled using SUB, }
|
|
|
+ { positive values < 65535 using XOR. }
|
|
|
+ if (longint(right.location.valueqword) >= -32767) and
|
|
|
+ (longint(right.location.valueqword) < 0) then
|
|
|
+ cg.a_op_const_reg_reg(exprasmlist,OP_SUB,OS_INT,
|
|
|
+ aword(right.location.valueqword),
|
|
|
+ left.location.registerlow,tempreg64.reglo)
|
|
|
+ else
|
|
|
+ cg.a_op_const_reg_reg(exprasmlist,OP_XOR,OS_INT,
|
|
|
+ aword(right.location.valueqword),
|
|
|
+ left.location.registerlow,tempreg64.reglo);
|
|
|
+
|
|
|
+ if ((right.location.valueqword shr 32) <> 0) then
|
|
|
+ if (longint(right.location.valueqword shr 32) >= -32767) and
|
|
|
+ (longint(right.location.valueqword shr 32) < 0) then
|
|
|
+ cg.a_op_const_reg_reg(exprasmlist,OP_SUB,OS_INT,
|
|
|
+ aword(right.location.valueqword shr 32),
|
|
|
+ left.location.registerhigh,tempreg64.reghi)
|
|
|
+ else
|
|
|
+ cg.a_op_const_reg_reg(exprasmlist,OP_XOR,OS_INT,
|
|
|
+ aword(right.location.valueqword shr 32),
|
|
|
+ left.location.registerhigh,tempreg64.reghi);
|
|
|
+ end
|
|
|
+ else
|
|
|
+ begin
|
|
|
+ tempreg64.reglo := cg.get_scratch_reg_int(exprasmlist);
|
|
|
+ tempreg64.reghi := cg.get_scratch_reg_int(exprasmlist);
|
|
|
+ cg64.a_op64_reg_reg_reg(exprasmlist,OP_XOR,
|
|
|
+ left.location.register64,right.location.register64,
|
|
|
+ tempreg64);
|
|
|
+ end;
|
|
|
+
|
|
|
+ cg.a_reg_alloc(exprasmlist,R_0);
|
|
|
+ exprasmlist.concat(taicpu.op_reg_reg_reg(A_OR_,R_0,
|
|
|
+ tempreg64.reglo,tempreg64.reghi));
|
|
|
+ cg.a_reg_dealloc(exprasmlist,R_0);
|
|
|
+ if (tempreg64.reglo <> left.location.registerlow) then
|
|
|
+ cg.free_scratch_reg(exprasmlist,tempreg64.reglo);
|
|
|
+ if (tempreg64.reghi <> left.location.registerhigh) then
|
|
|
+ cg.free_scratch_reg(exprasmlist,tempreg64.reghi);
|
|
|
+
|
|
|
+ location_reset(location,LOC_FLAGS,OS_NO);
|
|
|
+ location.resflags := getresflags;
|
|
|
+ end;
|
|
|
+ else
|
|
|
+ internalerror(2002072803);
|
|
|
+ end;
|
|
|
+
|
|
|
+
|
|
|
+ { set result location }
|
|
|
+ { (emit_compare sets it to LOC_FLAGS for compares, so set the }
|
|
|
+ { real location only now) (JM) }
|
|
|
+ if cmpop and
|
|
|
+ not(nodetype in [equaln,unequaln]) then
|
|
|
+ location_reset(location,LOC_JUMP,OS_NO);
|
|
|
+*)
|
|
|
+ end;
|
|
|
+
|
|
|
+
|
|
|
+ procedure tppcaddnode.second_add64bit;
|
|
|
+ var
|
|
|
+ op : TOpCG;
|
|
|
+ unsigned : boolean;
|
|
|
+
|
|
|
+ begin
|
|
|
+
|
|
|
+ unsigned:=((left.resulttype.def.deftype=orddef) and
|
|
|
+ (torddef(left.resulttype.def).typ=u64bit)) or
|
|
|
+ ((right.resulttype.def.deftype=orddef) and
|
|
|
+ (torddef(right.resulttype.def).typ=u64bit));
|
|
|
+ case nodetype of
|
|
|
+ addn :
|
|
|
+ op:=OP_ADD;
|
|
|
+ subn :
|
|
|
+ op:=OP_SUB;
|
|
|
+ xorn:
|
|
|
+ op:=OP_XOR;
|
|
|
+ orn:
|
|
|
+ op:=OP_OR;
|
|
|
+ andn:
|
|
|
+ op:=OP_AND;
|
|
|
+ muln:
|
|
|
+ begin
|
|
|
+ { should be handled in pass_1 (JM) }
|
|
|
+ internalerror(200109051);
|
|
|
+ end;
|
|
|
+ else
|
|
|
+ internalerror(2002072705);
|
|
|
+ end;
|
|
|
+
|
|
|
+ location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def));
|
|
|
+
|
|
|
+ load_left_right(false,(cs_check_overflow in aktlocalswitches) and
|
|
|
+ (nodetype in [addn,subn]));
|
|
|
+
|
|
|
+ case nodetype of
|
|
|
+ begin
|
|
|
+ xorn,orn,andn,addn:
|
|
|
+ begin
|
|
|
+ if (location.registerlow = R_NO) then
|
|
|
+ begin
|
|
|
+ location.registerlow := rg.getregisterint(exprasmlist);
|
|
|
+ location.registerhigh := rg.getregisterint(exprasmlist);
|
|
|
+ end;
|
|
|
+
|
|
|
+ if (left.location.loc = LOC_CONSTANT) then
|
|
|
+ swapleftright;
|
|
|
+ if (right.location.loc = LOC_CONSTANT) then
|
|
|
+ cg64.a_op64_const_reg_reg(exprasmlist,op,right.location.valueqword,
|
|
|
+ left.location.register64,location.register64)
|
|
|
+ else
|
|
|
+ cg64.a_op64_reg_reg_reg(exprasmlist,op,right.location.register64,
|
|
|
+ left.location.register64,location.register64);
|
|
|
+ end;
|
|
|
+ subn:
|
|
|
+ begin
|
|
|
+ if (nf_swaped in flags) then
|
|
|
+ swapleftright;
|
|
|
+
|
|
|
+ if left.location.loc <> LOC_CONSTANT then
|
|
|
+ begin
|
|
|
+ if (location.registerlow = R_NO) then
|
|
|
+ begin
|
|
|
+ location.registerlow := rg.getregisterint(exprasmlist);
|
|
|
+ location.registerhigh := rg.getregisterint(exprasmlist);
|
|
|
+ end;
|
|
|
+ if right.location.loc <> LOC_CONSTANT then
|
|
|
+ // reg64 - reg64
|
|
|
+ cg64.a_op64_reg_reg_reg(exprasmlist,OP_SUB,
|
|
|
+ right.location.register64,left.location.register64,
|
|
|
+ location.register64)
|
|
|
+ else
|
|
|
+ // reg64 - const64
|
|
|
+ cg64.a_op64_const_reg_reg(exprasmlist,OP_SUB,
|
|
|
+ right.location.valueqword,left.location.register64,
|
|
|
+ location.register64)
|
|
|
+ end
|
|
|
+ else
|
|
|
+ begin
|
|
|
+ // const64 - reg64
|
|
|
+ location_force_reg(exprasmlist,left.location,
|
|
|
+ def_cgsize(left.resulttype.def),true);
|
|
|
+ if (left.location.loc = LOC_REGISTER) then
|
|
|
+ location.register64 := left.location.register64
|
|
|
+ else if (location.registerlow = R_NO) then
|
|
|
+ begin
|
|
|
+ location.registerlow := rg.getregisterint(exprasmlist);
|
|
|
+ location.registerhigh := rg.getregisterint(exprasmlist);
|
|
|
+ end;
|
|
|
+ cg64.a_op64_reg_reg_reg(exprasmlist,OP_SUB,
|
|
|
+ right.location.register64,left.location.register64,
|
|
|
+ location.register64);
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+ else
|
|
|
+ internalerror(2002072803);
|
|
|
+ end;
|
|
|
+ end
|
|
|
+ { emit overflow check if enabled }
|
|
|
+ cg.g_overflowcheck(exprasmlist,self);
|
|
|
+
|
|
|
+ end;
|
|
|
+
|
|
|
+
|
|
|
+{
|
|
|
+ $Log$
|
|
|
+ Revision 1.1 2002-12-07 19:51:35 carl
|
|
|
+ + first version (uncompilable!)
|
|
|
+
|
|
|
+}
|
carl