+ cpu type RV64GC

compiler/riscv/agrvgas.pas

@@ -237,8 +237,8 @@ unit agrvgas;
           ('','rv32imafdc','rv32imafd','rv32imfd','rv32ifd','rv32efd','rv32imcfd','rv32ecfd')
 {$endif RISCV32}
 {$ifdef RISCV64}
-          ('','rv64imac','rv64ima','rv64im','rv64i'),
-          ('','rv64imafdc','rv64imafd','rv64imfd','rv64ifd')
+          ('','rv64imac','rv64ima','rv64im','rv64i','rv64gc'),
+          ('','rv64imafdc','rv64imafd','rv64imfd','rv64ifd','rv64gc')
 {$endif RISCV64}
         );
       begin

compiler/riscv64/cpuinfo.pas

@@ -37,7 +37,8 @@ type
     cpu_rv64imac,
     cpu_rv64ima,
     cpu_rv64im,
-    cpu_rv64i
+    cpu_rv64i,
+    cpu_rv64gc
   );
 
   tfputype =
@@ -90,7 +91,8 @@ Const
     'RV64IMAC',
     'RV64IMA',
     'RV64IM',
-    'RV64I'
+    'RV64I',
+    'RV64GC'
     );
 
   fputypestr: array[tfputype] of string[8] = (
@@ -120,7 +122,9 @@ Const
    tcpuflags =
       (CPURV_HAS_MUL,
        CPURV_HAS_ATOMIC,
-       CPURV_HAS_COMPACT
+       CPURV_HAS_COMPACT,
+       CPURV_HAS_CSR_INSTRUCTIONS,   { extension Zicsr    }
+       CPURV_HAS_FETCH_FENCE         { extension Zifencei }
       );
 
  const
@@ -129,7 +133,8 @@ Const
        { cpu_rv64imac   } [CPURV_HAS_MUL,CPURV_HAS_ATOMIC,CPURV_HAS_COMPACT],
        { cpu_rv64ima    } [CPURV_HAS_MUL,CPURV_HAS_ATOMIC],
        { cpu_rv64im     } [CPURV_HAS_MUL],
-       { cpu_rv64i      } []
+       { cpu_rv64i      } [],
+       { cpu_rv64gc     } [CPURV_HAS_MUL,CPURV_HAS_ATOMIC,CPURV_HAS_COMPACT,CPURV_HAS_CSR_INSTRUCTIONS,CPURV_HAS_FETCH_FENCE]
      );
 
 implementation