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@@ -146,7 +146,7 @@ unit aoptbase;
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class function TAOptBase.RegInOp(Reg: TRegister; const op: toper): Boolean;
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class function TAOptBase.RegInOp(Reg: TRegister; const op: toper): Boolean;
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Begin
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Begin
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Case op.typ Of
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Case op.typ Of
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- Top_Reg: RegInOp := SuperRegistersEqual(Reg,op.reg);
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+ Top_Reg: RegInOp := RegistersInterfere(Reg,op.reg);
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Top_Ref: RegInOp := RegInRef(Reg, op.ref^);
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Top_Ref: RegInOp := RegInRef(Reg, op.ref^);
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{$ifdef arm}
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{$ifdef arm}
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Top_Shifterop: RegInOp := op.shifterop^.rs = Reg;
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Top_Shifterop: RegInOp := op.shifterop^.rs = Reg;
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@@ -159,16 +159,16 @@ unit aoptbase;
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class function TAOptBase.RegInRef(Reg: TRegister; Const Ref: TReference): Boolean;
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class function TAOptBase.RegInRef(Reg: TRegister; Const Ref: TReference): Boolean;
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Begin
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Begin
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- RegInRef := SuperRegistersEqual(Ref.Base,Reg)
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+ RegInRef := RegistersInterfere(Ref.Base,Reg)
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{$ifdef cpurefshaveindexreg}
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{$ifdef cpurefshaveindexreg}
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- Or SuperRegistersEqual(Ref.Index,Reg)
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+ Or RegistersInterfere(Ref.Index,Reg)
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{$endif cpurefshaveindexreg}
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{$endif cpurefshaveindexreg}
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{$ifdef x86}
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{$ifdef x86}
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or (Reg=Ref.segment)
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or (Reg=Ref.segment)
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{ if Ref.segment isn't set, the cpu uses implicitly ss or ds, depending on the base register }
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{ if Ref.segment isn't set, the cpu uses implicitly ss or ds, depending on the base register }
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or ((Ref.segment=NR_NO) and (
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or ((Ref.segment=NR_NO) and (
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- ((Reg=NR_SS) and (SuperRegistersEqual(Ref.base,NR_EBP) or SuperRegistersEqual(Ref.base,NR_ESP))) or
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- ((Reg=NR_DS) and not(SuperRegistersEqual(Ref.base,NR_EBP) or SuperRegistersEqual(Ref.base,NR_ESP)))
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+ ((Reg=NR_SS) and (RegistersInterfere(Ref.base,NR_EBP) or RegistersInterfere(Ref.base,NR_ESP))) or
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+ ((Reg=NR_DS) and not(RegistersInterfere(Ref.base,NR_EBP) or RegistersInterfere(Ref.base,NR_ESP)))
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))
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))
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{$endif x86}
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{$endif x86}
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End;
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End;
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