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@@ -3704,13 +3704,17 @@ implementation
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needed_VEX_Extension: boolean;
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needed_VEX_Extension: boolean;
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needed_VEX: boolean;
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needed_VEX: boolean;
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needed_EVEX: boolean;
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needed_EVEX: boolean;
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+{$ifdef x86_64}
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needed_VSIB: boolean;
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needed_VSIB: boolean;
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+{$endif x86_64}
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opmode: integer;
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opmode: integer;
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VEXvvvv: byte;
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VEXvvvv: byte;
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VEXmmmmm: byte;
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VEXmmmmm: byte;
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+{
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VEXw : byte;
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VEXw : byte;
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VEXpp : byte;
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VEXpp : byte;
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VEXll : byte;
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VEXll : byte;
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+}
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EVEXvvvv: byte;
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EVEXvvvv: byte;
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EVEXpp: byte;
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EVEXpp: byte;
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EVEXr: byte;
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EVEXr: byte;
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@@ -3809,14 +3813,17 @@ implementation
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needed_VEX := false;
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needed_VEX := false;
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needed_EVEX := false;
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needed_EVEX := false;
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needed_VEX_Extension := false;
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needed_VEX_Extension := false;
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+{$ifdef x86_64}
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needed_VSIB := false;
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needed_VSIB := false;
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+{$endif x86_64}
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opmode := -1;
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opmode := -1;
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VEXvvvv := 0;
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VEXvvvv := 0;
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VEXmmmmm := 0;
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VEXmmmmm := 0;
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-
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+{
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VEXll := 0;
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VEXll := 0;
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VEXw := 0;
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VEXw := 0;
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VEXpp := 0;
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VEXpp := 0;
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+}
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EVEXpp := 0;
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EVEXpp := 0;
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EVEXvvvv := 0;
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EVEXvvvv := 0;
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EVEXr := 0;
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EVEXr := 0;
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@@ -3869,7 +3876,9 @@ implementation
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begin
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begin
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// VSIB memory addresing
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// VSIB memory addresing
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if getsupreg(oper[opidx]^.ref^.index) and $10 = $0 then EVEXv := 1; // VECTOR-Index
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if getsupreg(oper[opidx]^.ref^.index) and $10 = $0 then EVEXv := 1; // VECTOR-Index
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+ {$ifdef x86_64}
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needed_VSIB := true;
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needed_VSIB := true;
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+ {$endif x86_64}
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end;
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end;
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end;
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end;
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else
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else
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@@ -3880,12 +3889,12 @@ implementation
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end;
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end;
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&333: begin
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&333: begin
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VEXvvvv := VEXvvvv OR $02; // set SIMD-prefix $F3
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VEXvvvv := VEXvvvv OR $02; // set SIMD-prefix $F3
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- VEXpp := $02; // set SIMD-prefix $F3
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+ //VEXpp := $02; // set SIMD-prefix $F3
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EVEXpp := $02; // set SIMD-prefix $F3
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EVEXpp := $02; // set SIMD-prefix $F3
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end;
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end;
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&334: begin
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&334: begin
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VEXvvvv := VEXvvvv OR $03; // set SIMD-prefix $F2
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VEXvvvv := VEXvvvv OR $03; // set SIMD-prefix $F2
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- VEXpp := $03; // set SIMD-prefix $F2
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+ //VEXpp := $03; // set SIMD-prefix $F2
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EVEXpp := $03; // set SIMD-prefix $F2
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EVEXpp := $03; // set SIMD-prefix $F2
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end;
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end;
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&350: needed_EVEX := true; // AVX512 instruction or AVX128/256/512-instruction (depended on operands [x,y,z]mm16..)
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&350: needed_EVEX := true; // AVX512 instruction or AVX128/256/512-instruction (depended on operands [x,y,z]mm16..)
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@@ -3893,18 +3902,18 @@ implementation
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&352: EVEXw1 := $01;
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&352: EVEXw1 := $01;
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&361: begin
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&361: begin
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VEXvvvv := VEXvvvv OR $01; // set SIMD-prefix $66
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VEXvvvv := VEXvvvv OR $01; // set SIMD-prefix $66
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- VEXpp := $01; // set SIMD-prefix $66
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+ //VEXpp := $01; // set SIMD-prefix $66
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EVEXpp := $01; // set SIMD-prefix $66
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EVEXpp := $01; // set SIMD-prefix $66
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end;
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end;
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&362: needed_VEX := true;
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&362: needed_VEX := true;
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&363: begin
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&363: begin
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needed_VEX_Extension := true;
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needed_VEX_Extension := true;
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VEXvvvv := VEXvvvv OR (1 shl 7); // set REX.W
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VEXvvvv := VEXvvvv OR (1 shl 7); // set REX.W
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- VEXw := 1;
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+ //VEXw := 1;
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end;
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end;
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&364: begin
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&364: begin
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VEXvvvv := VEXvvvv OR $04; // vectorlength = 256 bits AND no scalar
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VEXvvvv := VEXvvvv OR $04; // vectorlength = 256 bits AND no scalar
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- VEXll := $01;
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+ //VEXll := $01;
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EVEXll := $01;
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EVEXll := $01;
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end;
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end;
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&366,
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&366,
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yury