Kaynağa Gözat

Fixed bug in MovxMovx2Movx optimisation that would specify a 64-bit destination instead of 32-bit one

J. Gareth "Curious Kit" Moreton 3 yıl önce
ebeveyn
işleme
22cd8d5d62
1 değiştirilmiş dosya ile 15 ekleme ve 3 silme
  1. 15 3
      compiler/x86/aoptx86.pas

+ 15 - 3
compiler/x86/aoptx86.pas

@@ -10603,7 +10603,11 @@ movzx_cascade:
                       S_WQ:
                         begin
                           if taicpu(p).opcode = A_MOVZX then
-                            taicpu(p).opsize := S_BL
+                            begin
+                              taicpu(p).opsize := S_BL;
+                              { 64-bit zero extension is implicit, so change to the 32-bit register }
+                              setsubreg(taicpu(hp1).oper[1]^.reg, R_SUBD);
+                            end
                           else
                             taicpu(p).opsize := S_BQ;
                           RegUsed := True;
@@ -10618,7 +10622,11 @@ movzx_cascade:
                       S_LQ:
                         begin
                           if taicpu(p).opcode = A_MOVZX then
-                            taicpu(p).opsize := S_BL
+                            begin
+                              taicpu(p).opsize := S_BL;
+                              { 64-bit zero extension is implicit, so change to the 32-bit register }
+                              setsubreg(taicpu(hp1).oper[1]^.reg, R_SUBD);
+                            end
                           else
                             taicpu(p).opsize := S_BQ;
                           RegUsed := True;
@@ -10631,7 +10639,11 @@ movzx_cascade:
                       S_LQ:
                         begin
                           if taicpu(p).opcode = A_MOVZX then
-                            taicpu(p).opsize := S_WL
+                            begin
+                              taicpu(p).opsize := S_WL;
+                              { 64-bit zero extension is implicit, so change to the 32-bit register }
+                              setsubreg(taicpu(hp1).oper[1]^.reg, R_SUBD);
+                            end
                           else
                             taicpu(p).opsize := S_WQ;
                           RegUsed := True;