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@@ -783,35 +783,38 @@ var
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Procedure ConcatLabeledInstr(var instr: TInstruction);
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+ Var Instruc: TAsmOp;
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Begin
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- if (instr.getinstruction in [A_JO,A_JNO,A_JB,A_JC,A_JNAE,
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+ Instruc := instr.getinstruction;
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+ case Instruc Of
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+ A_JO,A_JNO,A_JB,A_JC,A_JNAE,
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A_JNB,A_JNC,A_JAE,A_JE,A_JZ,A_JNE,A_JNZ,A_JBE,A_JNA,A_JNBE,
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A_JA,A_JS,A_JNS,A_JP,A_JPE,A_JNP,A_JPO,A_JL,A_JNGE,A_JNL,A_JGE,
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A_JLE,A_JNG,A_JNLE,A_JG,A_JCXZ,A_JECXZ,A_LOOP,A_LOOPZ,A_LOOPE,
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- A_LOOPNZ,A_LOOPNE,A_MOV,A_JMP,A_CALL]) then
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- Begin
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- if instr.numops > 1 then
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- Message(assem_e_invalid_labeled_opcode)
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- else if instr.operands[1].operandtype <> OPR_LABINSTR then
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- Message(assem_e_invalid_labeled_opcode)
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- else if (instr.operands[1].operandtype = OPR_LABINSTR) and
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- (instr.numops = 1) then
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- if assigned(instr.operands[1].hl) then
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- ConcatLabel(p,instr.getinstruction, instr.operands[1].hl)
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- else
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- Message(assem_f_internal_error_in_findtype);
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- end
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- else if instr.getinstruction = A_MOV then
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- Begin
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- { MOV to rel8 }
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- end
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- else
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- Message1(assem_e_invalid_operand,'');
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+ A_LOOPNZ,A_LOOPNE,A_JMP,A_CALL:
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+ Begin
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+ if instr.numops > 1 then
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+ Message(assem_e_invalid_labeled_opcode)
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+ else if instr.operands[1].operandtype <> OPR_LABINSTR then
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+ Message(assem_e_invalid_labeled_opcode)
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+ else if (instr.operands[1].operandtype = OPR_LABINSTR) and
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+ (instr.numops = 1) then
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+ if assigned(instr.operands[1].hl) then
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+ ConcatLabel(p,instr.getinstruction, instr.operands[1].hl)
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+ else
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+ Message(assem_f_internal_error_in_findtype);
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+ end;
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+ A_MOV:
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+ Begin
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+ { MOV to rel8 }
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+ end;
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+ else
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+ Message1(assem_e_invalid_operand,'');
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+ end;
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end;
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-
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Procedure HandleExtend(var instr: TInstruction);
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{ Handles MOVZX, MOVSX ... }
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var
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@@ -822,10 +825,10 @@ var
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{ return the old types ..}
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{ these tokens still point to valid intel strings, }
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{ but we must convert them to TRUE intel tokens }
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- if instruc in [A_MOVSB,A_MOVSBL,A_MOVSBW,A_MOVSWL] then
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- instruc := A_MOVSX;
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- if instruc in [A_MOVZB,A_MOVZWL] then
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- instruc := A_MOVZX;
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+ Case instruc Of
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+ A_MOVSB,A_MOVSBL,A_MOVSBW,A_MOVSWL: instruc := A_MOVSX;
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+ A_MOVZB,A_MOVZWL: instruc := A_MOVZX;
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+ End;
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With instr do
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@@ -938,21 +941,21 @@ var
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end; { endif }
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{ setup specific instructions for first pass }
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instruc := instr.getinstruction;
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- if (instruc in [A_LEA,A_LDS,A_LSS,A_LES,A_LFS,A_LGS]) then
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- Begin
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- if instr.operands[1].size <> S_L then
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+ Case instruc Of
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+ A_LEA,A_LDS,A_LSS,A_LES,A_LFS,A_LGS:
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Begin
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- Message(assem_e_16bit_base_in_32bit_segment);
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- exit;
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- end; { endif }
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+ if instr.operands[1].size <> S_L then
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+ Begin
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+ Message(assem_e_16bit_base_in_32bit_segment);
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+ exit;
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+ end; { endif }
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{ In this case the size of the reference is not taken into account! }
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- instr.operands[2].size := S_NO;
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- end;
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-
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+ instr.operands[2].size := S_NO;
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+ end;
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+ end; { case }
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With instr do
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Begin
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-
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for i:=1 to numops do
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Begin
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With operands[i] do
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@@ -1001,104 +1004,85 @@ var
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{ TAKE CARE OF SPECIAL OPCODES, TAKE CARE OF THEM INDIVUALLY. }
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{ ALL THE REST ARE TAKEN CARE BY OPCODE TABLE AND THIRD PASS. }
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- if instruc = A_FST then
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- Begin
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- end
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- else
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- if instruc = A_FILD then
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- Begin
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- end
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- else
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- if instruc = A_FLD then
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- Begin
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- {A_FLDS,A_FLDL,A_FLDT}
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- end
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- else
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- if instruc = A_FIST then
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- Begin
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- {A_FISTQ,A_FISTS,A_FISTL}
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- end
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- else
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- if instruc = A_FWAIT then
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- FWaitWarning
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- else
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- if instruc = A_MOVSX then
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- Begin
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- { change the instruction to conform to GAS }
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- if operands[1].size = S_W then
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- Begin
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- addinstr(A_MOVSBW)
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- end
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- else
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- if operands[1].size = S_L then
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- Begin
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- if operands[2].size = S_B then
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- addinstr(A_MOVSBL)
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- else
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- addinstr(A_MOVSWL);
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- end;
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- instruc := getinstruction; { reload instruction }
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- end
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- else
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- if instruc = A_MOVZX then
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- Begin
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- { change the instruction to conform to GAS }
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- if operands[1].size = S_W then
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+ Case instruc Of
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+ A_FST:;
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+ A_FILD:;
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+ A_FLD: {A_FLDS,A_FLDL,A_FLDT};
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+ A_FIST: {A_FISTQ,A_FISTS,A_FISTL};
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+ A_FWAIT: FWaitWarning;
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+ A_MOVSX:
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+ Begin
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+ { change the instruction to conform to GAS }
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+ if operands[1].size = S_W then
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+ Begin
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+ addinstr(A_MOVSBW)
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+ end
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+ else
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+ if operands[1].size = S_L then
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+ Begin
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+ if operands[2].size = S_B then
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+ addinstr(A_MOVSBL)
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+ else
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+ addinstr(A_MOVSWL);
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+ end;
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+ instruc := getinstruction; { reload instruction }
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+ end;
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+ A_MOVZX:
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Begin
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+ { change the instruction to conform to GAS }
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+ if operands[1].size = S_W then
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+ Begin
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addinstr(A_MOVZB)
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- end
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- else
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- if operands[1].size = S_L then
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- Begin
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- if operands[2].size = S_B then
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- addinstr(A_MOVZB)
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- else
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- addinstr(A_MOVZWL);
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+ end
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+ else
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+ if operands[1].size = S_L then
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+ Begin
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+ if operands[2].size = S_B then
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+ addinstr(A_MOVZB)
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+ else
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+ addinstr(A_MOVZWL);
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+ end;
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+ instruc := getinstruction; { reload instruction }
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end;
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- instruc := getinstruction; { reload instruction }
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- end
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- else
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- if (instruc in [A_BT,A_BTC,A_BTR,A_BTS]) then
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- Begin
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+ A_BT,A_BTC,A_BTR,A_BTS:
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+ Begin
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if numops = 2 then
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Begin
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- if (operands[2].operandtype = OPR_CONSTANT)
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- and (operands[2].val <= $ff) then
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- Begin
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- operands[2].opinfo := ao_imm8;
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- { no operand size if using constant. }
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- operands[2].size := S_NO;
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- fits := TRUE;
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- end
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+ if (operands[2].operandtype = OPR_CONSTANT) and
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+ (operands[2].val <= $ff) then
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+ Begin
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+ operands[2].opinfo := ao_imm8;
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+ { no operand size if using constant. }
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+ operands[2].size := S_NO;
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+ fits := TRUE;
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+ end
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end
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else
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Begin
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- Message(assem_e_invalid_opcode_and_operand);
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- exit;
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+ Message(assem_e_invalid_opcode_and_operand);
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+ exit;
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end;
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- end
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- else
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- if instruc = A_ENTER then
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- Begin
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+ end;
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+ A_ENTER:
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+ Begin
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if numops =2 then
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Begin
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- if (operands[1].operandtype = OPR_CONSTANT) and
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- (operands[1].val <= $ffff) then
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- Begin
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- operands[1].opinfo := ao_imm16;
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- end { endif }
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+ if (operands[1].operandtype = OPR_CONSTANT) and
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+ (operands[1].val <= $ffff) then
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+ Begin
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+ operands[1].opinfo := ao_imm16;
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+ end { endif }
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end { endif }
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else
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Begin
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- Message(assem_e_invalid_opcode_and_operand);
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- exit;
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+ Message(assem_e_invalid_opcode_and_operand);
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+ exit;
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end
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- end { endif }
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- else
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+ end;
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{ Handle special opcodes for the opcode }
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{ table. Set them up correctly. }
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- if (instruc in [A_IN,A_INS]) then
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- Begin
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+ A_IN,A_INS:
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+ Begin
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if numops =2 then
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Begin
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if (operands[2].operandtype = OPR_REGISTER) and (operands[2].reg = R_DX)
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@@ -1118,18 +1102,19 @@ var
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end
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end
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else
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- if (operands[2].operandtype = OPR_CONSTANT) and (operands[2].val <= $ff)
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- and (instruc = A_IN) then
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- Begin
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- operands[2].opinfo := ao_imm8;
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- operands[2].size := S_B;
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- if (operands[1].operandtype = OPR_REGISTER) and
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- (operands[1].reg in [R_EAX,R_AX,R_AL]) and
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- (instruc = A_IN) then
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- Begin
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+ if (operands[2].operandtype = OPR_CONSTANT) and
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+ (operands[2].val <= $ff) and
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+ (instruc = A_IN) then
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+ Begin
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+ operands[2].opinfo := ao_imm8;
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+ operands[2].size := S_B;
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+ if (operands[1].operandtype = OPR_REGISTER) and
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+ (operands[1].reg in [R_EAX,R_AX,R_AL]) and
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+ (instruc = A_IN) then
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+ Begin
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operands[1].opinfo := ao_acc;
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- end
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- end;
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+ end
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+ end;
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end
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else
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if not ((numops=0) and (instruc=A_INS)) then
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@@ -1137,27 +1122,27 @@ var
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Message(assem_e_invalid_opcode_and_operand);
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exit;
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end;
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- end
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- else
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- if (instruc in [A_OUT,A_OUTS]) then
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- Begin
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+ end;
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+ A_OUT,A_OUTS:
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+ Begin
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if numops =2 then
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Begin
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- if (operands[1].operandtype = OPR_REGISTER) and (operands[1].reg = R_DX)
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- then
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+ if (operands[1].operandtype = OPR_REGISTER) and
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+ (operands[1].reg = R_DX)then
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Begin
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- operands[1].opinfo := ao_inoutportreg;
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- if (operands[2].operandtype = OPR_REGISTER) and
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- (operands[2].reg in [R_EAX,R_AX,R_AL]) and
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- (instruc = A_OUT) then
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- Begin
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- operands[2].opinfo := ao_acc;
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- fits := TRUE;
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- end
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+ operands[1].opinfo := ao_inoutportreg;
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+ if (operands[2].operandtype = OPR_REGISTER) and
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+ (operands[2].reg in [R_EAX,R_AX,R_AL]) and
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+ (instruc = A_OUT) then
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+ Begin
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+ operands[2].opinfo := ao_acc;
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+ fits := TRUE;
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+ end
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end
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else
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- if (operands[1].operandtype = OPR_CONSTANT) and (operands[1].val <= $ff)
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- and (instruc = A_OUT) then
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+ if (operands[1].operandtype = OPR_CONSTANT) and
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+ (operands[1].val <= $ff) and
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+ (instruc = A_OUT) then
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Begin
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operands[1].opinfo := ao_imm8;
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operands[1].size := S_B;
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@@ -1181,144 +1166,142 @@ var
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Message(assem_e_invalid_opcode_and_operand);
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exit;
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end;
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- end
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- else
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- if instruc in [A_RCL,A_RCR,A_ROL,A_ROR,A_SAL,A_SAR,A_SHL,A_SHR] then
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- { if RCL,ROL,... }
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- Begin
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+ end;
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+ A_RCL,A_RCR,A_ROL,A_ROR,A_SAL,A_SAR,A_SHL,A_SHR:
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+ Begin
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if numops =2 then
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Begin
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- if (operands[2].operandtype = OPR_REGISTER) and (operands[2].reg = R_CL)
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- then
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- Begin
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- operands[2].opinfo := ao_shiftcount
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- end
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- else
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- if (operands[2].operandtype = OPR_CONSTANT) and
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- (operands[2].val <= $ff) then
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+ if (operands[2].operandtype = OPR_REGISTER) and
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+ (operands[2].reg = R_CL) then
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Begin
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+ operands[2].opinfo := ao_shiftcount
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+ end
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+ else
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+ if (operands[2].operandtype = OPR_CONSTANT) and
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+ (operands[2].val <= $ff) then
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+ Begin
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operands[2].opinfo := ao_imm8;
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operands[2].size := S_B;
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- end;
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+ end;
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end
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else { if numops = 2 }
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Begin
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- Message(assem_e_invalid_opcode_and_operand);
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- exit;
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+ Message(assem_e_invalid_opcode_and_operand);
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+ exit;
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end;
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- end
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- { endif ROL,RCL ... }
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- else
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- if instruc in [A_DIV, A_IDIV] then
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- Begin
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- if (operands[1].operandtype = OPR_REGISTER) and
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- (operands[1].reg in [R_AL,R_AX,R_EAX]) then
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- operands[1].opinfo := ao_acc;
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- end
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- else
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- if (instruc = A_FNSTSW) or (instruc = A_FSTSW) then
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- Begin
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+ end;
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+ A_DIV, A_IDIV:
|
|
|
+ Begin
|
|
|
+ if (operands[1].operandtype = OPR_REGISTER) and
|
|
|
+ (operands[1].reg in [R_AL,R_AX,R_EAX]) then
|
|
|
+ operands[1].opinfo := ao_acc;
|
|
|
+ end;
|
|
|
+ A_FNSTSW,A_FSTSW:
|
|
|
+ Begin
|
|
|
if numops = 1 then
|
|
|
Begin
|
|
|
- if (operands[1].operandtype = OPR_REGISTER) and
|
|
|
- (operands[1].reg = R_AX) then
|
|
|
- operands[1].opinfo := ao_acc;
|
|
|
+ if (operands[1].operandtype = OPR_REGISTER) and
|
|
|
+ (operands[1].reg = R_AX) then
|
|
|
+ operands[1].opinfo := ao_acc;
|
|
|
end
|
|
|
else
|
|
|
Begin
|
|
|
Message(assem_e_invalid_opcode_and_operand);
|
|
|
exit;
|
|
|
end;
|
|
|
- end
|
|
|
- else
|
|
|
- if (instruc = A_SHLD) or (instruc = A_SHRD) then
|
|
|
+ end;
|
|
|
+ A_SHLD,A_SHRD:
|
|
|
{ these instruction are fully parsed individually on pass three }
|
|
|
{ so we just do a summary checking here. }
|
|
|
Begin
|
|
|
- if numops = 3 then
|
|
|
- Begin
|
|
|
- if (operands[3].operandtype = OPR_CONSTANT)
|
|
|
- and (operands[3].val <= $ff) then
|
|
|
- Begin
|
|
|
- operands[3].opinfo := ao_imm8;
|
|
|
- operands[3].size := S_B;
|
|
|
- end;
|
|
|
- end
|
|
|
- else
|
|
|
- Begin
|
|
|
- Message(assem_e_invalid_opcode_and_operand);
|
|
|
- exit;
|
|
|
- end;
|
|
|
- end
|
|
|
- else
|
|
|
- if instruc = A_INT then
|
|
|
+ if numops = 3 then
|
|
|
+ Begin
|
|
|
+ if (operands[3].operandtype = OPR_CONSTANT) and
|
|
|
+ (operands[3].val <= $ff) then
|
|
|
+ Begin
|
|
|
+ operands[3].opinfo := ao_imm8;
|
|
|
+ operands[3].size := S_B;
|
|
|
+ end;
|
|
|
+ end
|
|
|
+ else
|
|
|
+ Begin
|
|
|
+ Message(assem_e_invalid_opcode_and_operand);
|
|
|
+ exit;
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+ A_INT:
|
|
|
Begin
|
|
|
- if numops = 1 then
|
|
|
- Begin
|
|
|
- if (operands[1].operandtype = OPR_CONSTANT) and
|
|
|
- (operands[1].val <= $ff) then
|
|
|
- operands[1].opinfo := ao_imm8;
|
|
|
- end
|
|
|
- end
|
|
|
- else
|
|
|
- if instruc = A_RET then
|
|
|
+ if numops = 1 then
|
|
|
+ Begin
|
|
|
+ if (operands[1].operandtype = OPR_CONSTANT) and
|
|
|
+ (operands[1].val <= $ff) then
|
|
|
+ operands[1].opinfo := ao_imm8;
|
|
|
+ end
|
|
|
+ end;
|
|
|
+ A_RET:
|
|
|
Begin
|
|
|
- if numops =1 then
|
|
|
- Begin
|
|
|
- if (operands[1].operandtype = OPR_CONSTANT) and
|
|
|
- (operands[1].val <= $ffff) then
|
|
|
- operands[1].opinfo := ao_imm16;
|
|
|
- end
|
|
|
- end; { endif }
|
|
|
+ if numops =1 then
|
|
|
+ Begin
|
|
|
+ if (operands[1].operandtype = OPR_CONSTANT) and
|
|
|
+ (operands[1].val <= $ffff) then
|
|
|
+ operands[1].opinfo := ao_imm16;
|
|
|
+ end
|
|
|
+ end;
|
|
|
|
|
|
{ all string instructions have default memory }
|
|
|
{ location which are ignored. Take care of }
|
|
|
{ those. }
|
|
|
{ Here could be added the code for segment }
|
|
|
{ overrides. }
|
|
|
- if instruc in [A_SCAS,A_CMPS,A_STOS,A_LODS] then
|
|
|
+ A_SCAS,A_CMPS,A_STOS,A_LODS:
|
|
|
Begin
|
|
|
- if numops =1 then
|
|
|
- Begin
|
|
|
- if (operands[1].operandtype = OPR_REFERENCE) and
|
|
|
- (assigned(operands[1].ref.symbol)) then
|
|
|
- Freemem(operands[1].ref.symbol,length(operands[1].ref.symbol^)+1);
|
|
|
- operands[1].operandtype := OPR_NONE;
|
|
|
- numops := 0;
|
|
|
- end;
|
|
|
- end; { endif }
|
|
|
- if instruc in [A_INS,A_MOVS,A_OUTS] then
|
|
|
- Begin
|
|
|
- if numops =2 then
|
|
|
- Begin
|
|
|
- if (operands[1].operandtype = OPR_REFERENCE) and
|
|
|
- (assigned(operands[1].ref.symbol)) then
|
|
|
- Freemem(operands[1].ref.symbol,length(operands[1].ref.symbol^)+1);
|
|
|
- if (operands[2].operandtype = OPR_REFERENCE) and
|
|
|
- (assigned(operands[2].ref.symbol)) then
|
|
|
- Freemem(operands[2].ref.symbol,length(operands[1].ref.symbol^)+1);
|
|
|
- operands[1].operandtype := OPR_NONE;
|
|
|
- operands[2].operandtype := OPR_NONE;
|
|
|
- numops := 0;
|
|
|
- end;
|
|
|
+ if numops =1 then
|
|
|
+ Begin
|
|
|
+ if (operands[1].operandtype = OPR_REFERENCE) and
|
|
|
+ (assigned(operands[1].ref.symbol)) then
|
|
|
+ Freemem(operands[1].ref.symbol,length(operands[1].ref.symbol^)+1);
|
|
|
+ operands[1].operandtype := OPR_NONE;
|
|
|
+ numops := 0;
|
|
|
+ end;
|
|
|
end;
|
|
|
{ handle parameter for segment overrides }
|
|
|
- if instruc = A_XLAT then
|
|
|
- Begin
|
|
|
+ A_XLAT:
|
|
|
+ Begin
|
|
|
{ handle special TP syntax case for XLAT }
|
|
|
{ here we accept XLAT, XLATB and XLAT m8 }
|
|
|
if (numops = 1) or (numops = 0) then
|
|
|
Begin
|
|
|
- if (operands[1].operandtype = OPR_REFERENCE) and
|
|
|
- (assigned(operands[1].ref.symbol)) then
|
|
|
- Freemem(operands[1].ref.symbol,length(operands[1].ref.symbol^)+1);
|
|
|
- operands[1].operandtype := OPR_NONE;
|
|
|
- numops := 0;
|
|
|
- { always a byte for XLAT }
|
|
|
- instr.stropsize := S_B;
|
|
|
+ if (operands[1].operandtype = OPR_REFERENCE) and
|
|
|
+ (assigned(operands[1].ref.symbol)) then
|
|
|
+ Freemem(operands[1].ref.symbol,length(operands[1].ref.symbol^)+1);
|
|
|
+ operands[1].operandtype := OPR_NONE;
|
|
|
+ numops := 0;
|
|
|
+ { always a byte for XLAT }
|
|
|
+ instr.stropsize := S_B;
|
|
|
end;
|
|
|
- end;
|
|
|
+ end;
|
|
|
+ end; { case }
|
|
|
|
|
|
+ { we have to start a new case because INS etc are already handled before
|
|
|
+ as well (JM) }
|
|
|
+
|
|
|
+ Case instruc Of
|
|
|
+ A_INS,A_MOVS,A_OUTS:
|
|
|
+ Begin
|
|
|
+ if numops =2 then
|
|
|
+ Begin
|
|
|
+ if (operands[1].operandtype = OPR_REFERENCE) and
|
|
|
+ (assigned(operands[1].ref.symbol)) then
|
|
|
+ Freemem(operands[1].ref.symbol,length(operands[1].ref.symbol^)+1);
|
|
|
+ if (operands[2].operandtype = OPR_REFERENCE) and
|
|
|
+ (assigned(operands[2].ref.symbol)) then
|
|
|
+ Freemem(operands[2].ref.symbol,length(operands[1].ref.symbol^)+1);
|
|
|
+ operands[1].operandtype := OPR_NONE;
|
|
|
+ operands[2].operandtype := OPR_NONE;
|
|
|
+ numops := 0;
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+ end;
|
|
|
|
|
|
|
|
|
{ swap the destination and source }
|
|
|
@@ -1445,33 +1428,37 @@ var
|
|
|
{ at least that is what it seems in the tasm 2.0 manual. }
|
|
|
OPR_CONSTANT: p^.concat(new(pai386,op_const(instruc,
|
|
|
S_NO, instr.operands[1].val)));
|
|
|
- OPR_REGISTER: if instruc in [A_INC,A_DEC, A_NEG,A_NOT] then
|
|
|
- Begin
|
|
|
- p^.concat(new(pai386,op_reg(instruc,
|
|
|
- instr.operands[1].size,instr.operands[1].reg)));
|
|
|
- end
|
|
|
- else
|
|
|
- p^.concat(new(pai386,op_reg(instruc,
|
|
|
- S_NO,instr.operands[1].reg)));
|
|
|
+ OPR_REGISTER: Case Instruc Of
|
|
|
+ A_INC,A_DEC, A_NEG,A_NOT:
|
|
|
+ Begin
|
|
|
+ p^.concat(new(pai386,op_reg(instruc,
|
|
|
+ instr.operands[1].size,instr.operands[1].reg)));
|
|
|
+ end
|
|
|
+ else
|
|
|
+ p^.concat(new(pai386,op_reg(instruc,
|
|
|
+ S_NO,instr.operands[1].reg)));
|
|
|
+ end;
|
|
|
{ this is where it gets a bit more complicated... }
|
|
|
OPR_REFERENCE:
|
|
|
- if instr.operands[1].size <> S_NO then
|
|
|
+ if instr.operands[1].size <> S_NO then
|
|
|
Begin
|
|
|
p^.concat(new(pai386,op_ref(instruc,
|
|
|
instr.operands[1].size,newreference(instr.operands[1].ref))));
|
|
|
end
|
|
|
- else
|
|
|
+ else
|
|
|
Begin
|
|
|
{ special jmp and call case with }
|
|
|
{ symbolic references. }
|
|
|
- if instruc in [A_CALL,A_JMP] then
|
|
|
- Begin
|
|
|
- p^.concat(new(pai386,op_ref(instruc,
|
|
|
- S_NO,newreference(instr.operands[1].ref))));
|
|
|
- end
|
|
|
- else
|
|
|
- Message(assem_e_invalid_opcode_and_operand);
|
|
|
- end;
|
|
|
+ case instruc of
|
|
|
+ A_CALL,A_JMP:
|
|
|
+ Begin
|
|
|
+ p^.concat(new(pai386,op_ref(instruc,
|
|
|
+ S_NO,newreference(instr.operands[1].ref))));
|
|
|
+ end
|
|
|
+ else
|
|
|
+ Message(assem_e_invalid_opcode_and_operand);
|
|
|
+ end;
|
|
|
+ End;
|
|
|
OPR_SYMBOL: Begin
|
|
|
p^.concat(new(pai386,op_csymbol(instruc,
|
|
|
instr.stropsize, newcsymbol(instr.operands[1].symbol^,0))));
|
|
|
@@ -1487,13 +1474,14 @@ var
|
|
|
end;
|
|
|
2:
|
|
|
Begin
|
|
|
- if instruc in [A_MOVSX,A_MOVZX,A_MOVSB,A_MOVSBL,A_MOVSBW,
|
|
|
- A_MOVSWL,A_MOVZB,A_MOVZWL] then
|
|
|
+ Case Instruc Of
|
|
|
+ A_MOVSX,A_MOVZX,A_MOVSB,A_MOVSBL,A_MOVSBW,
|
|
|
+ A_MOVSWL,A_MOVZB,A_MOVZWL:
|
|
|
{ movzx and movsx }
|
|
|
- HandleExtend(instr)
|
|
|
- else
|
|
|
+ HandleExtend(instr);
|
|
|
+ else
|
|
|
{ other instructions }
|
|
|
- Begin
|
|
|
+ Begin
|
|
|
With instr do
|
|
|
Begin
|
|
|
{ source }
|
|
|
@@ -1514,40 +1502,46 @@ var
|
|
|
opsize,operands[1].reg,operands[2].reg)));
|
|
|
end
|
|
|
else
|
|
|
- if instruc = A_IN then
|
|
|
- p^.concat(new(pai386,op_reg_reg(instruc,
|
|
|
- operands[2].size,operands[1].reg,operands[2].reg)))
|
|
|
- else
|
|
|
- if instruc = A_OUT then
|
|
|
- p^.concat(new(pai386,op_reg_reg(instruc,
|
|
|
- operands[1].size,operands[1].reg,operands[2].reg)))
|
|
|
- else
|
|
|
+ Case instruc Of
|
|
|
+ A_IN:
|
|
|
+ p^.concat(new(pai386,op_reg_reg(instruc,
|
|
|
+ operands[2].size,operands[1].reg,operands[2].reg)));
|
|
|
+ A_OUT:
|
|
|
+ p^.concat(new(pai386,op_reg_reg(instruc,
|
|
|
+ operands[1].size,operands[1].reg,operands[2].reg)));
|
|
|
{ these do not require any size specification. }
|
|
|
- if (instruc in [A_SAL,A_SAR,A_SHL,A_SHR,A_ROL,
|
|
|
- A_ROR,A_RCR,A_RCL]) then
|
|
|
+ A_SAL,A_SAR,A_SHL,A_SHR,A_ROL,A_ROR,A_RCR,
|
|
|
+ A_RCL:
|
|
|
{ outs and ins are already taken care by }
|
|
|
{ the first pass. }
|
|
|
- p^.concat(new(pai386,op_reg_reg(instruc,
|
|
|
- S_NO,operands[1].reg,operands[2].reg)))
|
|
|
- else
|
|
|
- Message(assem_e_invalid_opcode_and_operand);
|
|
|
- end;
|
|
|
+ p^.concat(new(pai386,op_reg_reg(instruc,
|
|
|
+ S_NO,operands[1].reg,operands[2].reg)))
|
|
|
+ else
|
|
|
+ Message(assem_e_invalid_opcode_and_operand);
|
|
|
+ end;
|
|
|
+ end; {case}
|
|
|
OPR_REFERENCE:
|
|
|
{ variable name. }
|
|
|
{ here we must check the instruction type }
|
|
|
{ before deciding if to use and compare }
|
|
|
{ any sizes. }
|
|
|
if assigned(operands[2].ref.symbol) then
|
|
|
- Begin
|
|
|
- if (opsize = operands[2].size) or (instruc in
|
|
|
- [A_RCL,A_RCR,A_ROL,A_ROR,A_SAL,A_SAR,A_SHR,A_SHL]) then
|
|
|
- p^.concat(new(pai386,op_reg_ref(instruc,
|
|
|
+ Begin
|
|
|
+ if (opsize = operands[2].size) then
|
|
|
+ p^.concat(new(pai386,op_reg_ref(instruc,
|
|
|
opsize,operands[1].reg,newreference(operands[2].ref))))
|
|
|
- else
|
|
|
- Message(assem_e_invalid_size_in_ref);
|
|
|
- end
|
|
|
+ Else
|
|
|
+ Case instruc Of
|
|
|
+ A_RCL,A_RCR,A_ROL,A_ROR,A_SAL,A_SAR,A_SHR,
|
|
|
+ A_SHL:
|
|
|
+ p^.concat(new(pai386,op_reg_ref(instruc,
|
|
|
+ opsize,operands[1].reg,newreference(operands[2].ref))))
|
|
|
+ else
|
|
|
+ Message(assem_e_invalid_size_in_ref);
|
|
|
+ End; {case}
|
|
|
+ end
|
|
|
else
|
|
|
- Begin
|
|
|
+ Begin
|
|
|
{ register reference }
|
|
|
{ possiblities:1) local variable which }
|
|
|
{ has been replaced by bp and offset }
|
|
|
@@ -1560,8 +1554,8 @@ var
|
|
|
opsize,operands[1].reg,newreference(operands[2].ref))))
|
|
|
else
|
|
|
Message(assem_e_invalid_size_in_ref);
|
|
|
- end;
|
|
|
- OPR_CONSTANT: { const,reg }
|
|
|
+ end;
|
|
|
+ OPR_CONSTANT: { const,reg }
|
|
|
Begin { OUT const,reg }
|
|
|
if (instruc = A_OUT) and (opsize = S_B) then
|
|
|
p^.concat(new(pai386,op_reg_const(instruc,
|
|
|
@@ -1641,25 +1635,26 @@ var
|
|
|
OPR_REFERENCE:
|
|
|
case instr.operands[2].operandtype of
|
|
|
OPR_REGISTER:
|
|
|
- if assigned(operands[1].ref.symbol) then
|
|
|
+ if assigned(operands[1].ref.symbol) then
|
|
|
{ global variable }
|
|
|
Begin
|
|
|
- if instruc in [A_LEA,A_LDS,A_LES,A_LFS,A_LGS,A_LSS]
|
|
|
- then
|
|
|
- p^.concat(new(pai386,op_ref_reg(instruc,
|
|
|
- S_NO,newreference(operands[1].ref),
|
|
|
- operands[2].reg)))
|
|
|
- else
|
|
|
- if (opsize = operands[2].size) then
|
|
|
- p^.concat(new(pai386,op_ref_reg(instruc,
|
|
|
- opsize,newreference(operands[1].ref),
|
|
|
- operands[2].reg)))
|
|
|
- else
|
|
|
- Begin
|
|
|
- Message(assem_e_invalid_opcode_and_operand);
|
|
|
- end;
|
|
|
+ Case instruc Of
|
|
|
+ A_LEA,A_LDS,A_LES,A_LFS,A_LGS,A_LSS:
|
|
|
+ p^.concat(new(pai386,op_ref_reg(instruc,
|
|
|
+ S_NO,newreference(operands[1].ref),
|
|
|
+ operands[2].reg)))
|
|
|
+ else
|
|
|
+ if (opsize = operands[2].size) then
|
|
|
+ p^.concat(new(pai386,op_ref_reg(instruc,
|
|
|
+ opsize,newreference(operands[1].ref),
|
|
|
+ operands[2].reg)))
|
|
|
+ else
|
|
|
+ Begin
|
|
|
+ Message(assem_e_invalid_opcode_and_operand);
|
|
|
+ end;
|
|
|
+ end; { case }
|
|
|
end
|
|
|
- else
|
|
|
+ else
|
|
|
Begin
|
|
|
{ register reference }
|
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{ possiblities:1) local variable which }
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@@ -1681,21 +1676,22 @@ var
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p^.concat(new(pai386,op_ref_ref(instruc,
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opsize,newreference(operands[1].ref),
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newreference(operands[2].ref))));
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- else
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- Begin
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- Message(assem_f_internal_error_in_concatopcode);
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- end;
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- end; { end inner case }
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+ else
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+ Begin
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+ Message(assem_f_internal_error_in_concatopcode);
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+ end;
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+ end; { end inner case }
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end; { end case }
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end; { end with }
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- end; {end if movsx... }
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+ end; {end else of case... }
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+ end; { end case }
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end;
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3: Begin
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{ only imul, shld and shrd }
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{ middle must be a register }
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- if (instruc in [A_SHLD,A_SHRD]) and (instr.operands[2].operandtype =
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+ if ((instruc = A_SHLD) or (instruc = A_SHRD)) and (instr.operands[2].operandtype =
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OPR_REGISTER) then
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- Begin
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+ Begin
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case instr.operands[2].size of
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S_W: if instr.operands[1].operandtype = OPR_CONSTANT then
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Begin
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@@ -1745,13 +1741,13 @@ var
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else
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Message(assem_e_invalid_opcode_and_operand);
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end; { end case }
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- end
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+ end
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else
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- if (instruc in [A_IMUL]) and (instr.operands[3].operandtype
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- = OPR_REGISTER) then
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- Begin
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- case instr.operands[3].size of
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- S_W: if instr.operands[1].operandtype = OPR_CONSTANT then
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+ if (instruc = A_IMUL) and
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+ (instr.operands[3].operandtype = OPR_REGISTER) then
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+ Begin
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+ case instr.operands[3].size of
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+ S_W: if instr.operands[1].operandtype = OPR_CONSTANT then
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Begin
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if instr.operands[1].val <= $ffff then
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Begin
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@@ -1797,13 +1793,13 @@ var
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Message(assem_e_invalid_opcode_and_operand);
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else
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Message(assem_e_invalid_middle_sized_operand);
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- end; { end case }
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- end { endif }
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+ end; { end case }
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+ end { endif }
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else
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Message(assem_e_invalid_three_operand_opcode);
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end;
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end; { end case }
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- end;
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+ end; { end "if fits then" ... }
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end;
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{---------------------------------------------------------------------}
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@@ -1943,22 +1939,28 @@ var
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Begin
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CheckPrefix := TRUE;
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Case prefix of
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- A_REP,A_REPNE,A_REPE: if not (opcode in [A_SCAS,A_INS,A_OUTS,A_MOVS,
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- A_CMPS,A_LODS,A_STOS]) then
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- Begin
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- CheckPrefix := FALSE;
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- exit;
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- end;
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- A_LOCK: if not (opcode in [A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,
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- A_ADC,A_SBB,A_AND,A_SUB,A_XOR,A_NOT,A_NEG,A_INC,A_DEC]) then
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- Begin
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- CheckPrefix := FALSE;
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- Exit;
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- end;
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+ A_REP,A_REPNE,A_REPE:
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+ Case opcode Of
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+ A_SCAS,A_INS,A_OUTS,A_MOVS,A_CMPS,A_LODS,A_STOS:;
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+ Else
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+ Begin
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+ CheckPrefix := FALSE;
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+ exit;
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+ end;
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+ end; { case }
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+ A_LOCK:
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+ Case opcode Of
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+ A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,A_ADC,A_SBB,A_AND,A_SUB,
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+ A_XOR,A_NOT,A_NEG,A_INC,A_DEC:;
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+ Else
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+ Begin
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+ CheckPrefix := FALSE;
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+ Exit;
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+ end;
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+ end; { case }
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|
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A_NONE: exit; { no prefix here }
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|
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-
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- else
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|
|
- CheckPrefix := FALSE;
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+ else
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|
|
+ CheckPrefix := FALSE;
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|
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end; { end case }
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|
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end;
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|
@@ -1990,12 +1992,14 @@ var
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{ update the instr variable accordingly. }
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|
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Begin
|
|
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CheckOverride := FALSE;
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|
|
- if instr.getinstruction in [A_MOVS,A_XLAT,A_CMPS] then
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|
|
- Begin
|
|
|
- CheckOverride := TRUE;
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|
|
- Message(assem_e_segment_override_not_supported);
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|
|
- end
|
|
|
- end;
|
|
|
+ Case instr.getinstruction of
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|
|
+ A_MOVS,A_XLAT,A_CMPS:
|
|
|
+ Begin
|
|
|
+ CheckOverride := TRUE;
|
|
|
+ Message(assem_e_segment_override_not_supported);
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|
|
+ end
|
|
|
+ end;
|
|
|
+ End;
|
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|
|
|
@@ -3510,7 +3514,11 @@ begin
|
|
|
end.
|
|
|
{
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$Log$
|
|
|
- Revision 1.15 1998-11-29 12:47:22 peter
|
|
|
+ Revision 1.16 1998-12-02 16:23:36 jonas
|
|
|
+ * changed "if longintvar in set" to case or "if () or () .." statements
|
|
|
+ * tree.pas: changed inlinenumber (and associated constructor/vars) to a byte
|
|
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+
|
|
|
+ Revision 1.15 1998/11/29 12:47:22 peter
|
|
|
* fixes for 'asm sti end;'
|
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|
|
|
Revision 1.14 1998/11/16 15:38:56 peter
|
Jonas Maebe