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* fix some mips compiler issues, system unit compilation is getting forward

git-svn-id: trunk@20258 -
florian 13 anni fa
parent
commit
28036ed068

+ 21 - 14
compiler/mips/cgcpu.pas

@@ -503,15 +503,15 @@ begin
 
   if (cs_create_pic in current_settings.moduleswitches) and
     (pi_needs_got in current_procinfo.flags) then
-  begin
-    current_procinfo.got := NR_GP;
-    rg[R_INTREGISTER]    := Trgcpu.Create(R_INTREGISTER, R_SUBD,
-      [RS_R4, RS_R5, RS_R6, RS_R7, RS_R8, RS_R9, RS_R10, RS_R11,
-       RS_R12, RS_R13, RS_R14 {, RS_R15 for tmp_const in ncpuadd.pas} {, RS_R24, RS_R25}],
-      first_int_imreg, []);
-  end
+    begin
+      current_procinfo.got := NR_GP;
+      rg[R_INTREGISTER]    := Trgcpu.Create(R_INTREGISTER, R_SUBD,
+        [RS_R4, RS_R5, RS_R6, RS_R7, RS_R8, RS_R9, RS_R10, RS_R11,
+         RS_R12, RS_R13, RS_R14 {, RS_R15 for tmp_const in ncpuadd.pas} {, RS_R24, RS_R25}],
+        first_int_imreg, []);
+    end
   else
-    rg[R_INTREGISTER] := Trgcpu.Create(R_INTREGISTER, R_SUBD,
+    rg[R_INTREGISTER] := trgcpu.Create(R_INTREGISTER, R_SUBD,
       [RS_R4, RS_R5, RS_R6, RS_R7, RS_R8, RS_R9, RS_R10, RS_R11,
        RS_R12, RS_R13, RS_R14 {, RS_R15 for tmp_const in ncpuadd.pas} {, RS_R24=VMT, RS_R25=PIC jump}],
       first_int_imreg, []);
@@ -522,6 +522,10 @@ begin
     RS_F16, RS_F18, RS_F20, RS_F22,
     RS_F24, RS_F26, RS_F28, RS_F30],
     first_fpu_imreg, []);
+
+  { needs at least one element for rgobj not to crash }
+  rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBNONE,
+      [RS_R0],first_mm_imreg,[]);
 end;
 
 
@@ -530,6 +534,7 @@ procedure TCgMPSel.done_register_allocators;
 begin
   rg[R_INTREGISTER].Free;
   rg[R_FPUREGISTER].Free;
+  rg[R_MMREGISTER].Free;
   inherited done_register_allocators;
 end;
 
@@ -556,7 +561,7 @@ begin
     begin
       with paraloc.location^.Reference do
       begin
-        if (Index = NR_SP) and (Offset < Target_info.first_parm_offset) then
+        if (Index = NR_SP) and (Offset < 0) then
           InternalError(2002081104);
         reference_reset_base(ref, index, offset, sizeof(aint));
       end;
@@ -584,7 +589,7 @@ begin
       begin
         with Reference do
         begin
-          if (Index = NR_SP) and (Offset < Target_info.first_parm_offset) then
+          if (Index = NR_SP) and (Offset < 0) then
             InternalError(2002081104);
           reference_reset_base(ref, index, offset, sizeof(aint));
         end;
@@ -640,11 +645,13 @@ begin
     case hloc^.loc of
       LOC_REGISTER:
         a_load_ref_reg(list, hloc^.size, hloc^.size, href, hloc^.Register);
+      LOC_FPUREGISTER,LOC_CFPUREGISTER :
+        a_loadfpu_ref_reg(list,hloc^.size,hloc^.size,href,hloc^.register);
       LOC_REFERENCE:
-      begin
-        reference_reset_base(href2, hloc^.reference.index, hloc^.reference.offset, sizeof(aint));
-        a_load_ref_ref(list, hloc^.size, hloc^.size, href, href2);
-      end;
+        begin
+          reference_reset_base(href2, hloc^.reference.index, hloc^.reference.offset, sizeof(aint));
+          a_load_ref_ref(list, hloc^.size, hloc^.size, href, href2);
+        end;
       else
         internalerror(200408241);
     end;

+ 4 - 4
compiler/mips/cpubase.pas

@@ -74,15 +74,15 @@ unit cpubase;
 
       { Integer Super registers first and last }
       first_int_supreg = RS_R0;
-      first_int_imreg = $10;
+      first_int_imreg = $20;
 
       { Float Super register first and last }
       first_fpu_supreg    = RS_F0;
-      first_fpu_imreg     = $08;
+      first_fpu_imreg     = $20;
 
       { MM Super register first and last }
-      first_mm_supreg    = RS_NO;
-      first_mm_imreg     = RS_NO;
+      first_mm_supreg    = 0;
+      first_mm_imreg     = 1;
 
 { TODO: Calculate bsstart}
       regnumber_count_bsstart = 64;

+ 6 - 4
compiler/mips/cpupara.pas

@@ -287,12 +287,12 @@ implementation
                     if side=callerside then
                     begin
                       paraloc^.reference.index := NR_STACK_POINTER_REG;
-                      paraloc^.reference.offset:=target_info.first_parm_offset{1000}-12 - parasize;
+                      paraloc^.reference.offset:=parasize;
                     end
                     else
                     begin
                       paraloc^.reference.index := NR_FRAME_POINTER_REG;
-                      paraloc^.reference.offset:=target_info.first_parm_offset{1000}-4 - parasize;
+                      paraloc^.reference.offset:=target_info.first_parm_offset+parasize;
                       param_offset[i] := @paraloc^.reference.offset;
                     end;
                     inc(parasize,align(tcgsize2size[paraloc^.size],sizeof(aint)));
@@ -313,12 +313,12 @@ implementation
                     if side=callerside then
                       begin
                         paraloc^.reference.index := {NR_R17;//}NR_STACK_POINTER_REG;
-                        paraloc^.reference.offset:=target_info.first_parm_offset{1000}-12 - parasize;
+                        paraloc^.reference.offset:=parasize;
                       end
                     else
                       begin
                         paraloc^.reference.index := {NR_R18;//}NR_FRAME_POINTER_REG;
-                        paraloc^.reference.offset:=target_info.first_parm_offset{1000}-4 - parasize;
+                        paraloc^.reference.offset:=target_info.first_parm_offset+parasize;
                         param_offset[i] := @paraloc^.reference.offset;
                       end;
                     { Parameters are aligned at 4 bytes }
@@ -327,11 +327,13 @@ implementation
                 dec(paralen,tcgsize2size[paraloc^.size]);
               end;
           end;
+        {
         for i:=0 to paras.count-1 do
         begin
           if (side = calleeside) and (param_offset[i] <> nil) then
             param_offset[i]^ := param_offset[i]^ + parasize - 8;
         end;
+        }
       end;
 
 

+ 1 - 1
compiler/mips/rgcpu.pas

@@ -1,7 +1,7 @@
 {
     Copyright (c) 1998-2009 by Florian Klaempfl and David Zhang
 
-    This unit implements the register allocator for MIPLEL
+    This unit implements the register allocator for MIPS(EL)
 
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by

+ 9 - 6
compiler/ppcmips.lpi

@@ -1,8 +1,8 @@
 <?xml version="1.0"?>
 <CONFIG>
   <ProjectOptions>
+    <Version Value="9"/>
     <PathDelim Value="\"/>
-    <Version Value="7"/>
     <General>
       <Flags>
         <MainUnitHasUsesSectionForAllUnits Value="False"/>
@@ -13,9 +13,11 @@
       </Flags>
       <SessionStorage Value="InProjectDir"/>
       <MainUnit Value="0"/>
-      <TargetFileExt Value=".exe"/>
       <Title Value="pp"/>
     </General>
+    <BuildModes Count="1">
+      <Item1 Name="default" Default="True"/>
+    </BuildModes>
     <PublishOptions>
       <Version Value="2"/>
       <IncludeFileFilter Value="*.(pas|pp|inc|lfm|lpr|lrs|lpi|lpk|sh|xml)"/>
@@ -24,7 +26,7 @@
     <RunParams>
       <local>
         <FormatVersion Value="1"/>
-        <LaunchingApplication PathPlusParams="/usr/X11R6/bin/xterm -T 'Lazarus Run Output' -e $(LazarusDir)/tools/runwait.sh $(TargetCmdLine)"/>
+        <LaunchingApplication PathPlusParams="\usr\X11R6\bin\xterm -T 'Lazarus Run Output' -e $(LazarusDir)\tools\runwait.sh $(TargetCmdLine)"/>
       </local>
     </RunParams>
     <RequiredPackages Count="1">
@@ -57,14 +59,14 @@
     </Units>
   </ProjectOptions>
   <CompilerOptions>
-    <Version Value="8"/>
+    <Version Value="9"/>
     <PathDelim Value="\"/>
     <Target>
       <Filename Value="mips\pp"/>
     </Target>
     <SearchPaths>
-      <IncludeFiles Value="mips\"/>
-      <OtherUnitFiles Value="mips\;systems\"/>
+      <IncludeFiles Value="mips"/>
+      <OtherUnitFiles Value="mips;systems"/>
       <UnitOutputDirectory Value="mips\lazbuild"/>
     </SearchPaths>
     <Parsing>
@@ -72,6 +74,7 @@
         <CStyleOperator Value="False"/>
         <AllowLabel Value="False"/>
         <CPPInline Value="False"/>
+        <UseAnsiStrings Value="False"/>
       </SyntaxOptions>
     </Parsing>
     <Linking>