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* fix case completeness and unreachable code warnings in compiler that would
be introduced by the next commit

git-svn-id: trunk@42046 -

Jonas Maebe 6 lat temu
rodzic
commit
281b3ad276
100 zmienionych plików z 880 dodań i 190 usunięć
  1. 2 0
      compiler/aarch64/agcpugas.pas
  2. 2 0
      compiler/aarch64/aoptcpu.pas
  3. 2 0
      compiler/aarch64/aoptcpub.pas
  4. 4 2
      compiler/aarch64/cgcpu.pas
  5. 4 0
      compiler/aarch64/cpupara.pas
  6. 3 0
      compiler/aarch64/racpu.pas
  7. 2 0
      compiler/aarch64/racpugas.pas
  8. 4 0
      compiler/aarch64/rgcpu.pas
  9. 4 0
      compiler/aasmsym.pas
  10. 6 10
      compiler/aasmtai.pas
  11. 6 4
      compiler/aggas.pas
  12. 2 0
      compiler/aopt.pas
  13. 6 0
      compiler/aoptobj.pas
  14. 117 54
      compiler/arm/aasmcpu.pas
  15. 2 0
      compiler/arm/agarmgas.pas
  16. 29 1
      compiler/arm/aoptcpu.pas
  17. 16 8
      compiler/arm/aoptcpub.pas
  18. 55 2
      compiler/arm/cgcpu.pas
  19. 2 0
      compiler/arm/cpubase.pas
  20. 2 0
      compiler/arm/cpuelf.pas
  21. 2 0
      compiler/arm/cpupara.pas
  22. 5 1
      compiler/arm/cpupi.pas
  23. 5 1
      compiler/arm/narmadd.pas
  24. 3 0
      compiler/arm/narmcnv.pas
  25. 6 0
      compiler/arm/raarmgas.pas
  26. 8 0
      compiler/arm/rgcpu.pas
  27. 8 0
      compiler/assemble.pas
  28. 0 2
      compiler/cfidwarf.pas
  29. 12 0
      compiler/cgobj.pas
  30. 10 2
      compiler/dbgbase.pas
  31. 4 0
      compiler/dbgcodeview.pas
  32. 10 6
      compiler/dbgdwarf.pas
  33. 10 0
      compiler/dbgstabs.pas
  34. 4 0
      compiler/dbgstabx.pas
  35. 26 0
      compiler/defcmp.pas
  36. 12 3
      compiler/defutil.pas
  37. 0 2
      compiler/fppu.pas
  38. 2 0
      compiler/gendef.pas
  39. 6 0
      compiler/hlcg2ll.pas
  40. 8 0
      compiler/hlcgobj.pas
  41. 20 2
      compiler/htypechk.pas
  42. 43 15
      compiler/i386/aoptcpu.pas
  43. 8 0
      compiler/i386/cgcpu.pas
  44. 2 0
      compiler/i386/cpuelf.pas
  45. 10 0
      compiler/i386/cpupara.pas
  46. 6 0
      compiler/i386/n386add.pas
  47. 8 0
      compiler/i8086/aoptcpu.pas
  48. 24 0
      compiler/i8086/cgcpu.pas
  49. 2 0
      compiler/i8086/cpupara.pas
  50. 10 0
      compiler/i8086/n8086add.pas
  51. 0 8
      compiler/i8086/symcpu.pas
  52. 8 0
      compiler/jvm/agjasmin.pas
  53. 2 0
      compiler/jvm/aoptcpu.pas
  54. 2 0
      compiler/jvm/cpupara.pas
  55. 4 0
      compiler/jvm/dbgjasm.pas
  56. 16 0
      compiler/jvm/hlcgcpu.pas
  57. 8 4
      compiler/jvm/jvmdef.pas
  58. 0 2
      compiler/jvm/njvmcnv.pas
  59. 0 2
      compiler/jvm/njvmcon.pas
  60. 2 0
      compiler/jvm/njvminl.pas
  61. 8 0
      compiler/jvm/rgcpu.pas
  62. 2 2
      compiler/jvm/tgcpu.pas
  63. 4 0
      compiler/llvm/aasmllvm.pas
  64. 6 0
      compiler/llvm/agllvm.pas
  65. 8 0
      compiler/llvm/hlcgllvm.pas
  66. 0 4
      compiler/llvm/llvmdef.pas
  67. 12 0
      compiler/llvm/llvmtype.pas
  68. 2 0
      compiler/llvm/nllvmbas.pas
  69. 4 0
      compiler/llvm/nllvmld.pas
  70. 2 2
      compiler/llvm/nllvmtcon.pas
  71. 4 0
      compiler/llvm/rgllvm.pas
  72. 7 1
      compiler/mips/aasmcpu.pas
  73. 12 0
      compiler/mips/aoptcpu.pas
  74. 4 0
      compiler/mips/cgcpu.pas
  75. 8 0
      compiler/mips/cpubase.pas
  76. 2 0
      compiler/mips/cpuelf.pas
  77. 2 0
      compiler/mips/cpupara.pas
  78. 2 0
      compiler/mips/hlcgcpu.pas
  79. 2 0
      compiler/mips/itcpugas.pas
  80. 4 0
      compiler/mips/ncpuadd.pas
  81. 2 0
      compiler/mips/ncpuld.pas
  82. 51 19
      compiler/nadd.pas
  83. 2 0
      compiler/nbas.pas
  84. 10 0
      compiler/ncal.pas
  85. 12 0
      compiler/ncgbas.pas
  86. 6 0
      compiler/ncgcal.pas
  87. 0 2
      compiler/ncgcnv.pas
  88. 4 2
      compiler/ncgcon.pas
  89. 12 0
      compiler/ncgld.pas
  90. 4 0
      compiler/ncgmem.pas
  91. 4 0
      compiler/ncgnstld.pas
  92. 12 0
      compiler/ncgrtti.pas
  93. 2 0
      compiler/ncgset.pas
  94. 34 10
      compiler/ncgutil.pas
  95. 2 2
      compiler/ncgvmt.pas
  96. 12 6
      compiler/ncnv.pas
  97. 0 4
      compiler/ncon.pas
  98. 4 0
      compiler/ngenutil.pas
  99. 2 2
      compiler/ngtcon.pas
  100. 24 3
      compiler/ninl.pas

+ 2 - 0
compiler/aarch64/agcpugas.pas

@@ -180,6 +180,8 @@ unit agcpugas;
                 result:=result+']';
               AM_PREINDEXED:
                 result:=result+']!';
+              else
+                ;
             end;
           end;
       end;

+ 2 - 0
compiler/aarch64/aoptcpu.pas

@@ -159,6 +159,8 @@ Implementation
               begin
                 Result:=LookForPostindexedPattern(taicpu(p));
               end;
+            else
+              ;
           end;
         end;
     end;

+ 2 - 0
compiler/aarch64/aoptcpub.pas

@@ -142,6 +142,8 @@ Implementation
                   exit
                 end;
             end;
+          else
+            ;
         end;
     end;
 

+ 4 - 2
compiler/aarch64/cgcpu.pas

@@ -382,8 +382,6 @@ implementation
                             reference_reset_base(ref,preferred_newbasereg,ref.offset,ref.temppos,ref.alignment,ref.volatility);
                           end;
                       end
-                    else
-                      internalerror(2014110904);
                   end;
                 end;
               A_LDP,A_STP:
@@ -1305,6 +1303,8 @@ implementation
               a_load_const_reg(list,size,a,dst);
               exit;
             end;
+          else
+            ;
         end;
         case op of
           OP_ADD,
@@ -1453,6 +1453,8 @@ implementation
                     check for overflow) }
                   internalerror(2014122101);
                 end;
+              else
+                internalerror(2019050936);
             end;
           end;
         a_op_reg_reg_reg(list,op,size,src1,src2,dst);

+ 4 - 0
compiler/aarch64/cpupara.pas

@@ -208,6 +208,8 @@ unit cpupara;
             result:=def.size>16;
           stringdef :
             result:=tstringdef(def).stringtype in [st_shortstring,st_longstring];
+          else
+            ;
         end;
       end;
 
@@ -440,6 +442,8 @@ unit cpupara;
                    loc:=LOC_REFERENCE;
                  end;
              end;
+           else
+             ;
          end;
 
          { allocate registers/stack locations }

+ 3 - 0
compiler/aarch64/racpu.pas

@@ -73,6 +73,7 @@ unit racpu;
         { a 32 bit integer register could actually be 16 or 8 bit }
         if result=OS_32 then
           case oppostfix of
+            PF_NONE: ;
             PF_B:
               result:=OS_8;
             PF_SB:
@@ -81,6 +82,8 @@ unit racpu;
               result:=OS_16;
             PF_SH:
               result:=OS_S16;
+            else
+              Message(asmr_e_invalid_opcode_and_operand)
           end;
       end;
 

+ 2 - 0
compiler/aarch64/racpugas.pas

@@ -523,6 +523,8 @@ Unit racpugas;
                     end;
                 end;
             end;
+          else
+            ;
         end;
         result:=C_None;;
       end;

+ 4 - 0
compiler/aarch64/rgcpu.pas

@@ -140,6 +140,8 @@ implementation
                { ok in immediate form }
                if taicpu(p).oper[taicpu(p).ops-1]^.typ=top_const then
                  exit;
+             else
+               ;
            end;
            { add interferences for other registers }
            for i:=0 to taicpu(p).ops-1 do
@@ -163,6 +165,8 @@ implementation
                              add_edge(getsupreg(taicpu(p).oper[j]^.reg),getsupreg(taicpu(p).oper[i]^.ref^.base));
                        end;
                    end;
+                 else
+                   ;
                end;
              end;
          end;

+ 4 - 0
compiler/aasmsym.pas

@@ -53,6 +53,8 @@ implementation
         case o.typ of
           top_local :
             o.localoper^.localsymderef.build(tlocalvarsym(o.localoper^.localsym));
+          else
+            ;
         end;
       end;
 
@@ -65,6 +67,8 @@ implementation
             end;
           top_local :
             o.localoper^.localsym:=tlocalvarsym(o.localoper^.localsymderef.resolve);
+          else
+            ;
         end;
       end;
 

+ 6 - 10
compiler/aasmtai.pas

@@ -2093,8 +2093,6 @@ implementation
             value.s128val:=ppufile.getreal;
           aitrealconst_s64comp:
             value.s64compval:=comp(ppufile.getint64);
-          else
-            internalerror(2014050602);
         end;
       end;
 
@@ -2122,8 +2120,6 @@ implementation
               c:=comp(value.s64compval);
               ppufile.putint64(int64(c));
             end
-          else
-            internalerror(2014050601);
         end;
       end;
 
@@ -2152,8 +2148,6 @@ implementation
             result:=10;
           aitrealconst_s128bit:
             result:=16;
-          else
-            internalerror(2014050603);
         end;
       end;
 
@@ -2818,6 +2812,8 @@ implementation
                     add_reg_instruction_hook(self,shifterop^.rs);
                 end;
 {$endif ARM}
+              else
+                ;
              end;
           end;
       end;
@@ -2843,6 +2839,8 @@ implementation
               top_wstring:
                 donewidestring(pwstrval);
 {$endif jvm}
+              else
+                ;
             end;
             typ:=top_none;
           end;
@@ -2896,6 +2894,8 @@ implementation
                   p.oper[i]^.shifterop^:=oper[i]^.shifterop^;
                 end;
 {$endif ARM}
+              else
+                ;
             end;
           end;
         getcopy:=p;
@@ -3257,8 +3257,6 @@ implementation
               ppufile.getdata(data.reg,sizeof(TRegister));
               data.offset:=ppufile.getdword;
             end;
-        else
-          InternalError(2011091201);
         end;
       end;
 
@@ -3286,8 +3284,6 @@ implementation
               ppufile.putdata(data.reg,sizeof(TRegister));
               ppufile.putdword(data.offset);
             end;
-        else
-          InternalError(2011091202);
         end;
       end;
 

+ 6 - 4
compiler/aggas.pas

@@ -375,6 +375,8 @@ implementation
                 secname:='.data.rel.ro';
               sec_rodata_norel:
                 secname:='.rodata';
+              else
+                ;
             end;
           end;
 
@@ -508,8 +510,6 @@ implementation
                 writer.AsmWrite(',"x"');
               SF_None:
                 writer.AsmWrite(',""');
-              else
-                Internalerror(2018101502);
             end;
             case secprogbits of
               SPB_PROGBITS:
@@ -518,8 +518,6 @@ implementation
                 writer.AsmWrite(',%nobits');
               SPB_None:
                 ;
-              else
-                Internalerror(2018101503);
             end;
           end
         else
@@ -1026,6 +1024,8 @@ implementation
                              WriteDecodedUleb128(qword(tai_const(hp).value));
                            aitconst_sleb128bit:
                              WriteDecodedSleb128(int64(tai_const(hp).value));
+                           else
+                             ;
                          end
                        end
                      else
@@ -1774,6 +1774,8 @@ implementation
                 result:='.section '+objc_section_name(atype);
                 exit
               end;
+            else
+              ;
           end;
         result := inherited sectionname(atype,aname,aorder);
       end;

+ 2 - 0
compiler/aopt.pas

@@ -234,6 +234,8 @@ Unit aopt;
                           end;
                       End
                   End
+                else
+                  ;
               End;
               P := tai(p.Next);
               While Assigned(p) and

+ 6 - 0
compiler/aoptobj.pas

@@ -442,6 +442,8 @@ Unit AoptObj;
                         Include(UsedRegs, getsupreg(tai_regalloc(p).reg));
                     ra_dealloc :
                       Exclude(UsedRegs, getsupreg(tai_regalloc(p).reg));
+                    else
+                      ;
                   end;
                 end;
               p := tai(p.next);
@@ -918,6 +920,8 @@ Unit AoptObj;
                     Include(UsedRegs[getregtype(tai_regalloc(p).reg)].UsedRegs, getsupreg(tai_regalloc(p).reg));
                   ra_dealloc :
                     Exclude(UsedRegs[getregtype(tai_regalloc(p).reg)].UsedRegs, getsupreg(tai_regalloc(p).reg));
+                  else
+                    ;
                 end;
                 p := tai(p.next);
               end;
@@ -1686,6 +1690,8 @@ Unit AoptObj;
                       begin
                       end; { if is_jmp }
                   end;
+                else
+                  ;
               end;
               if assigned(p) then
                 begin

+ 117 - 54
compiler/arm/aasmcpu.pas

@@ -381,6 +381,8 @@ implementation
                    if assigned(add_reg_instruction_hook) and (i in regset^) then
                      add_reg_instruction_hook(self,newreg(R_MMREGISTER,i,regsetsubregtype));
                  end;
+             else
+               internalerror(2019050932);
            end;
          end;
       end;
@@ -1141,6 +1143,8 @@ implementation
                                           begin
                                             inc(extradataoffset,multiplier*(((tai_realconst(hp).savesize-4)+3) div 4));
                                           end;
+                                        else
+                                          ;
                                       end;
                                       { check if the same constant has been already inserted into the currently handled list,
                                         if yes, reuse it }
@@ -1200,6 +1204,8 @@ implementation
                 begin
                   inc(curinspos,multiplier*((tai_realconst(hp).savesize+3) div 4));
                 end;
+              else
+                ;
             end;
             { special case for case jump tables }
             penalty:=0;
@@ -1270,6 +1276,8 @@ implementation
                           or if we splitted them so split before }
                       CheckLimit(hp,4);
                     end;
+                  else
+                    ;
                 end;
               end;
 
@@ -1424,8 +1432,11 @@ implementation
                               end;
                           end;
                       end;
+                    else;
                   end;
                 end;
+              else
+                ;
             end;
 
             curtai:=tai(curtai.Next);
@@ -1489,8 +1500,12 @@ implementation
                             taicpu(curtai).ops:=2;
                           end;
                       end;
+                    else
+                      ;
                   end;
                 end;
+              else
+                ;
             end;
 
             curtai:=tai(curtai.Next);
@@ -1536,55 +1551,59 @@ implementation
           begin
             case curtai.typ of
               ait_instruction:
-                if IsIT(taicpu(curtai).opcode) then
-                  begin
-                    levels := GetITLevels(taicpu(curtai).opcode);
-                    if levels < 4 then
-                      begin
-                        i:=levels;
-                        hp1:=tai(curtai.Next);
-                        while assigned(hp1) and
-                          (i > 0) do
-                          begin
-                            if hp1.typ=ait_instruction then
-                              begin
-                                dec(i);
-                                if (i = 0) and
-                                  mustbelast(hp1) then
-                                  begin
-                                    hp1:=nil;
-                                    break;
-                                  end;
-                              end;
-                            hp1:=tai(hp1.Next);
-                          end;
+                begin
+                  if IsIT(taicpu(curtai).opcode) then
+                    begin
+                      levels := GetITLevels(taicpu(curtai).opcode);
+                      if levels < 4 then
+                        begin
+                          i:=levels;
+                          hp1:=tai(curtai.Next);
+                          while assigned(hp1) and
+                            (i > 0) do
+                            begin
+                              if hp1.typ=ait_instruction then
+                                begin
+                                  dec(i);
+                                  if (i = 0) and
+                                    mustbelast(hp1) then
+                                    begin
+                                      hp1:=nil;
+                                      break;
+                                    end;
+                                end;
+                              hp1:=tai(hp1.Next);
+                            end;
 
-                        if assigned(hp1) then
-                          begin
-                            // We are pointing at the first instruction after the IT block
-                            while assigned(hp1) and
-                              (hp1.typ<>ait_instruction) do
-                                hp1:=tai(hp1.Next);
-
-                            if assigned(hp1) and
-                              (hp1.typ=ait_instruction) and
-                              IsIT(taicpu(hp1).opcode) then
-                              begin
-                                if (levels+GetITLevels(taicpu(hp1).opcode) <= 4) and
-                                  ((taicpu(curtai).oper[0]^.cc=taicpu(hp1).oper[0]^.cc) or
-                                   (taicpu(curtai).oper[0]^.cc=inverse_cond(taicpu(hp1).oper[0]^.cc))) then
-                                  begin
-                                    taicpu(curtai).opcode:=getMergedInstruction(taicpu(curtai).opcode,
-                                                                                taicpu(hp1).opcode,
-                                                                                taicpu(curtai).oper[0]^.cc=inverse_cond(taicpu(hp1).oper[0]^.cc));
+                          if assigned(hp1) then
+                            begin
+                              // We are pointing at the first instruction after the IT block
+                              while assigned(hp1) and
+                                (hp1.typ<>ait_instruction) do
+                                  hp1:=tai(hp1.Next);
+
+                              if assigned(hp1) and
+                                (hp1.typ=ait_instruction) and
+                                IsIT(taicpu(hp1).opcode) then
+                                begin
+                                  if (levels+GetITLevels(taicpu(hp1).opcode) <= 4) and
+                                    ((taicpu(curtai).oper[0]^.cc=taicpu(hp1).oper[0]^.cc) or
+                                     (taicpu(curtai).oper[0]^.cc=inverse_cond(taicpu(hp1).oper[0]^.cc))) then
+                                    begin
+                                      taicpu(curtai).opcode:=getMergedInstruction(taicpu(curtai).opcode,
+                                                                                  taicpu(hp1).opcode,
+                                                                                  taicpu(curtai).oper[0]^.cc=inverse_cond(taicpu(hp1).oper[0]^.cc));
 
-                                    list.Remove(hp1);
-                                    hp1.Free;
-                                  end;
-                              end;
-                          end;
-                      end;
-                  end;
+                                      list.Remove(hp1);
+                                      hp1.Free;
+                                    end;
+                                end;
+                            end;
+                        end;
+                    end;
+                end
+              else
+                ;
             end;
 
             curtai:=tai(curtai.Next);
@@ -1611,6 +1630,8 @@ implementation
                       case taicpu(curtai).opcode of
                         A_AND: taicpu(curtai).opcode:=A_BIC;
                         A_BIC: taicpu(curtai).opcode:=A_AND;
+                        else
+                          internalerror(2019050931);
                       end;
                       taicpu(curtai).oper[2]^.val:=(not taicpu(curtai).oper[2]^.val) and $FFFFFFFF;
                     end
@@ -1623,10 +1644,14 @@ implementation
                       case taicpu(curtai).opcode of
                         A_ADD: taicpu(curtai).opcode:=A_SUB;
                         A_SUB: taicpu(curtai).opcode:=A_ADD;
+                        else
+                          internalerror(2019050930);
                       end;
                       taicpu(curtai).oper[2]^.val:=-taicpu(curtai).oper[2]^.val;
                     end;
                 end;
+              else
+                ;
             end;
 
             curtai:=tai(curtai.Next);
@@ -1674,6 +1699,8 @@ implementation
                       end;
                   end;
                 end;
+              else
+                ;
             end;
 
             curtai:=tai(curtai.Next);
@@ -1699,6 +1726,7 @@ implementation
                            (taicpu(curtai).oper[2]^.typ=top_shifterop) then
                           begin
                             case taicpu(curtai).oper[2]^.shifterop^.shiftmode of
+                              SM_NONE: ;
                               SM_LSL: taicpu(curtai).opcode:=A_LSL;
                               SM_LSR: taicpu(curtai).opcode:=A_LSR;
                               SM_ASR: taicpu(curtai).opcode:=A_ASR;
@@ -1735,8 +1763,12 @@ implementation
                       begin
                         taicpu(curtai).opcode:=A_SVC;
                       end;
+                    else
+                      ;
                   end;
                 end;
+              else
+                ;
             end;
 
             curtai:=tai(curtai.Next);
@@ -2971,6 +3003,7 @@ implementation
           shift:=0;
           typ:=0;
           case oper[op]^.shifterop^.shiftmode of
+            SM_None: ;
             SM_LSL: begin typ:=0; shift:=oper[op]^.shifterop^.shiftimm; end;
             SM_LSR: begin typ:=1; shift:=oper[op]^.shifterop^.shiftimm; if shift=32 then shift:=0; end;
             SM_ASR: begin typ:=2; shift:=oper[op]^.shifterop^.shiftimm; if shift=32 then shift:=0; end;
@@ -3983,6 +4016,8 @@ implementation
                     bytes:=bytes or ((Rd and $F) shl 12);
                     bytes:=bytes or (((Rd and $10) shr 4) shl 22);
                   end;
+                else
+                  Message(asmw_e_invalid_opcode_and_operands);
               end;
             end;
           #$41,#$91: // VMRS/VMSR
@@ -4143,6 +4178,8 @@ implementation
                         d:=(rd shr 4) and 1;
                         rd:=rd and $F;
                       end;
+                    else
+                      internalerror(2019050929);
                   end;
 
                   m:=0;
@@ -4163,6 +4200,8 @@ implementation
                         m:=(rm shr 4) and 1;
                         rm:=rm and $F;
                       end;
+                    else
+                      internalerror(2019050928);
                   end;
 
                   bytes:=bytes or (Rd shl 12);
@@ -4179,6 +4218,8 @@ implementation
                     PF_F64S32,
                     PF_F64U32:
                       bytes:=bytes or (1 shl 8);
+                    else
+                      ;
                   end;
 
                   if oppostfix in [PF_S32F32,PF_S32F64,PF_U32F32,PF_U32F64] then
@@ -4187,6 +4228,8 @@ implementation
                         PF_S32F64,
                         PF_S32F32:
                           bytes:=bytes or (1 shl 16);
+                        else
+                          ;
                       end;
 
                       bytes:=bytes or (1 shl 18);
@@ -4257,9 +4300,9 @@ implementation
 
                         rn:=16;
                       end;
-                  else
-                    Rn:=0;
-                    message(asmw_e_invalid_opcode_and_operands);
+                    else
+                      Rn:=0;
+                      message(asmw_e_invalid_opcode_and_operands);
                   end;
 
                   case oppostfix of
@@ -4271,10 +4314,10 @@ implementation
                         bytes:=bytes or (1 shl 8);
                         D:=(rd shr 4) and $1; Rd:=Rd and $F;
                       end;
-                  else
-                    begin
-                      D:=rd and $1; Rd:=Rd shr 1;
-                    end;
+                    else
+                      begin
+                        D:=rd and $1; Rd:=Rd shr 1;
+                      end;
                   end;
 
                   case oppostfix of
@@ -4283,6 +4326,8 @@ implementation
                     PF_F64U16,PF_F32U16,
                     PF_F32U32,PF_F64U32:
                       bytes:=bytes or (1 shl 16);
+                    else
+                      ;
                   end;
 
                   if oppostfix in [PF_S32F32,PF_S32F64,PF_U32F32,PF_U32F64,PF_S16F32,PF_S16F64,PF_U16F32,PF_U16F64] then
@@ -4335,6 +4380,8 @@ implementation
                       bytes:=bytes or (1 shl 23);
                     PF_DB,PF_DBS,PF_DBD,PF_DBX:
                       bytes:=bytes or (2 shl 23);
+                    else
+                      ;
                   end;
 
                   case oppostfix of
@@ -4343,6 +4390,8 @@ implementation
                         bytes:=bytes or (1 shl 8);
                         bytes:=bytes or (1 shl 0); // Offset is odd
                       end;
+                    else
+                      ;
                   end;
 
                   dp_operation:=(oper[1]^.subreg=R_SUBFD);
@@ -4634,6 +4683,8 @@ implementation
                         bytes:=bytes or ((oper[2]^.val shr 2) and $7F);
                       end;
                   end;
+                else
+                  internalerror(2019050926);
               end;
             end;
           #$65: { Thumb load/store }
@@ -4770,6 +4821,8 @@ implementation
                     else
                       bytes:=bytes or (getsupreg(oper[0]^.reg) shl 8);
                   end;
+                else
+                  internalerror(2019050925);
               end;
             end;
           #$6A: { Thumb: IT }
@@ -5375,6 +5428,8 @@ implementation
               case oppostfix of
                 PF_None,PF_IA,PF_FD: bytes:=bytes or ($1 shl 23);
                 PF_DB,PF_EA: bytes:=bytes or ($2 shl 23);
+              else
+                message1(asmw_e_invalid_opcode_and_operands, '"Invalid Postfix"');
               end;
             end;
           #$8D: { Thumb-2: BL/BLX }
@@ -5525,6 +5580,9 @@ implementation
                     PF_D: bytes:=bytes or (0 shl 22) or (1 shl 15);
                     PF_E: bytes:=bytes or (1 shl 22) or (0 shl 15);
                     PF_P: bytes:=bytes or (1 shl 22) or (1 shl 15);
+                    PF_EP: ;
+                    else
+                      message1(asmw_e_invalid_opcode_and_operands, '"Invalid postfix"');
                   end;
                 end
               else
@@ -5599,6 +5657,7 @@ implementation
                 end;
 
               case roundingmode of
+                RM_NONE: ;
                 RM_P: bytes:=bytes or (1 shl 5);
                 RM_M: bytes:=bytes or (2 shl 5);
                 RM_Z: bytes:=bytes or (3 shl 5);
@@ -5626,6 +5685,7 @@ implementation
                     bytes:=bytes or (getsupreg(oper[1]^.reg) shl 12);
 
                     case roundingmode of
+                      RM_NONE: ;
                       RM_P: bytes:=bytes or (1 shl 5);
                       RM_M: bytes:=bytes or (2 shl 5);
                       RM_Z: bytes:=bytes or (3 shl 5);
@@ -5645,6 +5705,7 @@ implementation
                     bytes:=bytes or (getsupreg(oper[1]^.reg) shl 0);
 
                     case roundingmode of
+                      RM_NONE: ;
                       RM_P: bytes:=bytes or (1 shl 5);
                       RM_M: bytes:=bytes or (2 shl 5);
                       RM_Z: bytes:=bytes or (3 shl 5);
@@ -5674,6 +5735,8 @@ implementation
                         Message(asmw_e_invalid_opcode_and_operands);
                       end;
                   end;
+                else
+                  Message1(asmw_e_invalid_opcode_and_operands, '"Unsupported opcode"');
               end;
             end;
           #$fe: // No written data

+ 2 - 0
compiler/arm/agarmgas.pas

@@ -218,6 +218,8 @@ unit agarmgas;
                     s:=s+']';
                   AM_PREINDEXED:
                     s:=s+']!';
+                  else
+                    ;
                 end;
               end;
 

+ 29 - 1
compiler/arm/aoptcpu.pas

@@ -241,6 +241,8 @@ Implementation
               instructionLoadsFromReg :=
                 (p.oper[I]^.ref^.base = reg) or
                 (p.oper[I]^.ref^.index = reg);
+            else
+              ;
           end;
           if instructionLoadsFromReg then exit; {Bailout if we found something}
           Inc(I);
@@ -300,6 +302,8 @@ Implementation
         A_POP:
           Result := (getsupreg(reg) in p.oper[0]^.regset^) or
                                    (reg=NR_STACK_POINTER_REG);
+        else
+          ;
       end;
 
       if Result then
@@ -316,6 +320,8 @@ Implementation
           Result :=
             (taicpu(p).oper[0]^.ref^.addressmode in [AM_PREINDEXED,AM_POSTINDEXED]) and
             (taicpu(p).oper[0]^.ref^.base = reg);
+        else
+          ;
       end;
     end;
 
@@ -2252,8 +2258,12 @@ Implementation
                       RemoveSuperfluousVMov(p, hp1, 'VOpVMov2VOp') then
                       Result:=true;
                   end
+                else
+                  ;
               end;
           end;
+        else
+          ;
       end;
     end;
 
@@ -2431,8 +2441,12 @@ Implementation
                                 end;
                            end;
                       end;
+                  else
+                    ;
                 end;
               end;
+            else
+              ;
           end;
           p := tai(p.next)
         end;
@@ -2512,6 +2526,8 @@ Implementation
             for r:=RS_R0 to RS_R15 do
                if r in p.oper[i]^.regset^ then
                  CheckLiveStart(newreg(R_INTREGISTER,r,R_SUBWHOLE));
+          else
+            ;
         end;
 
       { if live of any reg used by hp1 ends at hp1 and p uses this register then
@@ -2531,6 +2547,8 @@ Implementation
             for r:=RS_R0 to RS_R15 do
                if r in hp1.oper[i]^.regset^ then
                  CheckLiveEnd(newreg(R_INTREGISTER,r,R_SUBWHOLE));
+          else
+            ;
         end;
     end;
 
@@ -2727,7 +2745,11 @@ Implementation
                       A_ITETT:
                         if l=4 then taicpu(hp).opcode := A_ITET;
                       A_ITTTT:
-                        if l=4 then taicpu(hp).opcode := A_ITTT;
+                        begin
+                          if l=4 then taicpu(hp).opcode := A_ITTT;
+                        end
+                      else
+                        ;
                     end;
 
                   break;
@@ -2958,8 +2980,12 @@ Implementation
                                 end;
                            end;
                       end;
+                  else
+                    ;
                 end;
               end;
+            else
+              ;
           end;
           p := tai(p.next)
         end;
@@ -3110,6 +3136,8 @@ Implementation
                 SM_LSR: taicpu(p).opcode:=A_LSR;
                 SM_ASR: taicpu(p).opcode:=A_ASR;
                 SM_ROR: taicpu(p).opcode:=A_ROR;
+                else
+                  internalerror(2019050912);
               end;
 
               if taicpu(p).oper[2]^.shifterop^.rs<>NR_NO then

+ 16 - 8
compiler/arm/aoptcpub.pas

@@ -121,12 +121,16 @@ Implementation
       result:=false;
       case taicpu(p1).opcode of
         A_LDR:
-          { special handling for LDRD }
-          if (taicpu(p1).oppostfix=PF_D) and (getsupreg(taicpu(p1).oper[0]^.reg)+1=getsupreg(Reg)) then
-            begin
-              result:=true;
-              exit;
-            end;
+          begin
+            { special handling for LDRD }
+            if (taicpu(p1).oppostfix=PF_D) and (getsupreg(taicpu(p1).oper[0]^.reg)+1=getsupreg(Reg)) then
+              begin
+                result:=true;
+                exit;
+              end;
+          end;
+        else
+          ;
       end;
       for i:=0 to taicpu(p1).ops-1 do
         case taicpu(p1).oper[i]^.typ of
@@ -134,8 +138,12 @@ Implementation
             if (taicpu(p1).oper[i]^.reg=Reg) and (taicpu(p1).spilling_get_operation_type(i) in [operand_write,operand_readwrite]) then
               exit(true);
           top_ref:
-            if (taicpu(p1).spilling_get_operation_type_ref(i,Reg)<>operand_read) then
-              exit(true);
+            begin
+              if (taicpu(p1).spilling_get_operation_type_ref(i,Reg)<>operand_read) then
+                exit(true);
+            end
+          else
+            ;
         end;
     end;
 

+ 55 - 2
compiler/arm/cgcpu.pas

@@ -898,9 +898,11 @@ unit cgcpu;
               a_load_const_reg(list, size, a, dst);
               exit;
             end;
+          else
+            ;
         end;
         ovloc.loc:=LOC_VOID;
-        if {$ifopt R+}(a<>-2147483648) and{$endif} not setflags and is_shifter_const(-a,shift) then
+        if (a<>-2147483648) and not setflags and is_shifter_const(-a,shift) then
           case op of
             OP_ADD:
               begin
@@ -912,6 +914,8 @@ unit cgcpu;
                 op:=OP_ADD;
                 a:=aint(dword(-a));
               end
+            else
+              ;
           end;
 
         if is_shifter_const(a,shift) and not(op in [OP_IMUL,OP_MUL]) then
@@ -960,6 +964,8 @@ unit cgcpu;
                       ovloc.resflags:=F_CS;
                     OP_SUB:
                       ovloc.resflags:=F_CC;
+                    else
+                      internalerror(2019050922);
                   end;
                 end;
           end
@@ -1871,6 +1877,10 @@ unit cgcpu;
             firstfloatreg:=RS_NO;
             mmregs:=[];
             case current_settings.fputype of
+              fpu_none,
+              fpu_soft,
+              fpu_libgcc:
+                ;
               fpu_fpa,
               fpu_fpa10,
               fpu_fpa11:
@@ -1896,6 +1906,8 @@ unit cgcpu;
                     as the even ones by with a different subtype as it is done on x86 with al/ah }
                   mmregs:=(rg[R_MMREGISTER].used_in_proc-paramanager.get_volatile_registers_mm(pocall_stdcall))*[0..31];
                 end;
+              else
+                internalerror(2019050924);
             end;
             a_reg_alloc(list,NR_STACK_POINTER_REG);
             if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
@@ -2080,6 +2092,8 @@ unit cgcpu;
                      if mmregs<>[] then
                        list.concat(taicpu.op_ref_regset(A_VSTM,ref,R_MMREGISTER,R_SUBFD,mmregs));
                    end;
+                 else
+                   internalerror(2019050923);
                end;
              end;
           end;
@@ -2109,6 +2123,10 @@ unit cgcpu;
             mmregs:=[];
             saveregs:=[];
             case current_settings.fputype of
+              fpu_none,
+              fpu_soft,
+              fpu_libgcc:
+                ;
               fpu_fpa,
               fpu_fpa10,
               fpu_fpa11:
@@ -2138,6 +2156,8 @@ unit cgcpu;
                     as the even ones by with a different subtype as it is done on x86 with al/ah }
                   mmregs:=(rg[R_MMREGISTER].used_in_proc-paramanager.get_volatile_registers_mm(pocall_stdcall))*[0..31];
                 end;
+              else
+                internalerror(2019050926);
             end;
 
             if (firstfloatreg<>RS_NO) or
@@ -2186,6 +2206,8 @@ unit cgcpu;
                      if mmregs<>[] then
                        list.concat(taicpu.op_ref_regset(A_VLDM,ref,R_MMREGISTER,R_SUBFD,mmregs));
                     end;
+                  else
+                    internalerror(2019050921);
                 end;
               end;
 
@@ -3044,6 +3066,8 @@ unit cgcpu;
         case instr.opcode of
           A_VMOV:
             add_move_instruction(instr);
+          else
+            ;
         end;
       end;
 
@@ -3073,6 +3097,10 @@ unit cgcpu;
               if (fromsize<>tosize) then
                 internalerror(2009112901);
             end;
+          OS_F32,OS_F64:
+            ;
+          else
+            internalerror(2019050920);
         end;
 
         if (fromsize<>tosize) then
@@ -3134,6 +3162,10 @@ unit cgcpu;
               if (fromsize<>tosize) then
                 internalerror(2009112901);
             end;
+          OS_F32,OS_F64:
+            ;
+          else
+            internalerror(2019050919);
         end;
 
         if (fromsize<>tosize) then
@@ -3347,6 +3379,8 @@ unit cgcpu;
           OP_NEG,
           OP_NOT :
             internalerror(2012022501);
+          else
+            ;
         end;
         if (setflags or tbasecgarm(cg).cgsetflags) and (op in [OP_ADD,OP_SUB]) then
           begin
@@ -3411,6 +3445,8 @@ unit cgcpu;
                     ovloc.resflags:=F_CS;
                   OP_SUB:
                     ovloc.resflags:=F_CC;
+                  else
+                    internalerror(2019050918);
                 end;
               end;
           end
@@ -3484,6 +3520,8 @@ unit cgcpu;
           OP_NEG,
           OP_NOT :
             internalerror(2012022502);
+          else
+            ;
         end;
         if (setflags or tbasecgarm(cg).cgsetflags) and (op in [OP_ADD,OP_SUB]) then
           begin
@@ -3512,6 +3550,8 @@ unit cgcpu;
                     ovloc.resflags:=F_CS;
                   OP_SUB:
                     ovloc.resflags:=F_CC;
+                  else
+                    internalerror(2019050917);
                 end;
               end;
           end
@@ -4087,6 +4127,8 @@ unit cgcpu;
                 op:=OP_ADD;
                 a:=aint(dword(-a));
               end
+            else
+              ;
           end;
 
         if is_thumb_imm(a) and (op in [OP_ADD,OP_SUB]) then
@@ -4106,6 +4148,8 @@ unit cgcpu;
                   OP_SUB:
                     //!!! ovloc.resflags:=F_CC;
                     ;
+                  else
+                    ;
                 end;
               end;
           end
@@ -4435,6 +4479,11 @@ unit cgcpu;
               OS_S8: list.concat(taicpu.op_reg_reg(A_SXTB,dst,dst));
               OS_16: list.concat(taicpu.op_reg_reg(A_UXTH,dst,dst));
               OS_S16: list.concat(taicpu.op_reg_reg(A_SXTH,dst,dst));
+              OS_32,
+              OS_S32:
+                ;
+              else
+                internalerror(2019050916);
             end;
           end
         else
@@ -4450,7 +4499,7 @@ unit cgcpu;
         l1 : longint;
       begin
         ovloc.loc:=LOC_VOID;
-        if {$ifopt R+}(a<>-2147483648) and{$endif} is_shifter_const(-a,shift) then
+        if (a<>-2147483648) and is_shifter_const(-a,shift) then
           case op of
             OP_ADD:
               begin
@@ -4462,6 +4511,8 @@ unit cgcpu;
                 op:=OP_ADD;
                 a:=aint(dword(-a));
               end
+            else
+              ;
           end;
 
         if is_shifter_const(a,shift) and not(op in [OP_IMUL,OP_MUL]) then
@@ -4566,6 +4617,8 @@ unit cgcpu;
                       ovloc.resflags:=F_CS;
                     OP_SUB:
                       ovloc.resflags:=F_CC;
+                    else
+                      ;
                   end;
                 end;
           end

+ 2 - 0
compiler/arm/cpubase.pas

@@ -770,6 +770,8 @@ unit cpubase;
                       ((((doublerec.bytes[6] and $7f)=$40) and ((doublerec.bytes[7] and $c0)=0)) or
                        (((doublerec.bytes[6] and $7f)=$3f) and ((doublerec.bytes[7] and $c0)=$c0)));
             end;
+          else
+            ;
         end;
       end;
 

+ 2 - 0
compiler/arm/cpuelf.pas

@@ -588,6 +588,8 @@ implementation
               data.Write(zero,4);
               continue;
             end;
+          else
+            ;
         end;
 
         if (objreloc.flags and rf_raw)=0 then

+ 2 - 0
compiler/arm/cpupara.pas

@@ -232,6 +232,8 @@ unit cpupara;
             result:=not is_smallset(def);
           stringdef :
             result:=tstringdef(def).stringtype in [st_shortstring,st_longstring];
+          else
+            ;
         end;
       end;
 

+ 5 - 1
compiler/arm/cpupi.pas

@@ -57,7 +57,7 @@ unit cpupi;
   implementation
 
     uses
-       globals,systems,
+       globals,systems,verbose,
        cpubase,
        tgobj,
        symconst,symtype,symsym,symcpu,paramgr,
@@ -156,6 +156,10 @@ unit cpupi;
             maxpushedparasize:=align(maxpushedparasize,max(current_settings.alignment.localalignmin,4));
             floatsavesize:=0;
             case current_settings.fputype of
+              fpu_none,
+              fpu_soft,
+              fpu_libgcc:
+                ;
               fpu_fpa,
               fpu_fpa10,
               fpu_fpa11:

+ 5 - 1
compiler/arm/narmadd.pas

@@ -344,7 +344,7 @@ interface
               cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
               current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg(A_VMRS, NR_APSR_nzcv, NR_FPSCR));
             end;
-          fpu_soft:
+          else
             { this case should be handled already by pass1 }
             internalerror(2009112404);
         end;
@@ -517,6 +517,8 @@ interface
                         cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
                         nodetype:=oldnodetype;
                      end;
+                   else
+                     ;
                 end;
                 cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
                 current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register64.reglo,right.location.register64.reglo));
@@ -647,6 +649,8 @@ interface
                   if notnode then
                     result:=cnotnode.create(result);
                 end;
+              else
+                internalerror(2019050933);
             end;
           end
         else

+ 3 - 0
compiler/arm/narmcnv.pas

@@ -278,6 +278,9 @@ implementation
               else
                 current_asmdata.CurrAsmList.concat(setoppostfix(taicpu.op_reg_reg(A_VCVT,location.register,left.location.register), PF_F32U32));
             end;
+          else
+            { should be handled in pass 1 }
+            internalerror(2019050934);
         end;
       end;
 

+ 6 - 0
compiler/arm/raarmgas.pas

@@ -724,6 +724,8 @@ Unit raarmgas;
                         end;
                     end;
                 end;
+              else
+               ;
             end;
           end;
 
@@ -817,6 +819,8 @@ Unit raarmgas;
                   oper.opr.ref.base:=NR_PC;
                   oper.opr.ref.symbol:=GetConstLabel(sym,val);
                 end;
+              else
+                ;
             end;
           end;
 
@@ -1143,6 +1147,8 @@ Unit raarmgas;
               else
                 Message(asmr_e_invalid_operand_type); // Otherwise it would have been seen as a AS_REGISTER
             end;
+          else
+            Message(asmr_e_invalid_operand_type);
         end;
       end;
 

+ 8 - 0
compiler/arm/rgcpu.pas

@@ -166,6 +166,8 @@ unit rgcpu;
                     if current_procinfo.framepointer<>r then
                       add_edge(getsupreg(taicpu(p).oper[1]^.ref^.base),getsupreg(r));
                   end;
+              else
+                ;
             end;
           end;
       end;
@@ -353,6 +355,8 @@ unit rgcpu;
                 RS_S21,RS_S23,RS_S25,RS_S27,RS_S29,RS_S31] do
                 add_edge(supreg,i);
             end;
+          else
+            ;
         end;
       end;
 
@@ -606,6 +610,8 @@ unit rgcpu;
                     if current_procinfo.framepointer<>r then
                       add_edge(getsupreg(taicpu(p).oper[1]^.ref^.base),getsupreg(r));
                   end;
+              else
+                ;
             end;
           end;
       end;
@@ -658,6 +664,8 @@ unit rgcpu;
                        add_edge(getsupreg(taicpu(p).oper[0]^.reg),i);
                      end;
                  end;
+              else
+                ;
             end;
           end;
       end;

+ 8 - 0
compiler/assemble.pas

@@ -1681,6 +1681,8 @@ Implementation
              ait_cutobject :
                if SmartAsm then
                 break;
+             else
+               ;
            end;
            hp:=Tai(hp.next);
          end;
@@ -1826,6 +1828,8 @@ Implementation
                      internalerror(2010011102);
                  end;
                end;
+             else
+               ;
            end;
            hp:=Tai(hp.next);
          end;
@@ -2092,6 +2096,8 @@ Implementation
                          ));
                      end;
 {$endif OMFOBJSUPPORT}
+                   else
+                     ;
                  end
                end;
              ait_symbolpair:
@@ -2112,6 +2118,8 @@ Implementation
              ait_seh_directive :
                tai_seh_directive(hp).generate_code(objdata);
 {$endif DISABLE_WIN64_SEH}
+             else
+               ;
            end;
            hp:=Tai(hp.next);
          end;

+ 0 - 2
compiler/cfidwarf.pas

@@ -213,8 +213,6 @@ implementation
                 list.concat(tai_const.create_rel_sym(enc2ait_const[oper[i].enc],oper[i].beginsym,oper[i].endsym));
               dop_reg :
                 list.concat(tai_const.create(enc2ait_const[oper[i].enc],dwarf_reg(oper[i].register)));
-              else
-                internalerror(200404128);
             end;
           end;
       end;

+ 12 - 0
compiler/cgobj.pas

@@ -1793,10 +1793,14 @@ implementation
                 a:=a and 15;
               OS_8,OS_S8:
                 a:=a and 7;
+              else
+                internalerror(2019050521);
             end;
             if a = 0 then
               op:=OP_NONE;
           end;
+        else
+          ;
         end;
       end;
 
@@ -2123,6 +2127,8 @@ implementation
                     a_load_const_reg(list,OS_16,0,dst);
                     exit;
                   end;
+                else
+                  ;
               end;
           end;
         OP_SHR:
@@ -2135,9 +2141,13 @@ implementation
                     a_load_const_reg(list,OS_16,0,GetNextReg(dst));
                     exit;
                   end;
+                else
+                  ;
               end;
           end;
 {$endif cpu16bitalu}
+        else
+          ;
       end;
       a_load_reg_reg(list,size,size,src,dst);
       a_op_const_reg(list,op,size,a,dst);
@@ -2787,6 +2797,8 @@ implementation
               { a_load_ref_reg will turn this into a pic-load if needed }
               a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
             end;
+          else
+            ;
         end;
       end;
 

+ 10 - 2
compiler/dbgbase.pas

@@ -339,8 +339,6 @@ implementation
                       else
                         internalerror(2012072402);
                     end;
-                  else
-                    internalerror(200610054);
                 end;
               end;
             looplist.clear;
@@ -476,6 +474,8 @@ implementation
             list.concat(tai_comment.Create(strpnew('Defs - Begin Staticsymtable')));
           globalsymtable :
             list.concat(tai_comment.Create(strpnew('Defs - Begin unit '+st.name^+' has index '+tostr(st.moduleid))));
+          else
+            ;
         end;
         repeat
           nonewadded:=true;
@@ -494,6 +494,8 @@ implementation
             list.concat(tai_comment.Create(strpnew('Defs - End Staticsymtable')));
           globalsymtable :
             list.concat(tai_comment.Create(strpnew('Defs - End unit '+st.name^+' has index '+tostr(st.moduleid))));
+          else
+            ;
         end;
       end;
 
@@ -528,6 +530,8 @@ implementation
             list.concat(tai_comment.Create(strpnew('Syms - Begin Staticsymtable')));
           globalsymtable :
             list.concat(tai_comment.Create(strpnew('Syms - Begin unit '+st.name^+' has index '+tostr(st.moduleid))));
+          else
+            ;
         end;
         for i:=0 to st.SymList.Count-1 do
           begin
@@ -545,6 +549,8 @@ implementation
             list.concat(tai_comment.Create(strpnew('Syms - End Staticsymtable')));
           globalsymtable :
             list.concat(tai_comment.Create(strpnew('Syms - End unit '+st.name^+' has index '+tostr(st.moduleid))));
+          else
+            ;
         end;
       end;
 
@@ -568,6 +574,8 @@ implementation
                 begin
                   write_symtable_procdefs(list,tabstractrecorddef(def).symtable);
                 end;
+              else
+                ;
             end;
           end;
       end;

+ 4 - 0
compiler/dbgcodeview.pas

@@ -229,8 +229,12 @@ implementation
                       inc(nolineinfolevel);
                     mark_NoLineInfoEnd:
                       dec(nolineinfolevel);
+                    else
+                      ;
                   end;
                 end;
+              else
+                ;
             end;
 
             { OMF LINNUM records do not support multiple source files }

+ 10 - 6
compiler/dbgdwarf.pas

@@ -1110,6 +1110,8 @@ implementation
             appendsym_property(TAsmList(arg),tpropertysym(p));
           constsym:
             appendsym_const_member(TAsmList(arg),tconstsym(p),true);
+          else
+            ;
         end;
       end;
 
@@ -1365,8 +1367,6 @@ implementation
             append_attribute(DW_AT_address_class,DW_FORM_data1,[DW_ADDR_far16]);
           x86pt_huge:
             append_attribute(DW_AT_address_class,DW_FORM_data1,[DW_ADDR_huge16]);
-          else
-            internalerror(2018052401);
         end;
 {$else i8086}
         { Theoretically, we could do this, but it might upset some debuggers, }
@@ -3166,8 +3166,6 @@ implementation
               templist.free;
               exit;
             end;
-          else
-            internalerror(2013120111);
         end;
 
         append_entry(DW_TAG_variable,false,[
@@ -3511,8 +3509,6 @@ implementation
             append_attribute(DW_AT_WATCOM_memory_model,DW_FORM_data1,[DW_WATCOM_MEMORY_MODEL_large]);
           mm_huge:
             append_attribute(DW_AT_WATCOM_memory_model,DW_FORM_data1,[DW_WATCOM_MEMORY_MODEL_huge]);
-          else
-            internalerror(2018052402);
         end;
 {$endif i8086}
 
@@ -3681,14 +3677,18 @@ implementation
         procedure TDebugInfoDwarf.append_visibility(vis: tvisibility);
       begin
         case vis of
+          vis_hidden,
           vis_private,
           vis_strictprivate:
             append_attribute(DW_AT_accessibility,DW_FORM_data1,[ord(DW_ACCESS_private)]);
           vis_protected,
           vis_strictprotected:
             append_attribute(DW_AT_accessibility,DW_FORM_data1,[ord(DW_ACCESS_protected)]);
+          vis_published,
           vis_public:
             { default };
+          vis_none:
+            internalerror(2019050720);
         end;
       end;
 
@@ -3754,8 +3754,12 @@ implementation
                       inc(nolineinfolevel);
                     mark_NoLineInfoEnd:
                       dec(nolineinfolevel);
+                    else
+                      ;
                   end;
                 end;
+              else
+                ;
             end;
 
             if (currsectype=sec_code) and

+ 10 - 0
compiler/dbgstabs.pas

@@ -516,6 +516,10 @@ implementation
                         argnames:=argnames+'3out';
                       vs_constref :
                         argnames:=argnames+'8constref';
+                      vs_value :
+                        ;
+                      vs_final:
+                        internalerror(2019050911);
                     end;
                   end
                 else
@@ -1079,6 +1083,8 @@ implementation
                         def.dbg_state:=dbg_state_queued;
                         break;
                       end;
+                    else
+                      ;
                   end;
                 end;
               appenddef(list,vmtarraytype);
@@ -1106,6 +1112,8 @@ implementation
                       appenddef(list,TImplementedInterface(anc.ImplementedInterfaces[i]).IntfDef);
                 end;
             end;
+          else
+            ;
         end;
       end;
 
@@ -1760,6 +1768,8 @@ implementation
                 currfuncname:=tai_function_name(hp).funcname;
               ait_force_line :
                 lastfileinfo.line:=-1;
+              else
+                ;
             end;
 
             if (currsectype=sec_code) and

+ 4 - 0
compiler/dbgstabx.pas

@@ -341,8 +341,12 @@ implementation
                     inc(nolineinfolevel);
                   mark_NoLineInfoEnd:
                     dec(nolineinfolevel);
+                  else
+                    ;
                 end;
               end;
+            else
+              ;
           end;
 
           if (currsectype=sec_code) and

+ 26 - 0
compiler/defcmp.pas

@@ -507,6 +507,8 @@ implementation
                          doconv:=tc_cstring_2_int;
                        end;
                    end;
+                 else
+                   ;
                end;
              end;
 
@@ -615,6 +617,8 @@ implementation
                                    eq:=te_convert_l6;
                                end;
                              end;
+                           else
+                             ;
                          end;
                        end;
                    end;
@@ -794,6 +798,8 @@ implementation
                            end;
                       end;
                    end;
+                 else
+                   ;
                end;
              end;
 
@@ -851,6 +857,8 @@ implementation
                            end;
                        end;
                    end;
+                 else
+                   ;
                end;
              end;
 
@@ -943,6 +951,8 @@ implementation
                            end;
                        end;
                    end;
+                 else
+                   ;
                end;
              end;
 
@@ -1213,6 +1223,8 @@ implementation
                               eq:=te_convert_l1;
                            end;
                       end;
+                    else
+                      ;
                   end;
                 end;
              end;
@@ -1256,6 +1268,8 @@ implementation
                              eq:=te_convert_l1;
                            end;
                        end;
+                     else
+                       ;
                    end;
                  end;
              end;
@@ -1542,6 +1556,8 @@ implementation
                          eq:=te_convert_l2;
                        end;
                    end;
+                 else
+                   ;
                end;
              end;
 
@@ -1582,6 +1598,8 @@ implementation
                         eq:=te_convert_l1;
                       end;
                    end;
+                 else
+                   ;
                end;
              end;
 
@@ -1638,6 +1656,8 @@ implementation
                          eq:=te_convert_l1;
                        end;
                    end;
+                 else
+                   ;
                end;
              end;
 
@@ -1889,6 +1909,8 @@ implementation
                 if not (def_from.typ in [abstractdef,errordef]) then
                   eq:=te_convert_l6;
              end;
+           else
+             ;
         end;
 
         { if we didn't find an appropriate type conversion yet
@@ -1978,6 +2000,10 @@ implementation
                   is_subequal:=(torddef(def2).ordtype=uwidechar);
                 customint:
                   is_subequal:=(torddef(def2).low=torddef(def1).low) and (torddef(def2).high=torddef(def1).high);
+                u128bit, s128bit,
+                scurrency,
+                uvoid:
+                  ;
               end;
             end
            else

+ 12 - 3
compiler/defutil.pas

@@ -1057,6 +1057,8 @@ implementation
                1: l := l and $ff;
                2: l := l and $ffff;
                4: l := l and $ffffffff;
+               else
+                 ;
              end;
              {reset sign, i.e. converting -1 to qword changes the value to high(qword)}
              l.signed:=false;
@@ -1067,6 +1069,8 @@ implementation
                   1: l.svalue := shortint(l.svalue);
                   2: l.svalue := smallint(l.svalue);
                   4: l.svalue := longint(l.svalue);
+                  else
+                    ;
                 end;
                 l.signed:=true;
               end;
@@ -1113,6 +1117,8 @@ implementation
                 case tfloatdef(tarraydef(p).elementdef).floattype of
                   s32real:
                     mmx_type:=mmxsingle;
+                  else
+                    ;
                 end
               else
                 case torddef(tarraydef(p).elementdef).ordtype of
@@ -1128,6 +1134,8 @@ implementation
                      mmx_type:=mmxu32bit;
                    s32bit:
                      mmx_type:=mmxs32bit;
+                   else
+                     ;
                 end;
            end;
       end;
@@ -1462,7 +1470,6 @@ implementation
       As of today, both signed and unsigned types from 8 to 64 bits are supported. }
     function is_automatable(p : tdef) : boolean;
       begin
-        result:=false;
         case p.typ of
           orddef:
             result:=torddef(p).ordtype in [u8bit,s8bit,u16bit,s16bit,u32bit,s32bit,
@@ -1475,6 +1482,8 @@ implementation
             result:=true;
           objectdef:
             result:=tobjectdef(p).objecttype in [odt_interfacecom,odt_dispinterface,odt_interfacecorba];
+          else
+            result:=false;
         end;
       end;
 
@@ -1554,6 +1563,8 @@ implementation
               result:=torddef(s64inttype);
             s64bit:
               result:=torddef(u64inttype);
+            else
+              ;
           end;
       end;
 
@@ -1647,8 +1658,6 @@ implementation
                 result:=tkWString;
               st_unicodestring:
                 result:=tkUString;
-              else
-                result:=tkUnknown;
             end;
           enumdef:
             result:=tkEnumeration;

+ 0 - 2
compiler/fppu.pas

@@ -1354,8 +1354,6 @@ var
             list:=publicasmsyms;
           ualt_extern:
             list:=externasmsyms;
-          else
-            internalerror(2016060301);
         end;
         c:=ppufile.getlongint;
         for i:=0 to c-1 do

+ 2 - 0
compiler/gendef.pas

@@ -136,6 +136,8 @@ begin
         if dllversion<>'' then
           writeln(t,'VERSION '+dllversion);
       end;
+    else
+      ;
   end;
 
 {write imports}

+ 6 - 0
compiler/hlcg2ll.pas

@@ -1339,6 +1339,8 @@ implementation
                if getsupreg(paraloc.register)<first_fpu_imreg then
                  cg.getcpuregister(list,paraloc.register);
              end;
+           else
+             ;
          end;
       end;
 
@@ -1620,6 +1622,8 @@ implementation
                if getsupreg(paraloc.register)<first_fpu_imreg then
                  cg.ungetcpuregister(list,paraloc.register);
              end;
+           else
+             ;
          end;
       end;
 
@@ -2151,6 +2155,8 @@ implementation
               result:=OS_F64;
             OS_128:
               result:=OS_M128;
+            else
+              ;
           end;
         end;
     end;

+ 8 - 0
compiler/hlcgobj.pas

@@ -4469,6 +4469,8 @@ implementation
         inn,
         asn,isn:
           result := fen_norecurse_false;
+        else
+          ;
       end;
     end;
 
@@ -4549,6 +4551,8 @@ implementation
         potype_unitinit,
         potype_proginit:
           TSymtable(current_module.localsymtable).SymList.ForEachCall(@initialize_regvars,list);
+        else
+          ;
       end;
 
       { initialises temp. ansi/wide string data }
@@ -4599,6 +4603,8 @@ implementation
                      std_regname(vs.initialloc.reference.base)+tostr_with_plus(vs.initialloc.reference.offset)+
                      ', size='+tcgsize2str(vs.initialloc.size))));
               end;
+            else
+              ;
           end;
         end;
       vs.localloc:=vs.initialloc;
@@ -4881,6 +4887,8 @@ implementation
                      end;
                  end;
              end;
+           else
+             ;
          end;
        end;
     end;

+ 20 - 2
compiler/htypechk.pas

@@ -605,6 +605,8 @@ implementation
 
               result:=true;
             end;
+          else
+            ;
         end;
       end;
 
@@ -773,7 +775,11 @@ implementation
                   optoken:=_OP_INC;
                 in_dec_x:
                   optoken:=_OP_DEC;
+                else
+                  ;
              end;
+           else
+             ;
         end;
         if (optoken=NOTOKEN) then
           begin
@@ -897,6 +903,8 @@ implementation
                     optoken:=_GT;
                   _GTE:
                     optoken:=_LT;
+                  else
+                    ;
                 end;
                 candidates:=tcallcandidates.create_operator(optoken,ppn);
               end;
@@ -1259,6 +1267,8 @@ implementation
                          pointer itself is read and never written }
                        newstate := vs_read;
                      end;
+                   else
+                     ;
                end;
                  p:=tunarynode(p).left;
                end;
@@ -1361,6 +1371,8 @@ implementation
                    vs_readwritten:
                      if not(nf_write in tloadnode(p).flags) then
                        include(tloadnode(p).flags,nf_modify);
+                   else
+                     ;
                  end;
                  break;
                end;
@@ -1484,6 +1496,8 @@ implementation
                    gotrecord:=true;
                  stringdef :
                    gotstring:=true;
+                 else
+                   ;
                end;
                if (valid_property in opts) then
                  begin
@@ -1626,6 +1640,8 @@ implementation
                            exit
                          end;
                      end;
+                   else
+                     ;
                  end;
                  hp:=ttypeconvnode(hp).left;
                end;
@@ -2056,6 +2072,8 @@ implementation
                  (tfiledef(def_to).filetyp = ft_untyped) then
                 eq:=te_convert_l1;
             end;
+          else
+            ;
         end;
       end;
 
@@ -2133,6 +2151,8 @@ implementation
                     end
                 end;
             end;
+          else
+            ;
         end;
       end;
 
@@ -3122,8 +3142,6 @@ implementation
                   inc(hp^.coper_count);
                 te_incompatible :
                   hp^.invalid:=true;
-                else
-                  internalerror(200212072);
               end;
 
               { stop checking when an incompatible parameter is found }

+ 43 - 15
compiler/i386/aoptcpu.pas

@@ -104,17 +104,23 @@ begin
                 if PrePeepholeOptSxx(p) then
                   continue;
               A_XOR:
-                if (taicpu(p).oper[0]^.typ = top_reg) and
-                   (taicpu(p).oper[1]^.typ = top_reg) and
-                   (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
-                 { temporarily change this to 'mov reg,0' to make it easier }
-                 { for the CSE. Will be changed back in pass 2              }
-                  begin
-                    taicpu(p).opcode := A_MOV;
-                    taicpu(p).loadConst(0,0);
-                  end;
+                begin
+                  if (taicpu(p).oper[0]^.typ = top_reg) and
+                     (taicpu(p).oper[1]^.typ = top_reg) and
+                     (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
+                   { temporarily change this to 'mov reg,0' to make it easier }
+                   { for the CSE. Will be changed back in pass 2              }
+                    begin
+                      taicpu(p).opcode := A_MOV;
+                      taicpu(p).loadConst(0,0);
+                    end;
+                end;
+              else
+                ;
             end;
           end;
+        else
+          ;
       end;
       p := tai(p.next)
     end;
@@ -395,6 +401,8 @@ begin
                           case taicpu(hp1).condition of
                             C_LE: taicpu(hp3).condition := C_GE;
                             C_BE: taicpu(hp3).condition := C_AE;
+                            else
+                              internalerror(2019050903);
                           end;
                           asml.remove(p);
                           asml.remove(hp1);
@@ -573,11 +581,17 @@ begin
                     if OptPass1MOVXX(p) then
                       continue;
                   A_SETcc:
-                   if OptPass1SETcc(p) then
-                     continue;
+                    begin
+                      if OptPass1SETcc(p) then
+                        continue;
+                    end
+                  else
+                    ;
                 end;
             end; { if is_jmp }
           end;
+        else
+          ;
       end;
       updateUsedRegs(UsedRegs,p);
       p:=tai(p.next);
@@ -616,10 +630,16 @@ begin
                 if OptPass2Jmp(p) then
                   continue;
               A_MOV:
-                if OptPass2MOV(p) then
-                  continue;
+                begin
+                  if OptPass2MOV(p) then
+                    continue;
+                end
+              else
+                ;
             end;
           end;
+        else
+          ;
       end;
       p := tai(p.next)
     end;
@@ -684,6 +704,8 @@ begin
                                   setsubreg(taicpu(p).oper[1]^.reg,R_SUBL);
                                 end;
                             end;
+                          else
+                            ;
                         end
                       else if (taicpu(p).oper[0]^.typ = top_ref) and
                           (taicpu(p).oper[0]^.ref^.base <> taicpu(p).oper[1]^.reg) and
@@ -704,10 +726,16 @@ begin
                         end;
                  end;
               A_TEST, A_OR:
-                if PostPeepholeOptTestOr(p) then
-                  Continue;
+                begin
+                  if PostPeepholeOptTestOr(p) then
+                    Continue;
+                end;
+              else
+                ;
             end;
           end;
+        else
+          ;
       end;
       p := tai(p.next)
     end;

+ 8 - 0
compiler/i386/cgcpu.pas

@@ -513,6 +513,8 @@ unit cgcpu;
           S_B : list.concat(Taicpu.Op_none(A_MOVSB,S_NO));
           S_W : list.concat(Taicpu.Op_none(A_MOVSW,S_NO));
           S_L : list.concat(Taicpu.Op_none(A_MOVSD,S_NO));
+          else
+            internalerror(2019050901);
         end;
         ungetcpuregister(list,NR_EDI);
         ungetcpuregister(list,NR_ECX);
@@ -872,6 +874,8 @@ unit cgcpu;
               cg.ungetcpuregister(list,NR_ECX);
               exit;
             end;
+          else
+            ;
         end;
         get_64bit_ops(op,op1,op2);
         if op in [OP_ADD,OP_SUB] then
@@ -939,6 +943,8 @@ unit cgcpu;
                           list.concat(taicpu.op_const_reg(A_RCR,S_L,value,reg.reglo));
                           cg.a_reg_dealloc(list,NR_DEFAULTFLAGS);
                         end;
+                      else
+                        internalerror(2019050902);
                     end
                   else if value>31 then
                     case op of
@@ -1052,6 +1058,8 @@ unit cgcpu;
                           list.concat(taicpu.op_const_ref(A_RCR,S_L,value,tempref));
                           cg.a_reg_dealloc(list,NR_DEFAULTFLAGS);
                         end;
+                      else
+                        internalerror(2019050901);
                     end
                   else if value>31 then
                     case op of

+ 2 - 0
compiler/i386/cpuelf.pas

@@ -334,6 +334,8 @@ implementation
                 data.Write(zero,4);
                 continue;
               end;
+            else
+              ;
           end;
 
           if (objreloc.flags and rf_raw)=0 then

+ 10 - 0
compiler/i386/cpupara.pas

@@ -113,6 +113,8 @@ unit cpupara;
                        exit;
                      end;
                   end;
+                else
+                  ;
               end;
             end;
           system_i386_os2,
@@ -130,6 +132,8 @@ unit cpupara;
                        exit;
                      end;
                   end;
+                else
+                  ;
               end;
             end;
           system_i386_freebsd,
@@ -157,9 +161,13 @@ unit cpupara;
                         result:=false;
                         exit;
                       end;
+                    else
+                      ;
                   end;
               end;
             end;
+          else
+            ;
         end;
         result:=inherited ret_in_param(def,pd);
       end;
@@ -234,6 +242,8 @@ unit cpupara;
             result:=not(calloption in cdecl_pocalls) and not tprocvardef(def).is_addressonly;
           setdef :
             result:=not(calloption in cdecl_pocalls) and (not is_smallset(def));
+          else
+            ;
         end;
       end;
 

+ 6 - 0
compiler/i386/n386add.pas

@@ -280,6 +280,8 @@ interface
                 cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.falselabel);
               unequaln:
                 cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.truelabel);
+              else
+                internalerror(2019050905);
            end;
         end;
 
@@ -305,6 +307,8 @@ interface
                    cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.truelabel);
                    cg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
                 end;
+              else
+                internalerror(2019050904);
            end;
         end;
 
@@ -332,6 +336,8 @@ interface
             case getresflags(true) of
               F_AE: hlab:=location.truelabel ;
               F_B:  hlab:=location.falselabel;
+              else
+                ;
             end;
           end;
 

+ 8 - 0
compiler/i8086/aoptcpu.pas

@@ -138,8 +138,12 @@ unit aoptcpu;
                   end;
                 A_SUB:
                   result:=OptPass1Sub(p);
+                else
+                  ;
               end;
             end
+          else
+            ;
         end;
       end;
 
@@ -159,8 +163,12 @@ unit aoptcpu;
                 A_OR,
                 A_TEST:
                   Result:=PostPeepholeOptTestOr(p);
+                else
+                  ;
               end;
             end;
+          else
+            ;
         end;
       end;
 

+ 24 - 0
compiler/i8086/cgcpu.pas

@@ -2286,6 +2286,8 @@ unit cgcpu;
                   list.concat(ai);
                   invf:=FPUFlags2Flags[invf];
                 end;
+              else
+                ;
             end;
             a_jmp_flags(list,invf,hl_skip);
 
@@ -2570,6 +2572,8 @@ unit cgcpu;
             case opsize of
               S_B : list.concat(Taicpu.Op_none(A_MOVSB,S_NO));
               S_W : list.concat(Taicpu.Op_none(A_MOVSW,S_NO));
+              else
+                internalerror(2019051019);
             end;
           end;
         ungetcpuregister(list,NR_DI);
@@ -2936,6 +2940,8 @@ unit cgcpu;
                     list.concat(taicpu.op_const_reg(A_RCR,S_W,1,regdst.reglo));
                     cg.a_reg_dealloc(list,NR_DEFAULTFLAGS);
                   end;
+                else
+                  internalerror(2019051018);
               end;
               ai:=Taicpu.Op_Sym(A_LOOP,S_W,l2);
               ai.is_jmp := True;
@@ -2945,6 +2951,8 @@ unit cgcpu;
               cg.ungetcpuregister(list,NR_CX);
               exit;
             end;
+          else
+            ;
         end;
         get_64bit_ops(op,op1,op2);
         if op in [OP_ADD,OP_SUB] then
@@ -3030,6 +3038,8 @@ unit cgcpu;
                         list.concat(taicpu.op_const_reg(A_RCR,S_W,1,reg.reglo));
                         cg.a_reg_dealloc(list,NR_DEFAULTFLAGS);
                       end;
+                    else
+                      internalerror(2019051017);
                   end;
                 2..15:
                   begin
@@ -3056,6 +3066,8 @@ unit cgcpu;
                           list.concat(taicpu.op_const_reg(A_RCR,S_W,1,reg.reglo));
                           cg.a_reg_dealloc(list,NR_DEFAULTFLAGS);
                         end;
+                      else
+                        internalerror(2019051010);
                     end;
                     ai:=Taicpu.Op_Sym(A_LOOP,S_W,loop_start);
                     ai.is_jmp := True;
@@ -3086,6 +3098,8 @@ unit cgcpu;
                           cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reghi),reg.reghi);
                           cg.a_op_const_reg(list,OP_SAR,OS_16,15,cg.GetNextReg(reg.reghi));
                         end;
+                      else
+                        internalerror(2019051011);
                     end;
                     if value=17 then
                       case op of
@@ -3105,6 +3119,8 @@ unit cgcpu;
                             list.concat(taicpu.op_const_reg(A_RCR,S_W,1,reg.reglo));
                             cg.a_reg_dealloc(list,NR_DEFAULTFLAGS);
                           end;
+                        else
+                          internalerror(2019051012);
                       end;
                   end;
                 18..31:
@@ -3131,6 +3147,8 @@ unit cgcpu;
                           cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reghi),reg.reghi);
                           cg.a_op_const_reg(list,OP_SAR,OS_16,15,cg.GetNextReg(reg.reghi));
                         end;
+                      else
+                        internalerror(2019051013);
                     end;
                     cg.getcpuregister(list,NR_CX);
                     cg.a_load_const_reg(list,OS_16,value-16,NR_CX);
@@ -3153,6 +3171,8 @@ unit cgcpu;
                           list.concat(taicpu.op_const_reg(A_RCR,S_W,1,reg.reglo));
                           cg.a_reg_dealloc(list,NR_DEFAULTFLAGS);
                         end;
+                      else
+                        internalerror(2019051014);
                     end;
                     ai:=Taicpu.Op_Sym(A_LOOP,S_W,loop_start);
                     ai.is_jmp := True;
@@ -3179,6 +3199,8 @@ unit cgcpu;
                         cg.a_op_const_reg_reg(list,OP_SAR,OS_16,15-(value-32),cg.GetNextReg(reg.reglo),reg.reghi);
                         cg.a_load_reg_reg(list,OS_16,OS_16,reg.reghi,cg.GetNextReg(reg.reghi));
                       end;
+                    else
+                      internalerror(2019051015);
                   end;
                 48..63:
                   case op of
@@ -3213,6 +3235,8 @@ unit cgcpu;
                           cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reglo),reg.reghi);
                           cg.a_load_reg_reg(list,OS_16,OS_16,cg.GetNextReg(reg.reglo),cg.GetNextReg(reg.reghi));
                         end;
+                    else
+                      internalerror(2019051016);
                   end;
               end;
             end;

+ 2 - 0
compiler/i8086/cpupara.pas

@@ -192,6 +192,8 @@ unit cpupara;
             result:=not(calloption in cdecl_pocalls) and not tprocvardef(def).is_addressonly;
           setdef :
             result:=not(calloption in cdecl_pocalls) and (not is_smallset(def));
+          else
+            ;
         end;
       end;
 

+ 10 - 0
compiler/i8086/n8086add.pas

@@ -581,6 +581,8 @@ interface
                 cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.falselabel);
               unequaln:
                 cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.truelabel);
+              else
+                internalerror(2019051024);
            end;
         end;
 
@@ -625,6 +627,8 @@ interface
                 cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.falselabel);
               unequaln:
                 cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.truelabel);
+              else
+                internalerror(2019051023);
            end;
         end;
 
@@ -650,6 +654,8 @@ interface
                    cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.truelabel);
                    cg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
                 end;
+              else
+                internalerror(2019051022);
            end;
         end;
 
@@ -802,6 +808,8 @@ interface
                 cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.falselabel);
               unequaln:
                 cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.truelabel);
+              else
+                internalerror(2019051021);
            end;
         end;
 
@@ -827,6 +835,8 @@ interface
                    cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,location.truelabel);
                    cg.a_jmp_always(current_asmdata.CurrAsmList,location.falselabel);
                 end;
+              else
+                internalerror(2019051020);
            end;
         end;
 

+ 0 - 8
compiler/i8086/symcpu.pas

@@ -541,8 +541,6 @@ implementation
           x86pt_near_fs,
           x86pt_near_gs:
             result:=s16inttype;
-          else
-            internalerror(2016100403);
         end;
       end;
 
@@ -561,8 +559,6 @@ implementation
           x86pt_near_fs,
           x86pt_near_gs:
             result:=u16inttype;
-          else
-            internalerror(2016100403);
         end;
       end;
 
@@ -582,8 +578,6 @@ implementation
           x86pt_near_fs,
           x86pt_near_gs:
             result:=s16inttype;
-          else
-            internalerror(2016100402);
         end;
       end;
 
@@ -602,8 +596,6 @@ implementation
           x86pt_near_fs,
           x86pt_near_gs:
             result:=s16inttype;
-          else
-            internalerror(2016100401);
         end;
       end;
 

+ 8 - 0
compiler/jvm/agjasmin.pas

@@ -624,6 +624,8 @@ implementation
                       internalerror(2011010906);
                   end;
                 end;
+              else
+                ;
             end;
             { superclass }
             if assigned(superclass) then
@@ -1014,6 +1016,8 @@ implementation
                    if not(df_generic in tprocdef(tprocsym(sym).procdeflist[j]).defoptions) then
                      WriteSymtableVarSyms(tprocdef(tprocsym(sym).procdeflist[j]).localst);
                end;
+             else
+               ;
            end;
          end;
       end;
@@ -1044,6 +1048,8 @@ implementation
                         WriteSymtableProcdefs(tprocdef(def).localst);
                     end;
                 end;
+              else
+                ;
             end;
           end;
       end;
@@ -1069,6 +1075,8 @@ implementation
                   nestedstructs.add(def);
               recorddef:
                 nestedstructs.add(def);
+              else
+                ;
             end;
           end;
         for i:=0 to nestedstructs.count-1 do

+ 2 - 0
compiler/jvm/aoptcpu.pas

@@ -135,6 +135,8 @@ Implementation
                RemoveCommutativeSwap(p) then
               exit(true)
           end;
+        else
+          ;
       end;
     end;
 

+ 2 - 0
compiler/jvm/cpupara.pas

@@ -291,6 +291,8 @@ implementation
                   paraloc^.loc:=LOC_REFERENCE;
                   paraloc^.reference.index:=NR_STACK_POINTER_REG;
                 end;
+              else
+                ;
             end;
             { 2 slots for 64 bit integers and floats, 1 slot for the rest }
             if not(is_64bit(paradef) or

+ 4 - 0
compiler/jvm/dbgjasm.pas

@@ -193,8 +193,12 @@ implementation
                     inc(nolineinfolevel);
                   mark_NoLineInfoEnd:
                     dec(nolineinfolevel);
+                  else
+                    ;
                 end;
               end;
+            else
+              ;
           end;
 
           { Java does not support multiple source files }

+ 16 - 0
compiler/jvm/hlcgcpu.pas

@@ -348,6 +348,8 @@ implementation
               a:=shortint(a);
             u16bit:
               a:=smallint(a);
+            else
+              ;
           end;
         end;
       a_load_const_stack(list,size,a,typ);
@@ -643,6 +645,8 @@ implementation
                      (fromloc.reference.indexbase<>NR_STACK_POINTER_REG) then
                     g_allocload_reg_reg(list,voidpointertype,fromloc.reference.indexbase,toloc.reference.indexbase,R_ADDRESSREGISTER);
                 end;
+              else
+                ;
             end;
           end;
         else
@@ -726,6 +730,8 @@ implementation
                     end;
                   procvardef:
                     g_call_system_proc(list,'fpc_initialize_array_procvar',[],nil);
+                  else
+                    internalerror(2019051025);
                 end;
                 tg.ungettemp(list,recref);
               end;
@@ -856,6 +862,8 @@ implementation
             a_op_const_stack(list,OP_XOR,size,cardinal($80000000));
           OS_64,OS_S64:
             a_op_const_stack(list,OP_XOR,size,tcgint($8000000000000000));
+          else
+            ;
         end;
       end;
 
@@ -871,7 +879,11 @@ implementation
           OS_32,OS_S32:
             result:=a xor cardinal($80000000);
           OS_64,OS_S64:
+{$push}{$r-}
             result:=a xor tcgint($8000000000000000);
+{$pop}
+          else
+            ;
         end;
       end;
 
@@ -1520,6 +1532,8 @@ implementation
                 handled:=true;
               end;
           end;
+        else
+          ;
       end;
       if not handled then
         inherited;
@@ -2237,6 +2251,8 @@ implementation
               a_op_const_stack(list,OP_AND,s32inttype,65535);
           OS_S16:
             list.concat(taicpu.op_none(a_i2s));
+          else
+            ;
         end;
     end;
 

+ 8 - 4
compiler/jvm/jvmdef.pas

@@ -302,8 +302,6 @@ implementation
                 ft_typed,
                 ft_untyped:
                   result:=jvmaddencodedtype(search_system_type('FILEREC').typedef,false,encodedstr,forcesignature,founderror);
-                else
-                  internalerror(2015091406);
               end;
             end;
           recorddef :
@@ -768,8 +766,12 @@ implementation
             if torddef(def).high>127 then
               result:=s8inttype;
           u16bit:
-            if torddef(def).high>32767 then
-              result:=s16inttype;
+            begin
+              if torddef(def).high>32767 then
+                result:=s16inttype;
+            end
+          else
+            ;
         end;
     end;
 
@@ -900,6 +902,8 @@ implementation
                         usedef:=s16inttype;
                       u16bit:
                         usedef:=s32inttype;
+                      else
+                        ;
                     end;
                 end;
               result:=jvmencodetype(usedef,false);

+ 0 - 2
compiler/jvm/njvmcnv.pas

@@ -1147,8 +1147,6 @@ implementation
               ft_typed,
               ft_untyped:
                 result:=def2=search_system_type('FILEREC').typedef;
-              else
-                internalerror(2015091401);
             end
           else
             result:=false;

+ 0 - 2
compiler/jvm/njvmcon.pas

@@ -400,8 +400,6 @@ implementation
               inserttypeconv_explicit(result,cpointerdef.getreusable(resultdef));
               result:=cderefnode.create(result);
             end;
-          else
-            internalerror(2011060301);
         end;
       end;
 

+ 2 - 0
compiler/jvm/njvminl.pas

@@ -311,6 +311,8 @@ implementation
                if left.resultdef.typ in [objectdef,classrefdef] then
                  Message(parser_e_illegal_expression);
              end;
+           else
+             ;
          end;
         if not handled then
           result:=inherited pass_typecheck;

+ 8 - 0
compiler/jvm/rgcpu.pas

@@ -164,6 +164,8 @@ implementation
                   if (getsupreg(taicpu(p).oper[0]^.ref^.indexbase)=sr) then
                     exit(true);
                 end;
+              else
+                ;
             end;
         end;
 
@@ -313,6 +315,8 @@ implementation
                         continue;
                       end;
                   end;
+                else
+                  ;
               end;
               p:=tai(p.next);
             end;
@@ -385,6 +389,8 @@ implementation
                           { don't invalidate the temp reference, may still be used one instruction
                             later }
                         end;
+                      else
+                        ;
                     end;
                     { insert the tempallocation/free at the right place }
                     list.insertlistbefore(p,templist);
@@ -398,6 +404,8 @@ implementation
                   end;
               ait_instruction:
                 do_spill_replace_all(list,taicpu(p),spill_temps);
+              else
+                ;
             end;
             p:=Tai(p.next);
           end;

+ 2 - 2
compiler/jvm/tgcpu.pas

@@ -219,10 +219,10 @@ unit tgcpu;
                 ft_typed,
                 ft_untyped:
                   result:=getifspecialtemp(list,search_system_type('FILEREC').typedef,forcesize,temptype,ref);
-                else
-                  internalerror(2015091405);
               end;
             end;
+          else
+            ;
         end;
       end;
 

+ 4 - 0
compiler/llvm/aasmllvm.pas

@@ -276,6 +276,8 @@ uses
             _bind:=AB_GLOBAL;
           AB_EXTERNAL_INDIRECT:
             _bind:=AB_INDIRECT;
+          else
+            ;
         end;
         bind:=_bind;
       end;
@@ -332,6 +334,8 @@ uses
             oper[opidx]^.ai.free;
           top_asmlist:
             oper[opidx]^.asmlist.free;
+          else
+            ;
         end;
         inherited;
       end;

+ 6 - 0
compiler/llvm/agllvm.pas

@@ -722,6 +722,8 @@ implementation
             if vol_write in hp.oper[3]^.ref^.volatility then
               result:=result+' volatile';
           end;
+        else
+          ;
       end;
     end;
 
@@ -1260,6 +1262,8 @@ implementation
                         writer.AsmWrite(objc_section_name(taillvmdecl(hp).sec));
                         writer.AsmWrite('"');
                       end;
+                    else
+                      ;
                   end;
                   { sections whose name starts with 'llvm.' are for LLVM
                     internal use and don't have an alignment }
@@ -1341,6 +1345,8 @@ implementation
                   asmblock:=true;
                 mark_AsmBlockEnd:
                   asmblock:=false;
+                else
+                  ;
               end;
 
           ait_directive :

+ 8 - 0
compiler/llvm/hlcgllvm.pas

@@ -694,6 +694,8 @@ implementation
             reg1:=tmpreg;
             fromsize:=tmpintdef;
           end;
+        else
+          ;
       end;
       { reg2 = bitcast fromsize reg1 to tosize }
       list.concat(taillvm.op_reg_size_reg_size(op,reg2,fromsize,reg1,tosize));
@@ -778,6 +780,8 @@ implementation
                 a_loadmm_ref_ref(list,fromsize,fromsize,simpleref,tmpref2,firstshuffle);
                 a_loadmm_ref_reg(list,tosize,tosize,tmpref,register,shuffle);
               end;
+            else
+              internalerror(2019051040);
           end;
           tg.ungettemp(list,tmpref);
           result:=true;
@@ -1935,6 +1939,8 @@ implementation
                   a_loadfpu_reg_ref(list,llvmretdef,llvmretdef,resval,rettemp);
                 R_MMREGISTER:
                   a_loadmm_reg_ref(list,llvmretdef,llvmretdef,resval,rettemp,mms_movescalar);
+                else
+                  ;
               end;
               { the return parameter now contains a value whose type matches the one
                 that the high level code generator expects instead of the llvm shim
@@ -2020,6 +2026,8 @@ implementation
                   list.concat(Tai_comment.Create(strpnew('Var '+vs.realname+' located at %tmp.'+
                      tostr(getsupreg(vs.initialloc.reference.base)))));
               end;
+            else
+              ;
           end;
         end;
       vs.localloc:=vs.initialloc;

+ 0 - 4
compiler/llvm/llvmdef.pas

@@ -393,8 +393,6 @@ implementation
 {$else}
                   encodedstr:=encodedstr+'fp128';
 {$endif}
-                else
-                  internalerror(2013100202);
               end;
             end;
           filedef :
@@ -420,8 +418,6 @@ implementation
                   end;
                 ft_untyped :
                   llvmaddencodedtype_intern(search_system_type('FILEREC').typedef,[lef_inaggregate]+[lef_typedecl]*flags,encodedstr);
-                else
-                  internalerror(2013100203);
               end;
             end;
           recorddef :

+ 12 - 0
compiler/llvm/llvmtype.pas

@@ -174,6 +174,8 @@ implementation
         case tsym(p).typ of
           fieldvarsym:
             appendsym_fieldvar(TAsmList(arg),tfieldvarsym(p));
+          else
+            ;
         end;
       end;
 
@@ -209,6 +211,8 @@ implementation
                   callpara:=pllvmcallpara(p.oper[opidx]^.paras[paraidx]);
                   record_def(callpara^.def);
                 end;
+            else
+              ;
           end;
       end;
 
@@ -242,6 +246,8 @@ implementation
                     collect_tai_info(deftypelist,value);
               end;
             end;
+          else
+            ;
         end;
       end;
 
@@ -340,6 +346,8 @@ implementation
                       end;
                   top_tai:
                     insert_tai_typeconversions(toplevellist,p.oper[i]^.ai);
+                  else
+                    ;
                 end;
             end;
         end;
@@ -402,6 +410,8 @@ implementation
             insert_typedconst_typeconversion(toplevellist,tai_abstracttypedconst(p));
           ait_llvmdecl:
             insert_asmlist_typeconversions(toplevellist,taillvmdecl(p).initdata);
+          else
+            ;
         end;
       end;
 
@@ -472,6 +482,8 @@ implementation
                 end;
               ait_llvmdecl:
                 update_asmlist_alias_types(taillvmdecl(hp).initdata);
+              else
+                ;
             end;
             hp:=tai(hp.next);
           end;

+ 2 - 0
compiler/llvm/nllvmbas.pas

@@ -175,6 +175,8 @@ interface
                   internalerror(2016101506);
               end;
             end;
+          else
+            ;
         end;
       end;
 

+ 4 - 0
compiler/llvm/nllvmld.pas

@@ -66,6 +66,8 @@ function tllvmloadnode.pass_1: tnode;
           if assigned(left) then
             expectloc:=LOC_REFERENCE;
         end;
+      else
+        ;
     end;
   end;
 
@@ -133,6 +135,8 @@ procedure tllvmloadnode.pass_generate_code;
           );
           reference_reset_base(location.reference,selfreg,0,ctempposinvalid,location.reference.alignment,location.reference.volatility);
         end;
+      else
+        ;
     end;
   end;
 

+ 2 - 2
compiler/llvm/nllvmtcon.pas

@@ -659,8 +659,6 @@ implementation
             st_widestring,
             st_unicodestring:
               eledef:=cwidechartype;
-            else
-              internalerror(2014062202);
           end;
         else
           internalerror(2014062203);
@@ -765,6 +763,8 @@ implementation
             todef:=tmpintdef;
             op:=firstop
           end;
+        else
+          ;
       end;
       ai:=taillvm.op_reg_tai_size(op,NR_NO,nil,todef);
       typedai:=wrap_with_type(ai,todef);

+ 4 - 0
compiler/llvm/rgllvm.pas

@@ -201,6 +201,8 @@ implementation
                            writtenregs^[sr]:=succ(writtenregs^[sr]);
                        end;
                  end;
+               else
+                 ;
              end;
              hp:=tai(hp.next);
            end;
@@ -249,6 +251,8 @@ implementation
                         end;
                     end;
                 end;
+              else
+                ;
             end;
           end;
         if not assigned(def) then

+ 7 - 1
compiler/mips/aasmcpu.pas

@@ -1,4 +1,4 @@
-{
+        {
     Copyright (c) 1999-2009 by Mazen Neifer and David Zhang
 
     Contains the assembler object for the MIPSEL
@@ -558,6 +558,8 @@ procedure fixup_jmps(list: TAsmList);
                 internalerror(2008052101);
               inc(instrpos);
             end;
+          else
+            ;
         end;
         p := tai(p.next);
       end;
@@ -657,10 +659,14 @@ procedure fixup_jmps(list: TAsmList);
                               end;
                           end;
                       end;
+                  else
+                    ;
                 end;
               end;
             ait_const:
               inc(instrpos);
+            else
+              ;
           end;
           p := tai(p.next);
         end;

+ 12 - 0
compiler/mips/aoptcpu.pas

@@ -167,6 +167,8 @@ unit aoptcpu;
               result:=
                 (p.oper[I]^.ref^.base=reg) or
                 (p.oper[I]^.ref^.index=reg);
+            else
+              ;
           end;
           if result then exit; {Bailout if we found something}
           Inc(I);
@@ -190,6 +192,8 @@ unit aoptcpu;
         A_BA,A_BC,
         A_SB,A_SH,A_SW,A_SWL,A_SWR,A_SWC1,A_SDC1:
           exit;
+        else
+        ;
       end;
 
       result:=(p.ops>0) and (p.oper[0]^.typ=top_reg) and
@@ -716,8 +720,12 @@ unit aoptcpu;
               A_ABS_d, A_NEG_d, A_SQRT_d,
               A_CVT_d_w, A_CVT_d_l, A_CVT_d_s:
                 result:=TryRemoveMov(p,A_MOV_d);
+              else
+                ;
             end;
           end;
+        else
+          ;
       end;
     end;
 
@@ -867,8 +875,12 @@ unit aoptcpu;
                             end;
                         end;
                     end;
+                  else
+                    ;
                 end;
               end;
+            else
+              ;
           end;
           UpdateUsedRegs(p);
           p:=tai(p.next);

+ 4 - 0
compiler/mips/cgcpu.pas

@@ -1098,6 +1098,8 @@ procedure TCGMIPS.a_jmp_flags(list: tasmlist; const f: TResFlags; l: tasmlabel);
           end;
           exit;
         end;
+      else
+        ;
     end;
     if f.use_const then
       a_cmp_const_reg_label(list,OS_INT,f.cond,f.value,f.reg1,l)
@@ -1136,6 +1138,8 @@ procedure TCGMIPS.g_flags2reg(list: tasmlist; size: tcgsize; const f: tresflags;
             end;
           exit;
         end;
+      else
+        ;
     end;
     if (f.cond in [OC_EQ,OC_NE]) then
       begin

+ 8 - 0
compiler/mips/cpubase.pas

@@ -356,6 +356,8 @@ unit cpubase;
             setsubreg(r, R_SUBFS);
           R_SUBL, R_SUBW, R_SUBD, R_SUBQ:
             setsubreg(r, R_SUBD);
+          else
+            ;
         end;
         result:=rgBase.findreg_by_number_table(r,regnumber_index);
       end;
@@ -384,6 +386,8 @@ unit cpubase;
             setsubreg(hr, R_SUBFS);
           R_SUBL, R_SUBW, R_SUBD, R_SUBQ:
             setsubreg(hr, R_SUBD);
+          else
+            ;
         end;
         p:=findreg_by_number_table(hr,regnumber_index);
         if p<>0 then
@@ -401,6 +405,8 @@ unit cpubase;
             setsubreg(r, R_SUBFS);
           R_SUBL, R_SUBW, R_SUBD, R_SUBQ:
             setsubreg(r, R_SUBD);
+          else
+            ;
         end;
         result:=regdwarf_table[findreg_by_number(r)];
         if result=-1 then
@@ -414,6 +420,8 @@ unit cpubase;
             setsubreg(r, R_SUBFS);
           R_SUBL, R_SUBW, R_SUBD, R_SUBQ:
             setsubreg(r, R_SUBD);
+          else
+            ;
         end;
         result:=regdwarf_table[findreg_by_number(r)];
       end;

+ 2 - 0
compiler/mips/cpuelf.pas

@@ -864,6 +864,8 @@ implementation
                 data.Write(zero,4);
                 continue;
               end;
+            else
+              ;
           end;
 
           if (objreloc.flags and rf_raw)=0 then

+ 2 - 0
compiler/mips/cpupara.pas

@@ -167,6 +167,8 @@ implementation
             result:=false; {not tprocvardef(def).is_addressonly;}
           setdef :
             result:=not(is_smallset(def));
+          else
+            ;
         end;
       end;
 

+ 2 - 0
compiler/mips/hlcgcpu.pas

@@ -137,6 +137,8 @@ implementation
                 fromreg:=cg.getintregister(list,OS_INT);
                 cg.a_load_const_reg(list,OS_INT,-1,fromreg);
               end;
+            else
+              ;
           end;
           list.concat(taicpu.op_reg_reg_const_const(A_INS,sreg.subsetreg,fromreg,
             sreg.startbit,sreg.bitlen));

+ 2 - 0
compiler/mips/itcpugas.pas

@@ -84,6 +84,8 @@ begin
       setsubreg(hr, R_SUBFS);
     R_SUBL, R_SUBW, R_SUBD, R_SUBQ:
       setsubreg(hr, R_SUBD);
+    else
+      ;
   end;
   p := findreg_by_number(hr);
   if p <> 0 then

+ 4 - 0
compiler/mips/ncpuadd.pas

@@ -186,6 +186,8 @@ begin
           cmp64_lt(left_reg, right_reg,unsigned);
         gten:
           cmp64_le(left_reg, right_reg,unsigned);
+        else
+          internalerror(2019051034);
       end
     else
       case NodeType of
@@ -197,6 +199,8 @@ begin
           cmp64_lt(right_reg, left_reg,unsigned);
         gten:
           cmp64_le(right_reg, left_reg,unsigned);
+        else
+          internalerror(2019051033);
       end;
   end;
 end;

+ 2 - 0
compiler/mips/ncpuld.pas

@@ -55,6 +55,8 @@ begin
     paravarsym :
       if([vo_is_dll_var,vo_is_external] * tabstractvarsym(symtableentry).varoptions <> []) then
         include(current_procinfo.flags,pi_needs_got);
+    else
+      ;
   end;
 end;
 

+ 51 - 19
compiler/nadd.pas

@@ -310,6 +310,8 @@ implementation
                         result:=true;
                         res:=true;
                       end;
+                  else
+                    ;
                  end
              else
                with torddef(realdef) do
@@ -370,6 +372,8 @@ implementation
                         result:=true;
                         res:=true;
                       end;
+                  else
+                    ;
                  end;
            end;
       end;
@@ -667,11 +671,15 @@ implementation
               begin
                 case nodetype of
                   addn,subn,orn,xorn:
-                   result := left.getcopy;
+                    result := left.getcopy;
                   andn,muln:
-                   if (cs_opt_level4 in current_settings.optimizerswitches) or
-                       not might_have_sideeffects(left) then
-                     result:=cordconstnode.create(0,resultdef,true);
+                    begin
+                      if (cs_opt_level4 in current_settings.optimizerswitches) or
+                         not might_have_sideeffects(left) then
+                        result:=cordconstnode.create(0,resultdef,true);
+                    end
+                  else
+                    ;
                 end;
               end
             else if tordconstnode(right).value = 1 then
@@ -679,6 +687,8 @@ implementation
                 case nodetype of
                   muln:
                    result := left.getcopy;
+                  else
+                    ;
                 end;
               end
             else if tordconstnode(right).value = -1 then
@@ -686,6 +696,8 @@ implementation
                 case nodetype of
                   muln:
                    result := cunaryminusnode.create(left.getcopy);
+                  else
+                    ;
                 end;
               end;
             if assigned(result) then
@@ -701,9 +713,13 @@ implementation
                   subn:
                    result := cunaryminusnode.create(right.getcopy);
                   andn,muln:
-                   if (cs_opt_level4 in current_settings.optimizerswitches) or
-                       not might_have_sideeffects(right) then
-                     result:=cordconstnode.create(0,resultdef,true);
+                    begin
+                      if (cs_opt_level4 in current_settings.optimizerswitches) or
+                         not might_have_sideeffects(right) then
+                        result:=cordconstnode.create(0,resultdef,true);
+                    end;
+                  else
+                    ;
                 end;
               end
             else if tordconstnode(left).value = 1 then
@@ -711,6 +727,8 @@ implementation
                 case nodetype of
                   muln:
                    result := right.getcopy;
+                  else
+                    ;
                 end;
               end
 {$ifdef VER2_2}
@@ -722,6 +740,8 @@ implementation
                 case nodetype of
                   muln:
                    result := cunaryminusnode.create(right.getcopy);
+                  else
+                    ;
                 end;
               end;
             if assigned(result) then
@@ -818,6 +838,8 @@ implementation
                 trealconstnode(right).value_real:=1.0/trealconstnode(right).value_real;
                 exit;
               end;
+            else
+              ;
           end;
 {$endif FPC_FULLVERSION>20700}
 
@@ -1095,6 +1117,8 @@ implementation
                           exit;
                         end;
                       }
+                      else
+                        ;
                     end;
                   end
                 { short to full boolean evalution possible and useful? }
@@ -1102,16 +1126,20 @@ implementation
                   begin
                     case nodetype of
                       andn,orn:
-                        { full boolean evaluation is only useful if the nodes are not too complex and if no flags/jumps must be converted,
-                          further, we need to know the expectloc }
-                        if (node_complexity(right)<=2) and
-                          not(left.expectloc in [LOC_FLAGS,LOC_JUMP,LOC_INVALID]) and not(right.expectloc in [LOC_FLAGS,LOC_JUMP,LOC_INVALID]) then
-                          begin
-                            { we need to copy the whole tree to force another pass_1 }
-                            include(localswitches,cs_full_boolean_eval);
-                            result:=getcopy;
-                            exit;
-                          end;
+                        begin
+                          { full boolean evaluation is only useful if the nodes are not too complex and if no flags/jumps must be converted,
+                            further, we need to know the expectloc }
+                          if (node_complexity(right)<=2) and
+                            not(left.expectloc in [LOC_FLAGS,LOC_JUMP,LOC_INVALID]) and not(right.expectloc in [LOC_FLAGS,LOC_JUMP,LOC_INVALID]) then
+                            begin
+                              { we need to copy the whole tree to force another pass_1 }
+                              include(localswitches,cs_full_boolean_eval);
+                              result:=getcopy;
+                              exit;
+                            end;
+                        end;
+                      else
+                        ;
                     end;
                   end
               end;
@@ -1144,6 +1172,8 @@ implementation
                           result:=cordconstnode.create(1,resultdef,true);
                           exit;
                         end;
+                      else
+                        ;
                     end;
                   end;
               end;
@@ -2210,8 +2240,6 @@ implementation
                        if not(is_shortstring(rd) or is_char(rd)) then
                          inserttypeconv(right,cshortstringtype);
                      end;
-                   else
-                     internalerror(2005101);
                 end;
               end
             else
@@ -2585,6 +2613,8 @@ implementation
 
                   result:=hp
                 end;
+              else
+                ;
             end;
           end;
 
@@ -2792,6 +2822,8 @@ implementation
               left := nil;
               right := nil;
             end;
+          else
+            internalerror(2019050520);
         end;
       end;
 

+ 2 - 0
compiler/nbas.pas

@@ -675,6 +675,8 @@ implementation
                   left:=nil;
                   exit;
                 end;
+              else
+                ;
             end;
           end;
       end;

+ 10 - 0
compiler/ncal.pas

@@ -1342,6 +1342,8 @@ implementation
                                typecheckpass(left);
                              end;
                          end;
+                       else
+                         ;
                      end;
                    end
                  else
@@ -1992,6 +1994,8 @@ implementation
               result:=(tabstractvarsym(tloadnode(hp).symtableentry).varregable in [vr_none,vr_addr]);
             temprefn:
               result:=not(ti_may_be_in_reg in ttemprefnode(hp).tempflags);
+            else
+              ;
           end;
       end;
 
@@ -4094,6 +4098,8 @@ implementation
                         LOC_REGISTER,
                         LOC_FPUREGISTER :
                           break;
+                        else
+                          ;
                       end;
                     end;
                   LOC_MMREGISTER,
@@ -4104,6 +4110,8 @@ implementation
                          (node_complexity(hpcurr)>node_complexity(hp)) then
                         break;
                     end;
+                  else
+                    ;
                 end;
                 hpprev:=hp;
                 hp:=tcallparanode(hp.right);
@@ -4550,6 +4558,8 @@ implementation
                   typecheckpass(n);
                   result := fen_true;
                 end;
+              else
+                ;
             end;
           end;
       end;

+ 12 - 0
compiler/ncgbas.pas

@@ -339,6 +339,8 @@ interface
                                      taicpu(hp2).segprefix:=ref^.segment;
 {$endif x86}
                                  end;
+                               else
+                                 ;
                              end;
                            end;
                         end;
@@ -348,6 +350,8 @@ interface
                         taicpu(hp2).CheckIfValid;
 {$endif x86}
                      end;
+                  else
+                    ;
                 end;
                 current_asmdata.CurrAsmList.concat(hp2);
                 hp:=tai(hp.next);
@@ -381,6 +385,8 @@ interface
                                  top_ref :
                                    if (ref^.segment<>NR_NO) and (ref^.segment<>get_default_segment_of_ref(ref^)) then
                                      taicpu(hp).segprefix:=ref^.segment;
+                                 else
+                                   ;
                                end;
                              end;
 {$endif x86}
@@ -391,6 +397,8 @@ interface
                       taicpu(hp).CheckIfValid;
 {$endif x86}
                      end;
+                  else
+                    ;
                 end;
                 hp:=tai(hp.next);
               end;
@@ -529,6 +537,8 @@ interface
                   { in case reference contains CREGISTERS, that doesn't matter:
                     we want to write to the location indicated by the current
                     value of those registers, and we can save those values }
+                  else
+                    ;
                 end;
                 hlcg.g_reference_loc(current_asmdata.CurrAsmList,tempinfo^.typedef,tempinfo^.tempinitcode.location,tempinfo^.location);
               end;
@@ -546,6 +556,8 @@ interface
           LOC_FPUREGISTER,
           LOC_MMREGISTER :
             excludetempflag(ti_valid);
+          else
+            ;
         end;
       end;
 

+ 6 - 0
compiler/ncgcal.pas

@@ -549,6 +549,8 @@ implementation
                  hlcg.g_finalize(current_asmdata.CurrAsmList,resultdef,location.reference);
                tg.ungetiftemp(current_asmdata.CurrAsmList,location.reference);
             end;
+          else
+            ;
         end;
       end;
 
@@ -822,6 +824,10 @@ implementation
                              end;
                            end;
                          end;
+                       LOC_VOID:
+                         ;
+                       else
+                         internalerror(2019050707);
                      end;
                      dec(sizeleft,tcgsize2size[tmpparaloc^.size]);
                      callerparaloc:=callerparaloc^.next;

+ 0 - 2
compiler/ncgcnv.pas

@@ -334,8 +334,6 @@ interface
                {!!!!!!!}
                internalerror(8888);
              end;
-           else
-             internalerror(200808241);
          end;
       end;
 

+ 4 - 2
compiler/ncgcon.pas

@@ -173,8 +173,10 @@ implementation
                         message(parser_e_range_check_error)
                       else
                         current_asmdata.asmlists[al_typedconsts].concat(tai_realconst.create_s64compreal(round(value_real)));
-                  else
-                    internalerror(10120);
+{$ifndef cpufloat128}
+                    else
+                      internalerror(10120);
+{$endif not cpufloat128}
                   end;
                end;
           end;

+ 12 - 0
compiler/ncgld.pas

@@ -161,6 +161,8 @@ implementation
           inn,
           asn,isn:
             result := fen_norecurse_false;
+          else
+            ;
         end;
       end;
 
@@ -1167,6 +1169,10 @@ implementation
                     end;
                 end;
 {$endif cpuflags}
+              LOC_VOID:
+                ;
+              else
+                internalerror(2019050706);
             end;
          end;
 
@@ -1301,6 +1307,8 @@ implementation
                                   vtype:=vtQWord;
                                   varfield:=tfieldvarsym(search_struct_member_no_helper(trecorddef(eledef),'VQWORD'));
                                 end;
+                              else
+                                ;
                             end;
                             freetemp:=false;
                             vaddr:=true;
@@ -1331,6 +1339,8 @@ implementation
                                      vtype:=vtWideChar;
                                      varfield:=tfieldvarsym(search_struct_member_no_helper(trecorddef(eledef),'VINTEGER'));
                                    end;
+                                 else
+                                   ;
                                end;
                              end;
                      end;
@@ -1425,6 +1435,8 @@ implementation
                            freetemp:=false;
                          end;
                      end;
+                   else
+                     ;
                  end;
                  if vtype=$ff then
                    internalerror(14357);

+ 4 - 0
compiler/ncgmem.pas

@@ -945,6 +945,8 @@ implementation
                 LOC_REGISTER,
                 LOC_MMREGISTER:
                   hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
+                else
+                  ;
               end;
              location_copy(location,left.location);
            end;
@@ -978,6 +980,8 @@ implementation
                       rangecheck_array;
                     stringdef :
                       rangecheck_string;
+                    else
+                      ;
                   end;
                 end;
               if not(is_packed_array(left.resultdef)) or

+ 4 - 0
compiler/ncgnstld.pas

@@ -134,6 +134,8 @@ implementation
                   typecheckpass(left);
                 end;
             end;
+          else
+            ;
         end;
       end;
 
@@ -182,6 +184,8 @@ implementation
                   include(flags,nf_internal);
                 end;
             end;
+          else
+            ;
         end;
       end;
 

+ 12 - 0
compiler/ncgrtti.pas

@@ -146,6 +146,8 @@ implementation
               undefineddef:
                 { don't write any RTTI for these }
                 continue;
+              else
+                ;
             end;
             { always generate persistent tables for types in the interface so
               they can be reused in other units and give always the same pointer
@@ -694,6 +696,8 @@ implementation
                     write_rtti(tpropertysym(sym).propdef,rt);
                   fieldvarsym:
                     write_rtti(tfieldvarsym(sym).vardef,rt);
+                  else
+                    ;
                 end;
               end;
           end;
@@ -806,6 +810,8 @@ implementation
                              internalerror(200706101);
                            inc(address,int64(def.size*hp^.value));
                          end;
+                       else
+                         internalerror(2019050523);
                      end;
                      hp:=hp^.next;
                   end;
@@ -1662,6 +1668,8 @@ implementation
                    objectdef_rtti_interface_full(def);
                  end;
                end;
+             else
+               ;
            end;
            tcb.end_anonymous_record;
         end;
@@ -1943,6 +1951,8 @@ implementation
             begin
               enumdef_rtti_extrasyms(Tenumdef(def));
             end;
+        else
+          ;
       end;
     end;
 
@@ -1999,6 +2009,8 @@ implementation
               write_rtti(tabstractpointerdef(def).pointeddef,rt);
           procvardef:
             params_write_rtti(tabstractprocdef(def),rt,false);
+          else
+            ;
         end;
       end;
 

+ 2 - 0
compiler/ncgset.pas

@@ -594,6 +594,8 @@ implementation
                   Block := TStatementNode(Block).Left;
                   Continue;
                 end;
+              else
+                ;
             end;
 
             Break;

+ 34 - 10
compiler/ncgutil.pas

@@ -394,8 +394,6 @@ implementation
       begin
         if (setbase<>0) then
           begin
-            if not(l.loc in [LOC_REGISTER,LOC_CREGISTER]) then
-              internalerror(2007091502);
             { subtract the setbase }
             case l.loc of
               LOC_CREGISTER:
@@ -409,6 +407,8 @@ implementation
                 begin
                   hlcg.a_op_const_reg(list,OP_SUB,opdef,setbase,l.register);
                 end;
+              else
+                internalerror(2007091502);
             end;
           end;
       end;
@@ -549,6 +549,8 @@ implementation
                  else
                    hlcg.g_initialize(list,tparavarsym(p).vardef,href);
                end;
+             else
+               ;
            end;
          end;
       end;
@@ -587,6 +589,8 @@ implementation
             begin
              loc.register:=cg.getmmregister(list,loc.size);
             end;
+          else
+            ;
         end;
       end;
 
@@ -946,6 +950,8 @@ implementation
                     end;
                   hlcg.varsym_set_localloc(list,vs);
                 end;
+              else
+                ;
             end;
           end;
       end;
@@ -1020,6 +1026,8 @@ implementation
             rv.fpuregvars.addnodup(getsupreg(location.register));
           LOC_CMMREGISTER:
             rv.mmregvars.addnodup(getsupreg(location.register));
+          else
+            ;
         end;
       end;
 
@@ -1047,13 +1055,16 @@ implementation
             if (tloadnode(n).symtableentry.typ in [staticvarsym,localvarsym,paravarsym]) then
               add_regvars(rv^,tabstractnormalvarsym(tloadnode(n).symtableentry).localloc);
           vecn:
-            { range checks sometimes need the high parameter }
-            if (cs_check_range in current_settings.localswitches) and
-               (is_open_array(tvecnode(n).left.resultdef) or
-                is_array_of_const(tvecnode(n).left.resultdef)) and
-               not(current_procinfo.procdef.proccalloption in cdecl_pocalls) then
-              add_regvars(rv^,tabstractnormalvarsym(get_high_value_sym(tparavarsym(tloadnode(tvecnode(n).left).symtableentry))).localloc)
-
+            begin
+              { range checks sometimes need the high parameter }
+              if (cs_check_range in current_settings.localswitches) and
+                 (is_open_array(tvecnode(n).left.resultdef) or
+                  is_array_of_const(tvecnode(n).left.resultdef)) and
+                 not(current_procinfo.procdef.proccalloption in cdecl_pocalls) then
+                add_regvars(rv^,tabstractnormalvarsym(get_high_value_sym(tparavarsym(tloadnode(tvecnode(n).left).symtableentry))).localloc)
+            end;
+          else
+            ;
         end;
         result := fen_true;
       end;
@@ -1196,7 +1207,8 @@ implementation
 {$endif}
                             cg.a_reg_sync(list,localloc.register);
                       LOC_CFPUREGISTER,
-                      LOC_CMMREGISTER:
+                      LOC_CMMREGISTER,
+                      LOC_CMMXREGISTER:
                         if (pi_has_label in current_procinfo.flags) then
                           cg.a_reg_sync(list,localloc.register);
                       LOC_REFERENCE :
@@ -1210,6 +1222,18 @@ implementation
                               not(vo_is_self in varoptions)) then
                             tg.Ungetlocal(list,localloc.reference);
                         end;
+                      { function results in pure assembler routines }
+                      LOC_REGISTER,
+                      LOC_FPUREGISTER,
+                      LOC_MMREGISTER,
+                      { empty parameter }
+                      LOC_VOID,
+                      { global variables in memory and typed constants don't get a location assigned,
+                        and neither does an unused $result variable in pure assembler routines }
+                      LOC_INVALID:
+                        ;
+                      else
+                        internalerror(2019050538);
                     end;
                   end;
               end;

+ 2 - 2
compiler/ncgvmt.pas

@@ -792,8 +792,6 @@ implementation
               pd:=tprocdef(tpropertysym(AImplIntf.ImplementsGetter).propaccesslist[palt_read].procdef);
               tcb.emit_tai(Tai_const.Create_sizeint(tobjectdef(pd.struct).vmtmethodoffset(pd.extnumber)),sizeuinttype);
             end;
-          else
-            internalerror(200802162);
         end;
 
         { IIDStr }
@@ -1332,6 +1330,8 @@ implementation
                   if assigned(tprocdef(def).parast) then
                     do_write_vmts(tprocdef(def).parast,false);
                 end;
+              else
+                ;
             end;
           end;
       end;

+ 12 - 6
compiler/ncnv.pas

@@ -950,6 +950,8 @@ implementation
                cgmessage1(type_h_convert_sub_operands_to_prevent_overflow,def.typename);
              muln:
                cgmessage1(type_h_convert_mul_operands_to_prevent_overflow,def.typename);
+             else
+               ;
            end;
       end;
 
@@ -2698,9 +2700,6 @@ implementation
                   else
                    IncompatibleTypes(left.resultdef,resultdef);
                 end;
-
-              else
-                internalerror(200211231);
             end;
           end;
         { Give hint or warning for unportable code, exceptions are
@@ -2793,7 +2792,6 @@ implementation
 
       function docheckremoveinttypeconvs(n: tnode): boolean;
         begin
-          result:=false;
           if wasoriginallysmallerint(n) then
             exit(true);
           case n.nodetype of
@@ -2819,6 +2817,8 @@ implementation
                    (((n.nodetype=andn) and wasoriginallysmallerint(tbinarynode(n).left)) or
                     ((n.nodetype=andn) and wasoriginallysmallerint(tbinarynode(n).right))));
               end;
+            else
+              result:=false;
           end;
         end;
 
@@ -3113,6 +3113,8 @@ implementation
                    exit;
                 end;
             end;
+          else
+            ;
         end;
 {$ifndef CPUNO32BITOPS}
         { must be done before code below, because we need the
@@ -3154,6 +3156,8 @@ implementation
                     end;
                 end;
             end;
+          else
+            ;
         end;
 {$endif not CPUNO32BITOPS}
       end;
@@ -3683,8 +3687,6 @@ implementation
                        end
                      else
                        internalerror(200802231);
-                   else
-                     internalerror(200802165);
                  end;
                  break;
                end;
@@ -4250,6 +4252,8 @@ implementation
                 resultdef:=pasbool1type;
               asn:
                 resultdef:=tclassrefdef(right.resultdef).pointeddef;
+              else
+                ;
             end;
           end
         else if is_interface(right.resultdef) or
@@ -4261,6 +4265,8 @@ implementation
                resultdef:=pasbool1type;
              asn:
                resultdef:=right.resultdef;
+             else
+               ;
            end;
 
             { left is a class or interface }

+ 0 - 4
compiler/ncon.pas

@@ -353,8 +353,6 @@ implementation
              v:=extended(v);
            s128real:
              internalerror(2013102701);
-           else
-             internalerror(2013102702);
          end;
          value_real:=v;
          value_currency:=v;
@@ -454,8 +452,6 @@ implementation
                   if ts128real(value_real)=MathInf.Value then
                     CGMessage(parser_e_range_check_error);
                 end;
-              else
-                internalerror(2016112902);
             end;
           end;
       end;

+ 4 - 0
compiler/ngenutil.pas

@@ -408,6 +408,8 @@ implementation
                   pd.localst.SymList.ForEachCall(@static_syms_finalize,arg);
               end;
           end;
+        else
+          ;
       end;
     end;
 
@@ -668,6 +670,8 @@ implementation
                       result:=block
                     end
                 end;
+              else
+                ;
             end;
           end;
         end;

+ 2 - 2
compiler/ngtcon.pas

@@ -213,6 +213,8 @@ function get_next_varsym(def: tabstractrecorddef; const SymList:TFPHashObjectLis
                    wpoinfomanager.symbol_live(current_procinfo.procdef.mangledname) then
                   tobjectdef(tclassrefdef(n.resultdef).pointeddef).register_maybe_created_object_type;
               end;
+            else
+              ;
           end;
           tc_emit_classrefdef(def,n);
           n.free;
@@ -720,8 +722,6 @@ function get_next_varsym(def: tabstractrecorddef; const SymList:TFPHashObjectLis
              ftcb.emit_tai(tai_realconst.create_s64compreal(round(value*10000)),def);
            s128real:
              ftcb.emit_tai(tai_realconst.create_s128real(value),def);
-           else
-             internalerror(200611053);
         end;
       end;
 

+ 24 - 3
compiler/ninl.pas

@@ -620,9 +620,6 @@ implementation
       ordtype: tordtype;
     begin
       ordtype := torddef(def).ordtype;
-      if not (ordtype in [s64bit,u64bit,s32bit,u32bit,s16bit,u16bit,s8bit,u8bit]) then
-        internalerror(2013032601);
-
       if is_oversizedint(def) then
         begin
           case ordtype of
@@ -679,6 +676,8 @@ implementation
                 func_suffix := 'uint';
                 readfunctype := uinttype;
               end;
+            else
+              internalerror(2013032601);
           end;
         end;
     end;
@@ -1096,6 +1095,8 @@ implementation
               end;
             in_writeln_x:
               name:='fpc_writeln_end';
+            else
+              internalerror(2019050516);
           end;
           addstatement(Tstatementnode(newstatement),ccallnode.createintern(name,filepara.getcopy));
         end;
@@ -1634,6 +1635,8 @@ implementation
                 Crttinode.create(Tenumdef(destpara.resultdef),fullrtti,rdt_str2ord)
               ),nil);
             end;
+          else
+            internalerror(2019050515);
         end;
 
         procname := procname + suffix;
@@ -2329,6 +2332,8 @@ implementation
                           result:=cordconstnode.create(tordconstnode(left).value and $ffffffff,u32inttype,true);
                         in_hi_qword :
                           result:=cordconstnode.create(tordconstnode(left).value shr 32,u32inttype,true);
+                        else
+                          internalerror(2019050514);
                       end;
                     end;
                 end;
@@ -2412,6 +2417,8 @@ implementation
                             left:=nil;
                           end
                       end;
+                    else
+                      internalerror(2019050513);
                   end;
 (*
                   if (left.nodetype=ordconstn) then
@@ -2465,6 +2472,8 @@ implementation
                             tarraydef(left.resultdef).lowrange+1,
                             sinttype,true);
                       end;
+                    else
+                      ;
                   end;
                 end;
               in_assigned_x:
@@ -2526,6 +2535,8 @@ implementation
                               end;
                           end;
                       end;
+                    else
+                      ;
                   end;
                 end;
               in_low_x,
@@ -2571,6 +2582,10 @@ implementation
                       begin
                         result:=cordconstnode.create(0,u8inttype,false);
                       end;
+                    errordef:
+                      ;
+                    else
+                      internalerror(2019050512);
                   end;
                 end;
               in_exp_real :
@@ -2735,6 +2750,8 @@ implementation
                       result:=cordconstnode.create(PopCnt(tordconstnode(left).value),resultdef,false);
                     end;
                 end;
+              else
+                ;
             end;
           end;
       end;
@@ -2907,6 +2924,8 @@ implementation
                     in_lo_qword,
                     in_hi_qword :
                       resultdef:=u32inttype;
+                    else
+                      ;
                   end;
                 end;
 
@@ -3728,6 +3747,8 @@ implementation
                   shiftconst := 16;
                 in_hi_word:
                   shiftconst := 8;
+                else
+                  ;
               end;
               if shiftconst <> 0 then
                 result := ctypeconvnode.create_internal(cshlshrnode.create(shrn,left,

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