* fixed a_load_regconst_subsetreg_intern() when loading a 32 bit register

    to a non-zero bit offset in a subsetreg (mantis #29933)

git-svn-id: trunk@33498 -

.gitattributes

@@ -15003,6 +15003,7 @@ tests/webtbs/tw29893.pp svneol=native#text/pascal
 tests/webtbs/tw29912.pp svneol=native#text/plain
 tests/webtbs/tw29923.pp svneol=native#text/plain
 tests/webtbs/tw29930.pp svneol=native#text/plain
+tests/webtbs/tw29933.pp svneol=native#text/plain
 tests/webtbs/tw29958.pp svneol=native#text/pascal
 tests/webtbs/tw2998.pp svneol=native#text/plain
 tests/webtbs/tw2999.pp svneol=native#text/plain

compiler/aarch64/hlcgcpu.pas

@@ -208,7 +208,8 @@ implementation
     begin
       if slopt in [SL_SETZERO,SL_SETMAX] then
         inherited
-      else if not(sreg.bitlen in [32,64]) then
+      else if not(sreg.bitlen in [32,64]) or
+              (sreg.startbit<>0) then
         begin
           makeregssamesize(list,def_cgsize(fromsize),sreg.subsetregsize,fromreg,sreg.subsetreg,fromreg,toreg);
           list.concat(taicpu.op_reg_reg_const_const(A_BFI,toreg,fromreg,sreg.startbit,sreg.bitlen))

tests/webtbs/tw29933.pp

@@ -0,0 +1,34 @@
+{$mode objfpc}
+
+type
+  TPoint =
+{$ifndef FPC_REQUIRES_PROPER_ALIGNMENT}
+  packed
+{$endif FPC_REQUIRES_PROPER_ALIGNMENT}
+  record
+    X : Longint;
+    Y : Longint;
+  end;
+
+
+function Point(x,y : Integer) : TPoint; inline;
+begin
+  Point.x:=x;
+  Point.y:=y;
+end;
+
+procedure test(p: tpoint);
+begin
+  if (p.x<>6) or
+     (p.y<>4) then
+    halt(1)
+end;
+
+var
+  pt: tpoint;
+  indent, secondy: longint;
+begin
+  indent:=5;
+  secondy:=2;
+  test(Point(Indent+1,secondy+2));
+end.