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@@ -351,7 +351,6 @@ Implementation
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case p.typ of
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ait_instruction:
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begin
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- (* optimization proved not to be safe, see tw4768.pp
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{
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change
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<op> reg,x,y
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@@ -361,27 +360,34 @@ Implementation
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}
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{ this optimization can applied only to the currently enabled operations because
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the other operations do not update all flags and FPC does not track flag usage }
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- if (taicpu(p).opcode in [A_ADC,A_ADD,A_SUB {A_UDIV,A_SDIV,A_MUL,A_MVN,A_MOV,A_ORR,A_EOR,A_AND}]) and
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+ if ((taicpu(p).opcode in [A_ADC,A_ADD,A_SUB,A_MUL,A_MVN,A_MOV,A_ORR,A_EOR,A_AND]) or
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+ { those two values are > 255 so check separately }
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+ (taicpu(p).opcode=A_UDIV) or
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+ (taicpu(p).opcode=A_SDIV)
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+ ) and
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(taicpu(p).oppostfix = PF_None) and
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(taicpu(p).condition = C_None) and
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GetNextInstruction(p, hp1) and
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MatchInstruction(hp1, A_CMP, [C_None], [PF_None]) and
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(taicpu(hp1).oper[1]^.typ = top_const) and
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(taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
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- (taicpu(hp1).oper[1]^.val = 0) { and
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+ (taicpu(hp1).oper[1]^.val = 0) and
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GetNextInstruction(hp1, hp2) and
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(tai(hp2).typ = ait_instruction) and
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- // be careful here, following instructions could use other flags
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- // however after a jump fpc never depends on the value of flags
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+ { be careful here, following instructions could use other flags
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+ however after a jump fpc never depends on the value of flags }
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(taicpu(hp2).opcode = A_B) and
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- (taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL])} then
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+ (((taicpu(p).opcode in [A_ADC,A_ADD,A_SUB]) and
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+ (taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL])) or
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+ (taicpu(hp2).condition in [C_EQ,C_NE])) and
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+ assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next))) then
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begin
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taicpu(p).oppostfix:=PF_S;
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+ asml.insertbefore(tai_comment.Create(strpnew('Peephole OpCmp2OpS done')), p);
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asml.remove(hp1);
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hp1.free;
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end
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else
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- *)
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case taicpu(p).opcode of
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A_STR:
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begin
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florian