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@@ -1914,148 +1914,29 @@ unit aoptx86;
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{ Depending on the DeepMOVOpt above, it may turn out that hp1 completely
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overwrites the original destination register. e.g.
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- movl ###,%reg2d
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- movslq ###,%reg2q (### doesn't have to be the same as the first one)
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+ movl %reg1d,%reg2d
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+ movslq %reg1d,%reg2q
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- In this case, we can remove the MOV (Go to "Mov2Nop 5" below)
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+ In this case, we can remove the MOV
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}
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if (taicpu(p).oper[1]^.typ = top_reg) and
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MatchInstruction(hp1, [A_LEA, A_MOV, A_MOVSX, A_MOVZX{$ifdef x86_64}, A_MOVSXD{$endif x86_64}], []) and
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+ { The RegInOp check makes sure that movb r/m,%reg1b; movzbl %reg1b,%reg1l"
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+ and "movl r/m,%reg1; leal $1(%reg1,%reg2),%reg1" etc. are not incorrectly
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+ optimised }
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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+ not RegInOp(taicpu(p).oper[1]^.reg, taicpu(hp1).oper[0]^) and
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Reg1WriteOverwritesReg2Entirely(taicpu(hp1).oper[1]^.reg, taicpu(p).oper[1]^.reg) then
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- begin
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- if RegInOp(taicpu(p).oper[1]^.reg, taicpu(hp1).oper[0]^) then
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- begin
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- if (taicpu(hp1).oper[0]^.typ = top_reg) then
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- case taicpu(p).oper[0]^.typ of
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- top_const:
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- { We have something like:
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-
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- movb $x, %regb
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- movzbl %regb,%regd
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-
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- Change to:
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-
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- movl $x, %regd
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- }
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- begin
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- case taicpu(hp1).opsize of
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- S_BW:
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- if (taicpu(hp1).opcode <> A_MOVSX) or
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- (
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- (taicpu(p).oper[0]^.val >= 0) and
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- (taicpu(p).oper[0]^.val <= $7F)
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- ) then
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- begin
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- setsubreg(taicpu(p).oper[1]^.reg, R_SUBW);
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- taicpu(p).opsize := S_W;
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- end;
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- S_BL:
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- if (taicpu(hp1).opcode <> A_MOVSX) or
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- (
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- (taicpu(p).oper[0]^.val >= 0) and
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- (taicpu(p).oper[0]^.val <= $7F)
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- ) then
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- begin
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- setsubreg(taicpu(p).oper[1]^.reg, R_SUBD);
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- taicpu(p).opsize := S_L;
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- end;
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- S_WL:
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- if (taicpu(hp1).opcode <> A_MOVSX) or
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- (
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- (taicpu(p).oper[0]^.val >= 0) and
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- (taicpu(p).oper[0]^.val <= $7FFF)
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- ) then
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- begin
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- setsubreg(taicpu(p).oper[1]^.reg, R_SUBD);
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- taicpu(p).opsize := S_L;
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- end;
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-{$ifdef x86_64}
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- S_BQ:
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- if (taicpu(hp1).opcode <> A_MOVSX) or
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- (
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- (taicpu(p).oper[0]^.val >= 0) and
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- (taicpu(p).oper[0]^.val <= $7F)
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- ) then
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- begin
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- setsubreg(taicpu(p).oper[1]^.reg, R_SUBQ);
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- taicpu(p).opsize := S_Q;
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- end;
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- S_WQ:
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- if (taicpu(hp1).opcode <> A_MOVSX) or
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- (
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- (taicpu(p).oper[0]^.val >= 0) and
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- (taicpu(p).oper[0]^.val <= $7FFF)
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- ) then
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- begin
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- setsubreg(taicpu(p).oper[1]^.reg, R_SUBQ);
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- taicpu(p).opsize := S_Q;
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- end;
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- S_LQ:
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- if (taicpu(hp1).opcode <> A_MOVSXD) or
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- (
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- (taicpu(p).oper[0]^.val >= 0) and
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- (taicpu(p).oper[0]^.val <= $7FFFFFFF)
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- ) then
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- begin
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- setsubreg(taicpu(p).oper[1]^.reg, R_SUBQ);
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- taicpu(p).opsize := S_Q;
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- end;
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-{$endif x86_64}
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- else
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- { If hp1 was a MOV instruction, it should have been
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- optimised already }
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- InternalError(2020021001);
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- end;
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- DebugMsg(SPeepholeOptimization + 'MovMovXX2MovXX 2 done',p);
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- asml.Remove(hp1);
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- hp1.Free;
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- Result := True;
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- Exit;
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- end;
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- top_ref:
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- { We have something like:
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-
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- movb mem, %regb
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- movzbl %regb,%regd
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-
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- Change to:
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-
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- movzbl mem, %regd
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- }
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- if IsMOVZXAcceptable or (taicpu(hp1).opcode <> A_MOVZX) then
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- begin
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- DebugMsg(SPeepholeOptimization + 'MovMovXX2MovXX 1 done',p);
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- taicpu(hp1).loadref(0, taicpu(p).oper[0]^.ref^);
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- { take care of the register (de)allocs following p }
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- UpdateUsedRegs(tai(p.next));
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- asml.remove(p);
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- p.free;
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- p:=hp1;
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- Result := True;
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- Exit;
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- end;
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- else
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- if (taicpu(hp1).opcode <> A_MOV) and (taicpu(hp1).opcode <> A_LEA) then
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- { Just to make a saving, since there are no more optimisations with MOVZX and MOVSX/D }
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- Exit;
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- end;
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- end
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- { The RegInOp check makes sure that movl r/m,%reg1l; movzbl (%reg1l),%reg1l"
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- and "movl r/m,%reg1; leal $1(%reg1,%reg2),%reg1" etc. are not incorrectly
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- optimised }
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- else
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- begin
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- DebugMsg(SPeepholeOptimization + 'Mov2Nop 5 done',p);
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- { take care of the register (de)allocs following p }
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- UpdateUsedRegs(tai(p.next));
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- asml.remove(p);
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- p.free;
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- p:=hp1;
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- Result := True;
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- Exit;
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- end;
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- end;
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+ begin
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+ DebugMsg(SPeepholeOptimization + 'Mov2Nop 5 done',p);
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+ { take care of the register (de)allocs following p }
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+ UpdateUsedRegs(tai(p.next));
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+ asml.remove(p);
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+ p.free;
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+ p:=hp1;
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+ Result := True;
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+ Exit;
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+ end;
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if (taicpu(hp1).opcode = A_AND) and
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(taicpu(p).oper[1]^.typ = top_reg) and
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@@ -2458,8 +2339,27 @@ unit aoptx86;
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Result:=true;
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exit;
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end;
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+ {
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+ mov* x,reg1
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+ mov* y,reg1
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+
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+ to
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- { mov x,reg1; mov y,reg1 -> mov y,reg1 is handled by the Mov2Nop 5 optimisation }
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+ mov* y,reg1
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+ }
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+ if (taicpu(p).oper[1]^.typ=top_reg) and
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+ MatchOperand(taicpu(p).oper[1]^,taicpu(hp1).oper[1]^) and
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+ not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(hp1).oper[0]^)) then
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+ begin
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+ DebugMsg(SPeepholeOptimization + 'MovMov2Mov 4 done',p);
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+ { take care of the register (de)allocs following p }
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+ UpdateUsedRegs(tai(p.next));
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+ asml.remove(p);
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+ p.free;
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+ p:=hp1;
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+ Result:=true;
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+ exit;
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+ end;
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end;
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{ search further than the next instruction for a mov }
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florian