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@@ -62,11 +62,10 @@ unit aoptx86;
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function PrePeepholeOptIMUL(var p : tai) : boolean;
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function OptPass1AND(var p : tai) : boolean;
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- function OptPass1VMOVAP(var p : tai) : boolean;
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+ function OptPass1_V_MOVAP(var p : tai) : boolean;
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function OptPass1VOP(var p : tai) : boolean;
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function OptPass1MOV(var p : tai) : boolean;
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function OptPass1Movx(var p : tai) : boolean;
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- function OptPass1MOVAP(var p : tai) : boolean;
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function OptPass1MOVXX(var p : tai) : boolean;
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function OptPass1OP(var p : tai) : boolean;
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function OptPass1LEA(var p : tai) : boolean;
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@@ -1130,61 +1129,7 @@ unit aoptx86;
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end;
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- function TX86AsmOptimizer.OptPass1MOVAP(var p : tai) : boolean;
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- var
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- hp1,hp2 : tai;
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- begin
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- result:=false;
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- if MatchOpType(taicpu(p),top_reg,top_reg) and
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- GetNextInstruction(p, hp1) and
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- (hp1.typ = ait_instruction) and
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- GetNextInstruction(hp1, hp2) and
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- MatchInstruction(hp2,taicpu(p).opcode,[]) and
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- OpsEqual(taicpu(hp2).oper[1]^, taicpu(p).oper[0]^) and
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- MatchOpType(taicpu(hp2),top_reg,top_reg) and
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- MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) and
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- (((taicpu(p).opcode=A_MOVAPS) and
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- ((taicpu(hp1).opcode=A_ADDSS) or (taicpu(hp1).opcode=A_SUBSS) or
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- (taicpu(hp1).opcode=A_MULSS) or (taicpu(hp1).opcode=A_DIVSS))) or
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- ((taicpu(p).opcode=A_MOVAPD) and
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- ((taicpu(hp1).opcode=A_ADDSD) or (taicpu(hp1).opcode=A_SUBSD) or
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- (taicpu(hp1).opcode=A_MULSD) or (taicpu(hp1).opcode=A_DIVSD)))
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- ) then
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- { change
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- movapX reg,reg2
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- addsX/subsX/... reg3, reg2
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- movapX reg2,reg
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- to
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- addsX/subsX/... reg3,reg
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- }
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- begin
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- TransferUsedRegs(TmpUsedRegs);
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- UpdateUsedRegs(TmpUsedRegs, tai(p.next));
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- UpdateUsedRegs(TmpUsedRegs, tai(hp1.next));
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- If not(RegUsedAfterInstruction(taicpu(p).oper[1]^.reg,hp2,TmpUsedRegs)) then
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- begin
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- DebugMsg(SPeepholeOptimization + 'MovapXOpMovapX2Op ('+
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- debug_op2str(taicpu(p).opcode)+' '+
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- debug_op2str(taicpu(hp1).opcode)+' '+
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- debug_op2str(taicpu(hp2).opcode)+') done',p);
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- { we cannot eliminate the first move if
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- the operations uses the same register for source and dest }
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- if not(OpsEqual(taicpu(hp1).oper[1]^,taicpu(hp1).oper[0]^)) then
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- begin
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- asml.remove(p);
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- p.Free;
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- end;
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- taicpu(hp1).loadoper(1, taicpu(hp2).oper[1]^);
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- asml.remove(hp2);
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- hp2.Free;
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- p:=hp1;
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- result:=true;
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- end;
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- end
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- end;
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-
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-
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- function TX86AsmOptimizer.OptPass1VMOVAP(var p : tai) : boolean;
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+ function TX86AsmOptimizer.OptPass1_V_MOVAP(var p : tai) : boolean;
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var
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hp1,hp2 : tai;
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begin
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@@ -1234,12 +1179,72 @@ unit aoptx86;
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result:=true;
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end
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end
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- else if MatchInstruction(hp1,[A_VFMADD132PD,A_VFNMADD231SD,A_VFMADD231SD],[S_NO]) and
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+ else if MatchInstruction(hp1,[A_VFMADDPD,
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+ A_VFMADD132PD,
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+ A_VFMADD132PS,
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+ A_VFMADD132SD,
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+ A_VFMADD132SS,
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+ A_VFMADD213PD,
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+ A_VFMADD213PS,
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+ A_VFMADD213SD,
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+ A_VFMADD213SS,
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+ A_VFMADD231PD,
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+ A_VFMADD231PS,
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+ A_VFMADD231SD,
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+ A_VFMADD231SS,
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+ A_VFMADDSUB132PD,
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+ A_VFMADDSUB132PS,
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+ A_VFMADDSUB213PD,
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+ A_VFMADDSUB213PS,
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+ A_VFMADDSUB231PD,
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+ A_VFMADDSUB231PS,
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+ A_VFMSUB132PD,
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+ A_VFMSUB132PS,
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+ A_VFMSUB132SD,
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+ A_VFMSUB132SS,
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+ A_VFMSUB213PD,
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+ A_VFMSUB213PS,
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+ A_VFMSUB213SD,
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+ A_VFMSUB213SS,
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+ A_VFMSUB231PD,
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+ A_VFMSUB231PS,
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+ A_VFMSUB231SD,
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+ A_VFMSUB231SS,
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+ A_VFMSUBADD132PD,
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+ A_VFMSUBADD132PS,
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+ A_VFMSUBADD213PD,
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+ A_VFMSUBADD213PS,
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+ A_VFMSUBADD231PD,
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+ A_VFMSUBADD231PS,
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+ A_VFNMADD132PD,
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+ A_VFNMADD132PS,
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+ A_VFNMADD132SD,
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+ A_VFNMADD132SS,
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+ A_VFNMADD213PD,
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+ A_VFNMADD213PS,
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+ A_VFNMADD213SD,
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+ A_VFNMADD213SS,
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+ A_VFNMADD231PD,
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+ A_VFNMADD231PS,
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+ A_VFNMADD231SD,
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+ A_VFNMADD231SS,
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+ A_VFNMSUB132PD,
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+ A_VFNMSUB132PS,
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+ A_VFNMSUB132SD,
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+ A_VFNMSUB132SS,
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+ A_VFNMSUB213PD,
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+ A_VFNMSUB213PS,
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+ A_VFNMSUB213SD,
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+ A_VFNMSUB213SS,
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+ A_VFNMSUB231PD,
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+ A_VFNMSUB231PS,
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+ A_VFNMSUB231SD,
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+ A_VFNMSUB231SS],[S_NO]) and
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{ we mix single and double opperations here because we assume that the compiler
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generates vmovapd only after double operations and vmovaps only after single operations }
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MatchOperand(taicpu(p).oper[1]^,taicpu(hp1).oper[2]^) and
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GetNextInstruction(hp1,hp2) and
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- MatchInstruction(hp2,A_VMOVAPD,A_VMOVAPS,[S_NO]) and
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+ MatchInstruction(hp2,[A_VMOVAPD,A_VMOVAPS,A_MOVAPD,A_MOVAPS],[S_NO]) and
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MatchOperand(taicpu(p).oper[0]^,taicpu(hp2).oper[1]^) then
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begin
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TransferUsedRegs(TmpUsedRegs);
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@@ -1255,6 +1260,50 @@ unit aoptx86;
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hp2.Free;
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p:=hp1;
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end;
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+ end
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+ else if (hp1.typ = ait_instruction) and
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+ GetNextInstruction(hp1, hp2) and
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+ MatchInstruction(hp2,taicpu(p).opcode,[]) and
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+ OpsEqual(taicpu(hp2).oper[1]^, taicpu(p).oper[0]^) and
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+ MatchOpType(taicpu(hp2),top_reg,top_reg) and
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+ MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) and
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+ (((taicpu(p).opcode=A_MOVAPS) and
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+ ((taicpu(hp1).opcode=A_ADDSS) or (taicpu(hp1).opcode=A_SUBSS) or
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+ (taicpu(hp1).opcode=A_MULSS) or (taicpu(hp1).opcode=A_DIVSS))) or
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+ ((taicpu(p).opcode=A_MOVAPD) and
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+ ((taicpu(hp1).opcode=A_ADDSD) or (taicpu(hp1).opcode=A_SUBSD) or
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+ (taicpu(hp1).opcode=A_MULSD) or (taicpu(hp1).opcode=A_DIVSD)))
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+ ) then
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+ { change
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+ movapX reg,reg2
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+ addsX/subsX/... reg3, reg2
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+ movapX reg2,reg
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+ to
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+ addsX/subsX/... reg3,reg
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+ }
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+ begin
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+ TransferUsedRegs(TmpUsedRegs);
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+ UpdateUsedRegs(TmpUsedRegs, tai(p.next));
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+ UpdateUsedRegs(TmpUsedRegs, tai(hp1.next));
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+ If not(RegUsedAfterInstruction(taicpu(p).oper[1]^.reg,hp2,TmpUsedRegs)) then
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+ begin
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+ DebugMsg(SPeepholeOptimization + 'MovapXOpMovapX2Op ('+
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+ debug_op2str(taicpu(p).opcode)+' '+
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+ debug_op2str(taicpu(hp1).opcode)+' '+
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+ debug_op2str(taicpu(hp2).opcode)+') done',p);
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+ { we cannot eliminate the first move if
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+ the operations uses the same register for source and dest }
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+ if not(OpsEqual(taicpu(hp1).oper[1]^,taicpu(hp1).oper[0]^)) then
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+ begin
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+ asml.remove(p);
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+ p.Free;
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+ end;
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+ taicpu(hp1).loadoper(1, taicpu(hp2).oper[1]^);
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+ asml.remove(hp2);
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+ hp2.Free;
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+ p:=hp1;
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+ result:=true;
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+ end;
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end;
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end;
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end;
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florian