+ more m68k mess... ignore :)

git-svn-id: trunk@2384 -

compiler/m68k/aasmcpu.pas

@@ -107,6 +107,61 @@ type
       globtype;
 
 
+{$WARNING FIX ME!! useful for debug, remove it, same table as in agcpugas }
+    const
+      gas_op2str:op2strtable=
+    {  warning: CPU32 opcodes are not fully compatible with the MC68020. }
+       { 68000 only opcodes }
+       ('abcd',
+         'add','adda','addi','addq','addx','and','andi',
+         'asl','asr','bcc','bcs','beq','bge','bgt','bhi',
+         'ble','bls','blt','bmi','bne','bpl','bvc','bvs',
+         'bchg','bclr','bra','bset','bsr','btst','chk',
+         'clr','cmp','cmpa','cmpi','cmpm','dbcc','dbcs','dbeq','dbge',
+         'dbgt','dbhi','dble','dbls','dblt','dbmi','dbne','dbra',
+         'dbpl','dbt','dbvc','dbvs','dbf','divs','divu',
+         'eor','eori','exg','illegal','ext','jmp','jsr',
+         'lea','link','lsl','lsr','move','movea','movei','moveq',
+         'movem','movep','muls','mulu','nbcd','neg','negx',
+         'nop','not','or','ori','pea','rol','ror','roxl',
+         'roxr','rtr','rts','sbcd','scc','scs','seq','sge',
+         'sgt','shi','sle','sls','slt','smi','sne',
+         'spl','st','svc','svs','sf','sub','suba','subi','subq',
+         'subx','swap','tas','trap','trapv','tst','unlk',
+         'rte','reset','stop',
+         { mc68010 instructions }
+         'bkpt','movec','moves','rtd',
+         { mc68020 instructions }
+         'bfchg','bfclr','bfexts','bfextu','bfffo',
+         'bfins','bfset','bftst','callm','cas','cas2',
+         'chk2','cmp2','divsl','divul','extb','pack','rtm',
+         'trapcc','tracs','trapeq','trapf','trapge','trapgt',
+         'traphi','traple','trapls','traplt','trapmi','trapne',
+         'trappl','trapt','trapvc','trapvs','unpk',
+         { fpu processor instructions - directly supported only. }
+         { ieee aware and misc. condition codes not supported   }
+         'fabs','fadd',
+         'fbeq','fbne','fbngt','fbgt','fbge','fbnge',
+         'fblt','fbnlt','fble','fbgl','fbngl','fbgle','fbngle',
+         'fdbeq','fdbne','fdbgt','fdbngt','fdbge','fdbnge',
+         'fdblt','fdbnlt','fdble','fdbgl','fdbngl','fdbgle','fdbngle',
+         'fseq','fsne','fsgt','fsngt','fsge','fsnge',
+         'fslt','fsnlt','fsle','fsgl','fsngl','fsgle','fsngle',
+         'fcmp','fdiv','fmove','fmovem',
+         'fmul','fneg','fnop','fsqrt','fsub','fsgldiv',
+         'fsflmul','ftst',
+         'ftrapeq','ftrapne','ftrapgt','ftrapngt','ftrapge','ftrapnge',
+         'ftraplt','ftrapnlt','ftraple','ftrapgl','ftrapngl','ftrapgle','ftrapngle',
+         { protected instructions }
+         'cprestore','cpsave',
+         { fpu unit protected instructions                    }
+         { and 68030/68851 common mmu instructions            }
+         { (this may include 68040 mmu instructions)          }
+         'frestore','fsave','pflush','pflusha','pload','pmove','ptest',
+         { useful for assembly language output }
+         'label','none','db','s','b','fb');
+
+
 {*****************************************************************************
                                  Taicpu Constructors
 *****************************************************************************}
@@ -451,7 +506,8 @@ type
     function taicpu.spilling_get_operation_type(opnr: longint): topertype;
       begin
         case opcode of
-          A_MOVE, A_MOVEQ, A_ADD, A_ADDQ, A_SUB, A_SUBQ:
+          A_MOVE, A_MOVEQ, A_ADD, A_ADDQ, A_ADDX, A_SUB, A_SUBQ,
+          A_AND, A_LSR, A_LSL, A_ASR, A_ASL, A_EOR, A_EORI:
             if opnr=0 then begin
 //              writeln('move/etc write');
               result:=operand_write;
@@ -459,8 +515,12 @@ type
 //              writeln('move/etc read');
               result:=operand_read;
             end;
+          A_TST,A_CMP,A_CMPI:
+            result:=operand_read;
+          A_CLR,A_NEG:
+            result:=operand_write;
         else
-          writeln('other opcode: ',dword(opcode),' (faked value returned)',opnr);
+          writeln('other opcode: ',gas_op2str[opcode],' (faked value returned)',opnr);
 	  result:=operand_write;
         end;
 	// fake
@@ -474,7 +534,10 @@ type
         case getregtype(r) of
           R_INTREGISTER :
             result:=taicpu.op_ref_reg(A_MOVE,S_L,ref,r);
-          R_FPUREGISTER : begin end;
+          R_FPUREGISTER : begin 
+            // is this correct?
+	    result:=taicpu.op_ref_reg(A_FMOVE,S_L,ref,r);          
+            end;
         end;
 {
         case getregtype(r) of
@@ -506,7 +569,7 @@ type
 	    result:=taicpu.op_reg_ref(A_MOVE,S_L,r,ref);
 	  R_FPUREGISTER :
 	    begin
-//	    result:=taicpu.op_reg_ref(A_FMOVE,R_SUBFS,r,ref);
+	    result:=taicpu.op_reg_ref(A_FMOVE,S_L,r,ref);
 	    end;
 	end;
         {case getregtype(r) of

compiler/m68k/cpubase.pas

@@ -420,7 +420,8 @@ implementation
              cgsize2subreg:=R_SUBWHOLE;
             end;    
           else begin
-            writeln('miafasz?');
+            writeln('hmm!?');
+    // this supposed to be debug         
     //        p:=nil; dword(p^):=0;
     //        internalerror(200301231);
             cgsize2subreg:=R_SUBWHOLE;

compiler/m68k/n68kadd.pas

@@ -35,6 +35,7 @@ interface
           function getresflags(unsigned: boolean) : tresflags;
        protected
           procedure second_addfloat;override;
+          procedure second_cmpfloat;override;
           procedure second_cmpordinal;override;
           procedure second_cmpsmallset;override;
           procedure second_cmp64bit;override;
@@ -177,6 +178,38 @@ implementation
       end;
 
 
+    procedure t68kaddnode.second_cmpfloat;
+      begin
+        pass_left_right;
+
+{
+        if (nf_swaped in flags) then
+          swapleftright;
+}
+        { force fpureg as location, left right doesn't matter
+          as both will be in a fpureg }
+        location_force_fpureg(exprasmlist,left.location,true);
+        location_force_fpureg(exprasmlist,right.location,true);
+
+        location_reset(location,LOC_FLAGS,OS_NO);
+        location.resflags:=getresflags(true);
+{
+        if nodetype in [equaln,unequaln] then
+          exprasmlist.concat(setoppostfix(taicpu.op_reg_reg(A_CMF,
+             left.location.register,right.location.register),
+             cgsize2fpuoppostfix[def_cgsize(resulttype.def)]))
+        else
+          exprasmlist.concat(setoppostfix(taicpu.op_reg_reg(A_CMFE,
+             left.location.register,right.location.register),
+             cgsize2fpuoppostfix[def_cgsize(resulttype.def)]));
+
+        location_reset(location,LOC_FLAGS,OS_NO);
+        location.resflags:=getresflags(false);
+}
+      end;
+
+
+
 
 {*****************************************************************************
                                 Smallsets
@@ -405,8 +438,11 @@ implementation
     procedure t68kaddnode.second_cmp64bit;
      begin
       writeln('second_cmp64bit');
-(*        load_left_right(true,false);
-
+      pass_left_right;
+      
+      
+//     load_left_right(true,false);
+(* 
         case nodetype of
           ltn,lten,
           gtn,gten:
@@ -501,6 +537,7 @@ implementation
           location_reset(location,LOC_JUMP,OS_NO);
 *)
        location_reset(location,LOC_JUMP,OS_NO);
+       writeln('second_cmp64_exit');
      end;