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@@ -26,7 +26,7 @@ Unit aoptcpu;
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{$i fpcdefs.inc}
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{ $define DEBUG_PREREGSCHEDULER}
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-{$define DEBUG_AOPTCPU}
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+{ $define DEBUG_AOPTCPU}
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Interface
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@@ -472,7 +472,9 @@ Implementation
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hp1 : tai;
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begin
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Result:=false;
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- if (MatchInstruction(movp, A_VMOV, [taicpu(p).condition], [taicpu(p).oppostfix]) or
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+ if ((MatchInstruction(movp, A_VMOV, [taicpu(p).condition], [taicpu(p).oppostfix]) and
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+ ((getregtype(taicpu(movp).oper[0]^.reg)=R_MMREGISTER) or (taicpu(p).opcode=A_VLDR))
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+ ) or
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(((taicpu(p).oppostfix in [PF_F64F32,PF_F64S16,PF_F64S32,PF_F64U16,PF_F64U32]) or (getsubreg(taicpu(p).oper[0]^.reg)=R_SUBFD)) and MatchInstruction(movp, A_VMOV, [taicpu(p).condition], [PF_F64])) or
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(((taicpu(p).oppostfix in [PF_F32F64,PF_F32S16,PF_F32S32,PF_F32U16,PF_F32U32]) or (getsubreg(taicpu(p).oper[0]^.reg)=R_SUBFS)) and MatchInstruction(movp, A_VMOV, [taicpu(p).condition], [PF_F32]))
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) and
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@@ -519,6 +521,17 @@ Implementation
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IncludeRegInUsedRegs(taicpu(movp).oper[0]^.reg,UsedRegs);
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end;
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+ { change
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+ vldr reg0,[reg1]
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+ vmov reg2,reg0
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+ into
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+ ldr reg2,[reg1]
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+
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+ if reg2 is an int register
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+ }
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+ if (taicpu(p).opcode=A_VLDR) and (getregtype(taicpu(movp).oper[0]^.reg)=R_INTREGISTER) then
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+ taicpu(p).opcode:=A_LDR;
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+
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{ finally get rid of the mov }
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taicpu(p).loadreg(0,taicpu(movp).oper[0]^.reg);
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asml.remove(movp);
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