* disable regable 4 bytes records on 16 bit alu targets, to enable them, location handling should be rewritten else gen_load_cgpara_loc gets even more messy

git-svn-id: trunk@25239 -

compiler/symdef.pas

@@ -1806,6 +1806,8 @@ implementation
                 ispowerof2(recsize,temp) and
                 { sizeof(asizeint)*2 records in int registers is currently broken for endian_big targets }
                 (((recsize <= sizeof(asizeint)*2) and (target_info.endian=endian_little)
+                 { records cannot go into registers on 16 bit targets for now }
+                  and (sizeof(asizeint)>2)
                   and not trecorddef(self).contains_float_field) or
                   (recsize <= sizeof(asizeint)))
                 and not needs_inittable;