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@@ -626,12 +626,13 @@ implementation
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var
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var
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hp,node, code_para, dest_para : ptree;
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hp,node, code_para, dest_para : ptree;
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- hreg: TRegister;
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+ hreg,hreg2: TRegister;
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hdef: POrdDef;
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hdef: POrdDef;
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procedureprefix : string;
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procedureprefix : string;
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hr, hr2: TReference;
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hr, hr2: TReference;
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dummycoll : tdefcoll;
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dummycoll : tdefcoll;
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has_code, has_32bit_code, oldregisterdef: boolean;
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has_code, has_32bit_code, oldregisterdef: boolean;
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+ r : preference;
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begin
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begin
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dummycoll.register:=R_NO;
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dummycoll.register:=R_NO;
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@@ -702,16 +703,26 @@ implementation
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floatdef:
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floatdef:
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procedureprefix := 'FPC_VAL_REAL_';
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procedureprefix := 'FPC_VAL_REAL_';
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orddef:
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orddef:
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- if is_signed(dest_para^.resulttype) then
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+ if is_64bitint(dest_para^.resulttype) then
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begin
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begin
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- {if we are converting to a signed number, we have to include the
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- size of the destination, so the Val function can extend the sign
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- of the result to allow proper range checking}
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- exprasmlist^.concat(new(pai386,op_const(A_PUSH,S_L,dest_para^.resulttype^.size)));
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- procedureprefix := 'FPC_VAL_SINT_'
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+ if is_signed(dest_para^.resulttype) then
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+ procedureprefix := 'FPC_VAL_INT64_'
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+ else
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+ procedureprefix := 'FPC_VAL_QWORD_';
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end
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end
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else
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else
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- procedureprefix := 'FPC_VAL_UINT_';
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+ begin
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+ if is_signed(dest_para^.resulttype) then
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+ begin
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+ {if we are converting to a signed number, we have to include the
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+ size of the destination, so the Val function can extend the sign
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+ of the result to allow proper range checking}
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+ exprasmlist^.concat(new(pai386,op_const(A_PUSH,S_L,dest_para^.resulttype^.size)));
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+ procedureprefix := 'FPC_VAL_SINT_'
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+ end
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+ else
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+ procedureprefix := 'FPC_VAL_UINT_';
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+ end;
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End;
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End;
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emitcall(procedureprefix+pstringdef(node^.resulttype)^.stringtypname);
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emitcall(procedureprefix+pstringdef(node^.resulttype)^.stringtypname);
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{ before disposing node we need to ungettemp !! PM }
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{ before disposing node we need to ungettemp !! PM }
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@@ -729,6 +740,11 @@ implementation
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register variable}
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register variable}
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hreg := getexplicitregister32(R_EAX);
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hreg := getexplicitregister32(R_EAX);
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emit_reg_reg(A_MOV,S_L,R_EAX,hreg);
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emit_reg_reg(A_MOV,S_L,R_EAX,hreg);
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+ if is_64bitint(dest_para^.resulttype) then
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+ begin
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+ hreg2:=getexplicitregister32(R_EDX);
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+ emit_reg_reg(A_MOV,S_L,R_EDX,hreg2);
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+ end;
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{as of now, hreg now holds the location of the result, if it was
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{as of now, hreg now holds the location of the result, if it was
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integer}
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integer}
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End;
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End;
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@@ -770,11 +786,20 @@ implementation
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u32bit,s32bit:
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u32bit,s32bit:
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exprasmlist^.concat(new(pai386,op_reg_ref(A_MOV, S_L,
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exprasmlist^.concat(new(pai386,op_reg_ref(A_MOV, S_L,
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hreg,newreference(hr2))));
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hreg,newreference(hr2))));
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- {u64bit,s64bitint: ???}
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+ u64bit,s64bitint:
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+ begin
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+ exprasmlist^.concat(new(pai386,op_reg_ref(A_MOV, S_L,
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+ hreg,newreference(hr2))));
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+ r:=newreference(hr2);
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+ inc(r^.offset,4);
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+ exprasmlist^.concat(new(pai386,op_reg_ref(A_MOV, S_L,
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+ hreg2,r)));
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+ end;
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End;
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End;
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End;
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End;
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If (cs_check_range in aktlocalswitches) and
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If (cs_check_range in aktlocalswitches) and
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(dest_para^.left^.resulttype^.deftype = orddef) and
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(dest_para^.left^.resulttype^.deftype = orddef) and
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+ (not(is_64bitint(dest_para^.left^.resulttype))) and
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{the following has to be changed to 64bit checking, once Val
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{the following has to be changed to 64bit checking, once Val
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returns 64 bit values (unless a special Val function is created
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returns 64 bit values (unless a special Val function is created
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for that)}
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for that)}
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@@ -1293,7 +1318,11 @@ implementation
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end.
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end.
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{
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{
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$Log$
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$Log$
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- Revision 1.60 1999-07-01 15:49:09 florian
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+ Revision 1.61 1999-07-03 14:14:27 florian
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+ + start of val(int64/qword)
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+ * longbool, wordbool constants weren't written, fixed
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+
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+ Revision 1.60 1999/07/01 15:49:09 florian
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* int64/qword type release
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* int64/qword type release
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+ lo/hi for int64/qword
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+ lo/hi for int64/qword
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