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@@ -0,0 +1,675 @@
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+{
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+ $Id$
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+ Copyright (c) 1998-2002 by Carl Eric Codere and Peter Vreman
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+
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+ Handles the common i386 assembler reader routines
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+
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+ This program is free software; you can redistribute it and/or modify
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+ it under the terms of the GNU General Public License as published by
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+ the Free Software Foundation; either version 2 of the License, or
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+ (at your option) any later version.
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+
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+ This program is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ GNU General Public License for more details.
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+
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+ You should have received a copy of the GNU General Public License
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+ along with this program; if not, write to the Free Software
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+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+
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+ ****************************************************************************
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+}
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+unit Ra386;
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+
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+{$i fpcdefs.inc}
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+
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+interface
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+
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+uses
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+ aasmbase,aasmtai,aasmcpu,
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+ cpubase,rautils,cclasses;
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+
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+{ Parser helpers }
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+function is_prefix(t:tasmop):boolean;
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+function is_override(t:tasmop):boolean;
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+Function CheckPrefix(prefixop,op:tasmop): Boolean;
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+Function CheckOverride(overrideop,op:tasmop): Boolean;
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+Procedure FWaitWarning;
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+
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+type
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+ T386Operand=class(TOperand)
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+ Procedure SetCorrectSize(opcode:tasmop);override;
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+ end;
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+
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+ T386Instruction=class(TInstruction)
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+ { Operand sizes }
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+ procedure AddReferenceSizes;
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+ procedure SetInstructionOpsize;
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+ procedure CheckOperandSizes;
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+ procedure CheckNonCommutativeOpcodes;
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+ { opcode adding }
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+ procedure ConcatInstruction(p : taasmoutput);override;
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+ end;
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+
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+ tstr2opentry = class(Tnamedindexitem)
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+ op: TAsmOp;
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+ end;
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+
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+const
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+ AsmPrefixes = 6;
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+ AsmPrefix : array[0..AsmPrefixes-1] of TasmOP =(
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+ A_LOCK,A_REP,A_REPE,A_REPNE,A_REPNZ,A_REPZ
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+ );
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+
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+ AsmOverrides = 6;
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+ AsmOverride : array[0..AsmOverrides-1] of TasmOP =(
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+ A_SEGCS,A_SEGES,A_SEGDS,A_SEGFS,A_SEGGS,A_SEGSS
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+ );
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+
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+ CondAsmOps=3;
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+ CondAsmOp:array[0..CondAsmOps-1] of TasmOp=(
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+ A_CMOVcc, A_Jcc, A_SETcc
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+ );
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+ CondAsmOpStr:array[0..CondAsmOps-1] of string[4]=(
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+ 'CMOV','J','SET'
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+ );
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+
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+ { Convert reg to opsize }
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+ reg_2_opsize:array[firstreg..lastreg] of topsize = (S_NO,
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+ S_L,S_L,S_L,S_L,S_L,S_L,S_L,S_L,
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+ S_W,S_W,S_W,S_W,S_W,S_W,S_W,S_W,
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+ S_B,S_B,S_B,S_B,S_B,S_B,S_B,S_B,
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+ S_W,S_W,S_W,S_W,S_W,S_W,
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+ S_FL,S_FL,S_FL,S_FL,S_FL,S_FL,S_FL,S_FL,S_FL,
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+ S_L,S_L,S_L,S_L,S_L,S_L,
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+ S_L,S_L,S_L,S_L,
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+ S_L,S_L,S_L,S_L,S_L,
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+ S_D,S_D,S_D,S_D,S_D,S_D,S_D,S_D,
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+ S_D,S_D,S_D,S_D,S_D,S_D,S_D,S_D
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+ );
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+
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+implementation
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+
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+uses
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+ globtype,globals,systems,verbose,
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+ cpuinfo,ag386att;
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+
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+{$define ATTOP}
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+{$define INTELOP}
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+
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+{$ifdef NORA386INT}
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+ {$ifdef NOAG386NSM}
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+ {$ifdef NOAG386INT}
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+ {$undef INTELOP}
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+ {$endif}
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+ {$endif}
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+{$endif}
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+
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+{$ifdef NORA386ATT}
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+ {$ifdef NOAG386ATT}
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+ {$undef ATTOP}
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+ {$endif}
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+{$endif}
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+
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+
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+
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+{*****************************************************************************
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+ Parser Helpers
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+*****************************************************************************}
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+
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+function is_prefix(t:tasmop):boolean;
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+var
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+ i : longint;
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+Begin
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+ is_prefix:=false;
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+ for i:=1 to AsmPrefixes do
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+ if t=AsmPrefix[i-1] then
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+ begin
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+ is_prefix:=true;
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+ exit;
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+ end;
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+end;
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+
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+
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+function is_override(t:tasmop):boolean;
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+var
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+ i : longint;
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+Begin
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+ is_override:=false;
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+ for i:=1 to AsmOverrides do
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+ if t=AsmOverride[i-1] then
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+ begin
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+ is_override:=true;
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+ exit;
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+ end;
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+end;
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+
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+
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+Function CheckPrefix(prefixop,op:tasmop): Boolean;
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+{ Checks if the prefix is valid with the following opcode }
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+{ return false if not, otherwise true }
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+Begin
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+ CheckPrefix := TRUE;
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+(* Case prefix of
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+ A_REP,A_REPNE,A_REPE:
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+ Case opcode Of
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+ A_SCASB,A_SCASW,A_SCASD,
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+ A_INS,A_OUTS,A_MOVS,A_CMPS,A_LODS,A_STOS:;
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+ Else
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+ Begin
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+ CheckPrefix := FALSE;
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+ exit;
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+ end;
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+ end; { case }
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+ A_LOCK:
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+ Case opcode Of
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+ A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,A_ADC,A_SBB,A_AND,A_SUB,
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+ A_XOR,A_NOT,A_NEG,A_INC,A_DEC:;
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+ Else
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+ Begin
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+ CheckPrefix := FALSE;
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+ Exit;
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+ end;
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+ end; { case }
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+ A_NONE: exit; { no prefix here }
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+ else
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+ CheckPrefix := FALSE;
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+ end; { end case } *)
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+end;
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+
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+
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+Function CheckOverride(overrideop,op:tasmop): Boolean;
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+{ Check if the override is valid, and if so then }
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+{ update the instr variable accordingly. }
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+Begin
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+ CheckOverride := true;
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+{ Case instr.getinstruction of
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+ A_MOVS,A_XLAT,A_CMPS:
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+ Begin
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+ CheckOverride := TRUE;
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+ Message(assem_e_segment_override_not_supported);
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+ end
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+ end }
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+end;
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+
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+
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+Procedure FWaitWarning;
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+begin
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+ if (target_info.target=target_i386_GO32V2) and (cs_fp_emulation in aktmoduleswitches) then
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+ Message(asmr_w_fwait_emu_prob);
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+end;
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+
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+{*****************************************************************************
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+ T386Operand
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+*****************************************************************************}
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+
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+Procedure T386Operand.SetCorrectSize(opcode:tasmop);
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+begin
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+ if gas_needsuffix[opcode]=attsufFPU then
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+ begin
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+ case size of
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+ S_L : size:=S_FS;
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+ S_IQ : size:=S_FL;
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+ end;
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+ end
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+ else if gas_needsuffix[opcode]=attsufFPUint then
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+ begin
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+ case size of
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+ S_W : size:=S_IS;
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+ S_L : size:=S_IL;
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+ end;
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+ end;
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+end;
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+
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+
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+{*****************************************************************************
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+ T386Instruction
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+*****************************************************************************}
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+
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+procedure T386Instruction.AddReferenceSizes;
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+{ this will add the sizes for references like [esi] which do not
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+ have the size set yet, it will take only the size if the other
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+ operand is a register }
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+var
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+ operand2,i : longint;
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+ s : tasmsymbol;
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+ so : longint;
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+begin
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+ for i:=1to ops do
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+ begin
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+ operands[i].SetCorrectSize(opcode);
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+ if (operands[i].size=S_NO) then
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+ begin
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+ case operands[i].Opr.Typ of
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+ OPR_REFERENCE :
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+ begin
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+ if i=2 then
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+ operand2:=1
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+ else
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+ operand2:=2;
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+ if operand2<ops then
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+ begin
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+ { Only allow register as operand to take the size from }
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+ if operands[operand2].opr.typ=OPR_REGISTER then
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+ begin
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+ if ((opcode<>A_MOVD) and
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+ (opcode<>A_CVTSI2SS)) then
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+ operands[i].size:=operands[operand2].size;
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+ end
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+ else
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+ begin
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+ { if no register then take the opsize (which is available with ATT),
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+ if not availble then give an error }
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+ if opsize<>S_NO then
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+ operands[i].size:=opsize
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+ else
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+ begin
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+ Message(asmr_e_unable_to_determine_reference_size);
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+ { recovery }
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+ operands[i].size:=S_L;
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+ end;
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+ end;
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+ end
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+ else
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+ begin
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+ if opsize<>S_NO then
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+ operands[i].size:=opsize
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+ end;
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+ end;
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+ OPR_SYMBOL :
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+ begin
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+ { Fix lea which need a reference }
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+ if opcode=A_LEA then
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+ begin
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+ s:=operands[i].opr.symbol;
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+ so:=operands[i].opr.symofs;
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+ operands[i].opr.typ:=OPR_REFERENCE;
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+ Fillchar(operands[i].opr.ref,sizeof(treference),0);
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+ operands[i].opr.ref.symbol:=s;
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+ operands[i].opr.ref.offset:=so;
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+ end;
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+ operands[i].size:=S_L;
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+ end;
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+ end;
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+ end;
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+ end;
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+end;
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+
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+
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+procedure T386Instruction.SetInstructionOpsize;
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+begin
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+ if opsize<>S_NO then
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+ exit;
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+ case ops of
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+ 0 : ;
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+ 1 :
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+ { "push es" must be stored as a long PM }
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+ if ((opcode=A_PUSH) or
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+ (opcode=A_POP)) and
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+ (operands[1].opr.typ=OPR_REGISTER) and
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+ ((operands[1].opr.reg>=firstsreg) and
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+ (operands[1].opr.reg<=lastsreg)) then
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+ opsize:=S_L
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+ else
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+ opsize:=operands[1].size;
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+ 2 :
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+ begin
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+ case opcode of
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+ A_MOVZX,A_MOVSX :
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+ begin
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+ case operands[1].size of
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+ S_W :
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+ case operands[2].size of
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+ S_L :
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+ opsize:=S_WL;
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+ end;
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+ S_B :
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+ case operands[2].size of
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+ S_W :
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+ opsize:=S_BW;
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+ S_L :
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+ opsize:=S_BL;
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+ end;
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+ end;
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+ end;
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+ A_MOVD : { movd is a move from a mmx register to a
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+ 32 bit register or memory, so no opsize is correct here PM }
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+ exit;
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+ A_OUT :
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+ opsize:=operands[1].size;
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+ else
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+ opsize:=operands[2].size;
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+ end;
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+ end;
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+ 3 :
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+ opsize:=operands[3].size;
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+ end;
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+end;
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+
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+
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+procedure T386Instruction.CheckOperandSizes;
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+var
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+ sizeerr : boolean;
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+ i : longint;
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+begin
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+ { Check only the most common opcodes here, the others are done in
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+ the assembler pass }
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+ case opcode of
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+ A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
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+ A_CMP,A_MOV,
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+ A_ADD,A_SUB,A_ADC,A_SBB,
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+ A_AND,A_OR,A_TEST,A_XOR: ;
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+ else
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+ exit;
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+ end;
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+ { Handle the BW,BL,WL separatly }
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+ sizeerr:=false;
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+ { special push/pop selector case }
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+ if ((opcode=A_PUSH) or
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+ (opcode=A_POP)) and
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+ (operands[1].opr.typ=OPR_REGISTER) and
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+ ((operands[1].opr.reg>=firstsreg) and
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+ (operands[1].opr.reg<=lastsreg)) then
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+ exit;
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+ if opsize in [S_BW,S_BL,S_WL] then
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+ begin
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+ if ops<>2 then
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+ sizeerr:=true
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+ else
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+ begin
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+ case opsize of
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+ S_BW :
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+ sizeerr:=(operands[1].size<>S_B) or (operands[2].size<>S_W);
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+ S_BL :
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+ sizeerr:=(operands[1].size<>S_B) or (operands[2].size<>S_L);
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+ S_WL :
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+ sizeerr:=(operands[1].size<>S_W) or (operands[2].size<>S_L);
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+ end;
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+ end;
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+ end
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+ else
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+ begin
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+ for i:=1 to ops do
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+ begin
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+ if (operands[i].opr.typ<>OPR_CONSTANT) and
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+ (operands[i].size in [S_B,S_W,S_L]) and
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+ (operands[i].size<>opsize) then
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+ sizeerr:=true;
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+ end;
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+ end;
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+ if sizeerr then
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+ begin
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+ { if range checks are on then generate an error }
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+ if (cs_compilesystem in aktmoduleswitches) or
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+ not (cs_check_range in aktlocalswitches) then
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+ Message(asmr_w_size_suffix_and_dest_dont_match)
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+ else
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+ Message(asmr_e_size_suffix_and_dest_dont_match);
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+ end;
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+end;
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+
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+
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+{ This check must be done with the operand in ATT order
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+ i.e.after swapping in the intel reader
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+ but before swapping in the NASM and TASM writers PM }
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+procedure T386Instruction.CheckNonCommutativeOpcodes;
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+begin
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+ if ((ops=2) and
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+ (operands[1].opr.typ=OPR_REGISTER) and
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+ (operands[2].opr.typ=OPR_REGISTER) and
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+ { if the first is ST and the second is also a register
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+ it is necessarily ST1 .. ST7 }
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+ (operands[1].opr.reg=R_ST)) or
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+ (ops=0) then
|
|
|
+ if opcode=A_FSUBR then
|
|
|
+ opcode:=A_FSUB
|
|
|
+ else if opcode=A_FSUB then
|
|
|
+ opcode:=A_FSUBR
|
|
|
+ else if opcode=A_FDIVR then
|
|
|
+ opcode:=A_FDIV
|
|
|
+ else if opcode=A_FDIV then
|
|
|
+ opcode:=A_FDIVR
|
|
|
+ else if opcode=A_FSUBRP then
|
|
|
+ opcode:=A_FSUBP
|
|
|
+ else if opcode=A_FSUBP then
|
|
|
+ opcode:=A_FSUBRP
|
|
|
+ else if opcode=A_FDIVRP then
|
|
|
+ opcode:=A_FDIVP
|
|
|
+ else if opcode=A_FDIVP then
|
|
|
+ opcode:=A_FDIVRP;
|
|
|
+ if ((ops=1) and
|
|
|
+ (operands[1].opr.typ=OPR_REGISTER) and
|
|
|
+ (operands[1].opr.reg in [R_ST1..R_ST7])) then
|
|
|
+ if opcode=A_FSUBRP then
|
|
|
+ opcode:=A_FSUBP
|
|
|
+ else if opcode=A_FSUBP then
|
|
|
+ opcode:=A_FSUBRP
|
|
|
+ else if opcode=A_FDIVRP then
|
|
|
+ opcode:=A_FDIVP
|
|
|
+ else if opcode=A_FDIVP then
|
|
|
+ opcode:=A_FDIVRP;
|
|
|
+end;
|
|
|
+
|
|
|
+{*****************************************************************************
|
|
|
+ opcode Adding
|
|
|
+*****************************************************************************}
|
|
|
+
|
|
|
+procedure T386Instruction.ConcatInstruction(p : taasmoutput);
|
|
|
+var
|
|
|
+ siz : topsize;
|
|
|
+ i,asize : longint;
|
|
|
+ ai : taicpu;
|
|
|
+begin
|
|
|
+{ Get Opsize }
|
|
|
+ if (opsize<>S_NO) or (Ops=0) then
|
|
|
+ siz:=opsize
|
|
|
+ else
|
|
|
+ begin
|
|
|
+ if (Ops=2) and (operands[1].opr.typ=OPR_REGISTER) then
|
|
|
+ siz:=operands[1].size
|
|
|
+ else
|
|
|
+ siz:=operands[Ops].size;
|
|
|
+ { MOVD should be of size S_LQ or S_QL, but these do not exist PM }
|
|
|
+ if (ops=2) and (operands[1].size<>S_NO) and
|
|
|
+ (operands[2].size<>S_NO) and (operands[1].size<>operands[2].size) then
|
|
|
+ siz:=S_NO;
|
|
|
+ end;
|
|
|
+
|
|
|
+ if ((opcode=A_MOVD)or
|
|
|
+ (opcode=A_CVTSI2SS)) and
|
|
|
+ ((operands[1].size=S_NO) or
|
|
|
+ (operands[2].size=S_NO)) then
|
|
|
+ siz:=S_NO;
|
|
|
+ { NASM does not support FADD without args
|
|
|
+ as alias of FADDP
|
|
|
+ and GNU AS interprets FADD without operand differently
|
|
|
+ for version 2.9.1 and 2.9.5 !! }
|
|
|
+ if (ops=0) and
|
|
|
+ ((opcode=A_FADD) or
|
|
|
+ (opcode=A_FMUL) or
|
|
|
+ (opcode=A_FSUB) or
|
|
|
+ (opcode=A_FSUBR) or
|
|
|
+ (opcode=A_FDIV) or
|
|
|
+ (opcode=A_FDIVR)) then
|
|
|
+ begin
|
|
|
+ if opcode=A_FADD then
|
|
|
+ opcode:=A_FADDP
|
|
|
+ else if opcode=A_FMUL then
|
|
|
+ opcode:=A_FMULP
|
|
|
+ else if opcode=A_FSUB then
|
|
|
+ opcode:=A_FSUBP
|
|
|
+ else if opcode=A_FSUBR then
|
|
|
+ opcode:=A_FSUBRP
|
|
|
+ else if opcode=A_FDIV then
|
|
|
+ opcode:=A_FDIVP
|
|
|
+ else if opcode=A_FDIVR then
|
|
|
+ opcode:=A_FDIVRP;
|
|
|
+{$ifdef ATTOP}
|
|
|
+ message1(asmr_w_fadd_to_faddp,gas_op2str[opcode]);
|
|
|
+{$else}
|
|
|
+ {$ifdef INTELOP}
|
|
|
+ message1(asmr_w_fadd_to_faddp,std_op2str[opcode]);
|
|
|
+ {$else}
|
|
|
+ message1(asmr_w_fadd_to_faddp,'fXX');
|
|
|
+ {$endif INTELOP}
|
|
|
+{$endif ATTOP}
|
|
|
+ end;
|
|
|
+
|
|
|
+ { GNU AS interprets FDIV without operand differently
|
|
|
+ for version 2.9.1 and 2.10
|
|
|
+ we add explicit args to it !! }
|
|
|
+ if (ops=0) and
|
|
|
+ ((opcode=A_FSUBP) or
|
|
|
+ (opcode=A_FSUBRP) or
|
|
|
+ (opcode=A_FDIVP) or
|
|
|
+ (opcode=A_FDIVRP) or
|
|
|
+ (opcode=A_FSUB) or
|
|
|
+ (opcode=A_FSUBR) or
|
|
|
+ (opcode=A_FDIV) or
|
|
|
+ (opcode=A_FDIVR)) then
|
|
|
+ begin
|
|
|
+{$ifdef ATTOP}
|
|
|
+ message1(asmr_w_adding_explicit_args_fXX,gas_op2str[opcode]);
|
|
|
+{$else}
|
|
|
+ {$ifdef INTELOP}
|
|
|
+ message1(asmr_w_adding_explicit_args_fXX,std_op2str[opcode]);
|
|
|
+ {$else}
|
|
|
+ message1(asmr_w_adding_explicit_args_fXX,'fXX');
|
|
|
+ {$endif INTELOP}
|
|
|
+{$endif ATTOP}
|
|
|
+ ops:=2;
|
|
|
+ operands[1].opr.typ:=OPR_REGISTER;
|
|
|
+ operands[2].opr.typ:=OPR_REGISTER;
|
|
|
+ operands[1].opr.reg:=R_ST;
|
|
|
+ operands[2].opr.reg:=R_ST1;
|
|
|
+ end;
|
|
|
+ if (ops=1) and
|
|
|
+ ((operands[1].opr.typ=OPR_REGISTER) and
|
|
|
+ (operands[1].opr.reg in [R_ST1..R_ST7])) and
|
|
|
+ ((opcode=A_FSUBP) or
|
|
|
+ (opcode=A_FSUBRP) or
|
|
|
+ (opcode=A_FDIVP) or
|
|
|
+ (opcode=A_FDIVRP) or
|
|
|
+ (opcode=A_FADDP) or
|
|
|
+ (opcode=A_FMULP)) then
|
|
|
+ begin
|
|
|
+{$ifdef ATTOP}
|
|
|
+ message1(asmr_w_adding_explicit_first_arg_fXX,gas_op2str[opcode]);
|
|
|
+{$else}
|
|
|
+ {$ifdef INTELOP}
|
|
|
+ message1(asmr_w_adding_explicit_first_arg_fXX,std_op2str[opcode]);
|
|
|
+ {$else}
|
|
|
+ message1(asmr_w_adding_explicit_first_arg_fXX,'fXX');
|
|
|
+ {$endif INTELOP}
|
|
|
+{$endif ATTOP}
|
|
|
+ ops:=2;
|
|
|
+ operands[2].opr.typ:=OPR_REGISTER;
|
|
|
+ operands[2].opr.reg:=operands[1].opr.reg;
|
|
|
+ operands[1].opr.reg:=R_ST;
|
|
|
+ end;
|
|
|
+
|
|
|
+ if (ops=1) and
|
|
|
+ ((operands[1].opr.typ=OPR_REGISTER) and
|
|
|
+ (operands[1].opr.reg in [R_ST1..R_ST7])) and
|
|
|
+ ((opcode=A_FSUB) or
|
|
|
+ (opcode=A_FSUBR) or
|
|
|
+ (opcode=A_FDIV) or
|
|
|
+ (opcode=A_FDIVR) or
|
|
|
+ (opcode=A_FADD) or
|
|
|
+ (opcode=A_FMUL)) then
|
|
|
+ begin
|
|
|
+{$ifdef ATTOP}
|
|
|
+ message1(asmr_w_adding_explicit_second_arg_fXX,gas_op2str[opcode]);
|
|
|
+{$else}
|
|
|
+ {$ifdef INTELOP}
|
|
|
+ message1(asmr_w_adding_explicit_second_arg_fXX,std_op2str[opcode]);
|
|
|
+ {$else}
|
|
|
+ message1(asmr_w_adding_explicit_second_arg_fXX,'fXX');
|
|
|
+ {$endif INTELOP}
|
|
|
+{$endif ATTOP}
|
|
|
+ ops:=2;
|
|
|
+ operands[2].opr.typ:=OPR_REGISTER;
|
|
|
+ operands[2].opr.reg:=R_ST;
|
|
|
+ end;
|
|
|
+
|
|
|
+ { I tried to convince Linus Torwald to add
|
|
|
+ code to support ENTER instruction
|
|
|
+ (when raising a stack page fault)
|
|
|
+ but he replied that ENTER is a bad instruction and
|
|
|
+ Linux does not need to support it
|
|
|
+ So I think its at least a good idea to add a warning
|
|
|
+ if someone uses this in assembler code
|
|
|
+ FPC itself does not use it at all PM }
|
|
|
+ if (opcode=A_ENTER) and ((target_info.target=target_i386_linux) or
|
|
|
+ (target_info.target=target_i386_FreeBSD)) then
|
|
|
+ begin
|
|
|
+ message(asmr_w_enter_not_supported_by_linux);
|
|
|
+ end;
|
|
|
+
|
|
|
+ ai:=taicpu.op_none(opcode,siz);
|
|
|
+ ai.Ops:=Ops;
|
|
|
+ for i:=1to Ops do
|
|
|
+ begin
|
|
|
+ case operands[i].opr.typ of
|
|
|
+ OPR_CONSTANT :
|
|
|
+ ai.loadconst(i-1,aword(operands[i].opr.val));
|
|
|
+ OPR_REGISTER:
|
|
|
+ ai.loadreg(i-1,operands[i].opr.reg);
|
|
|
+ OPR_SYMBOL:
|
|
|
+ ai.loadsymbol(i-1,operands[i].opr.symbol,operands[i].opr.symofs);
|
|
|
+ OPR_REFERENCE:
|
|
|
+ begin
|
|
|
+ ai.loadref(i-1,operands[i].opr.ref);
|
|
|
+ if operands[i].size<>S_NO then
|
|
|
+ begin
|
|
|
+ asize:=0;
|
|
|
+ case operands[i].size of
|
|
|
+ S_B :
|
|
|
+ asize:=OT_BITS8;
|
|
|
+ S_W, S_IS :
|
|
|
+ asize:=OT_BITS16;
|
|
|
+ S_L, S_IL, S_FS:
|
|
|
+ asize:=OT_BITS32;
|
|
|
+ S_Q, S_D, S_FL, S_FV :
|
|
|
+ asize:=OT_BITS64;
|
|
|
+ S_FX :
|
|
|
+ asize:=OT_BITS80;
|
|
|
+ end;
|
|
|
+ if asize<>0 then
|
|
|
+ ai.oper[i-1].ot:=(ai.oper[i-1].ot and not OT_SIZE_MASK) or asize;
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+
|
|
|
+ if (opcode=A_CALL) and (opsize=S_FAR) then
|
|
|
+ opcode:=A_LCALL;
|
|
|
+ if (opcode=A_JMP) and (opsize=S_FAR) then
|
|
|
+ opcode:=A_LJMP;
|
|
|
+ if (opcode=A_LCALL) or (opcode=A_LJMP) then
|
|
|
+ opsize:=S_FAR;
|
|
|
+ { Condition ? }
|
|
|
+ if condition<>C_None then
|
|
|
+ ai.SetCondition(condition);
|
|
|
+
|
|
|
+ { Concat the opcode or give an error }
|
|
|
+ if assigned(ai) then
|
|
|
+ begin
|
|
|
+ { Check the instruction if it's valid }
|
|
|
+{$ifndef NOAG386BIN}
|
|
|
+ ai.CheckIfValid;
|
|
|
+{$endif NOAG386BIN}
|
|
|
+ p.concat(ai);
|
|
|
+ end
|
|
|
+ else
|
|
|
+ Message(asmr_e_invalid_opcode_and_operand);
|
|
|
+end;
|
|
|
+
|
|
|
+end.
|
|
|
+{
|
|
|
+ $Log$
|
|
|
+ Revision 1.1 2002-07-28 20:45:23 florian
|
|
|
+ + added direct assembler reader for PowerPC
|
|
|
+
|
|
|
+}
|
florian