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@@ -786,7 +786,9 @@ Unit rawasmtext;
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a_i32_extend16_s,
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a_i64_extend8_s,
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a_i64_extend16_s,
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- a_i64_extend32_s:
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+ a_i64_extend32_s,
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+
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+ a_atomic_fence:
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;
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{ instructions with an integer const operand }
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a_i32_const,
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@@ -858,7 +860,82 @@ Unit rawasmtext;
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a_i32_store16,
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a_i64_store8,
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a_i64_store16,
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- a_i64_store32:
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+ a_i64_store32,
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+
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+ a_memory_atomic_notify,
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+ a_memory_atomic_wait32,
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+ a_memory_atomic_wait64,
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+
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+ a_i32_atomic_load,
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+ a_i64_atomic_load,
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+ a_i32_atomic_load8_u,
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+ a_i32_atomic_load16_u,
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+ a_i64_atomic_load8_u,
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+ a_i64_atomic_load16_u,
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+ a_i64_atomic_load32_u,
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+ a_i32_atomic_store,
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+ a_i64_atomic_store,
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+ a_i32_atomic_store8,
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+ a_i32_atomic_store16,
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+ a_i64_atomic_store8,
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+ a_i64_atomic_store16,
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+ a_i64_atomic_store32,
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+
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+ a_i32_atomic_rmw_add,
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+ a_i64_atomic_rmw_add,
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+ a_i32_atomic_rmw8_add_u,
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+ a_i32_atomic_rmw16_add_u,
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+ a_i64_atomic_rmw8_add_u,
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+ a_i64_atomic_rmw16_add_u,
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+ a_i64_atomic_rmw32_add_u,
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+
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+ a_i32_atomic_rmw_sub,
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+ a_i64_atomic_rmw_sub,
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+ a_i32_atomic_rmw8_sub_u,
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+ a_i32_atomic_rmw16_sub_u,
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+ a_i64_atomic_rmw8_sub_u,
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+ a_i64_atomic_rmw16_sub_u,
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+ a_i64_atomic_rmw32_sub_u,
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+
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+ a_i32_atomic_rmw_and,
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+ a_i64_atomic_rmw_and,
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+ a_i32_atomic_rmw8_and_u,
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+ a_i32_atomic_rmw16_and_u,
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+ a_i64_atomic_rmw8_and_u,
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+ a_i64_atomic_rmw16_and_u,
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+ a_i64_atomic_rmw32_and_u,
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+
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+ a_i32_atomic_rmw_or,
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+ a_i64_atomic_rmw_or,
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+ a_i32_atomic_rmw8_or_u,
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+ a_i32_atomic_rmw16_or_u,
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+ a_i64_atomic_rmw8_or_u,
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+ a_i64_atomic_rmw16_or_u,
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+ a_i64_atomic_rmw32_or_u,
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+
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+ a_i32_atomic_rmw_xor,
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+ a_i64_atomic_rmw_xor,
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+ a_i32_atomic_rmw8_xor_u,
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+ a_i32_atomic_rmw16_xor_u,
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+ a_i64_atomic_rmw8_xor_u,
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+ a_i64_atomic_rmw16_xor_u,
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+ a_i64_atomic_rmw32_xor_u,
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+
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+ a_i32_atomic_rmw_xchg,
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+ a_i64_atomic_rmw_xchg,
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+ a_i32_atomic_rmw8_xchg_u,
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+ a_i32_atomic_rmw16_xchg_u,
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+ a_i64_atomic_rmw8_xchg_u,
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+ a_i64_atomic_rmw16_xchg_u,
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+ a_i64_atomic_rmw32_xchg_u,
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+
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+ a_i32_atomic_rmw_cmpxchg,
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+ a_i64_atomic_rmw_cmpxchg,
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+ a_i32_atomic_rmw8_cmpxchg_u,
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+ a_i32_atomic_rmw16_cmpxchg_u,
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+ a_i64_atomic_rmw8_cmpxchg_u,
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+ a_i64_atomic_rmw16_cmpxchg_u,
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+ a_i64_atomic_rmw32_cmpxchg_u:
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begin
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{ TODO: parse the optional memarg operand }
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result.ops:=1;
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