* some optimizations and associated fixes for better regvar code

compiler/ncginl.pas

@@ -415,7 +415,7 @@ implementation
                  addvalue:=addvalue*get_ordinal_value(tcallparanode(tcallparanode(left).right).left)
               else
                 begin
-                  location_force_reg(exprasmlist,tcallparanode(tcallparanode(left).right).left.location,cgsize,false);
+                  location_force_reg(exprasmlist,tcallparanode(tcallparanode(left).right).left.location,cgsize,addvalue<=1);
                   hregister:=tcallparanode(tcallparanode(left).right).left.location.register;
 {$ifndef cpu64bit}
                   hregisterhi:=tcallparanode(tcallparanode(left).right).left.location.registerhigh;
@@ -678,7 +678,10 @@ end.
 
 {
   $Log$
-  Revision 1.57  2004-05-22 23:34:28  peter
+  Revision 1.58  2004-05-30 21:18:22  jonas
+    * some optimizations and associated fixes for better regvar code
+
+  Revision 1.57  2004/05/22 23:34:28  peter
   tai_regalloc.allocation changed to ratype to notify rgobj of register size changes
 
   Revision 1.56  2004/03/02 00:36:33  olle

compiler/ncgset.pas

@@ -134,6 +134,8 @@ implementation
   procedure tcginnode.emit_bit_test_reg_reg(list : taasmoutput;
                                             bitsize: tcgsize; bitnumber,value : tregister;
                                             ressize: tcgsize; res :tregister);
+    var
+      newres: tregister;
     begin
       { first make sure that the bit number is modulo 32 }
 
@@ -141,23 +143,14 @@ implementation
       { be caught when range checking is on! (JM)                        }
       { cg.a_op_const_reg(list,OP_AND,31,bitnumber);                     }
 
-      if bitsize<>ressize then
-        begin
-          { FIX ME! We're not allowed to modify the value register here! }
-
-          { shift value register "bitnumber" bits to the right }
-          cg.a_op_reg_reg(list,OP_SHR,bitsize,bitnumber,value);
-          { extract the bit we want }
-          cg.a_op_const_reg(list,OP_AND,bitsize,1,value);
-          cg.a_load_reg_reg(list,bitsize,ressize,value,res);
-        end
-      else
-        begin
-          { rotate value register "bitnumber" bits to the right }
-          cg.a_op_reg_reg_reg(list,OP_SHR,OS_32,bitnumber,value,res);
-          { extract the bit we want }
-          cg.a_op_const_reg(list,OP_AND,OS_32,1,res);
-        end;
+      if (bitsize <> OS_32) then
+        internalerror(2004053010);
+      newres := cg.makeregsize(list,res,OS_32);
+      { rotate value register "bitnumber" bits to the right }
+      cg.a_op_reg_reg_reg(list,OP_SHR,OS_32,bitnumber,value,newres);
+      { extract the bit we want }
+      cg.a_op_const_reg(list,OP_AND,OS_32,1,newres);
+      cg.a_load_reg_reg(list,OS_32,ressize,newres,res);
     end;
 
 
@@ -375,7 +368,7 @@ implementation
                {****************************  SMALL SET **********************}
                if left.nodetype=ordconstn then
                 begin
-                  location_force_reg(exprasmlist,right.location,OS_32,true);
+                  location_force_reg(exprasmlist,right.location,OS_32,false);
                   { first SHR the register }
                   cg.a_op_const_reg(exprasmlist,OP_SHR,OS_32,tordconstnode(left).value and 31,right.location.register);
                   { then extract the lowest bit }
@@ -390,7 +383,7 @@ implementation
                   { allocate a register for the result }
                   location.register:=cg.getintregister(exprasmlist,location.size);
                   { emit bit test operation }
-                  emit_bit_test_reg_reg(exprasmlist,right.location.size,left.location.register,
+                  emit_bit_test_reg_reg(exprasmlist,left.location.size,left.location.register,
                       right.location.register,location.size,location.register);
                 end;
                location_release(exprasmlist,left.location);
@@ -991,7 +984,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.60  2004-02-27 10:21:05  florian
+  Revision 1.61  2004-05-30 21:18:22  jonas
+    * some optimizations and associated fixes for better regvar code
+
+  Revision 1.60  2004/02/27 10:21:05  florian
     * top_symbol killed
     + refaddr to treference added
     + refsymbol to treference added

compiler/ncgutil.pas

@@ -444,9 +444,19 @@ implementation
            {Do not bother to recycle the existing register. The register
             allocator eliminates unnecessary moves, so it's not needed
             and trying to recycle registers can cause problems because
-            the registers changes size and may need aditional constraints.}
-           location_release(list,l);
-           hregister:=cg.getintregister(list,dst_size);
+            the registers changes size and may need aditional constraints.
+            
+            Not if it's about LOC_CREGISTER's (JM)
+            }
+           if (l.loc <> LOC_CREGISTER) or
+              (l.size <> dst_size) or
+              not(maybeconst) then
+             begin
+               location_release(list,l);
+               hregister:=cg.getintregister(list,dst_size)
+             end
+           else
+             hregister :=l.register;
            { load value in new register }
            case l.loc of
              LOC_FLAGS :
@@ -489,6 +499,7 @@ implementation
                end;
            end;
            if (l.loc <> LOC_CREGISTER) or
+              (l.size <> dst_size) or
               not maybeconst then
              location_reset(l,LOC_REGISTER,dst_size)
            else
@@ -2134,7 +2145,10 @@ implementation
 end.
 {
   $Log$
-  Revision 1.203  2004-05-28 21:14:13  peter
+  Revision 1.204  2004-05-30 21:18:22  jonas
+    * some optimizations and associated fixes for better regvar code
+
+  Revision 1.203  2004/05/28 21:14:13  peter
     * first load para's to temps before calling entry code (profile
 
   Revision 1.202  2004/05/23 15:23:30  peter