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+ base units for llvm:
o opcodes + string representation
o llvm string representations of targets supported by fpc
o supported fpc optimisations
o list of supported LLVM versions (currently only targeting 3.3)

git-svn-id: branches/hlcgllvm@26035 -

Jonas Maebe 11 gadi atpakaļ
vecāks
revīzija
44b1996158
4 mainītis faili ar 314 papildinājumiem un 0 dzēšanām
  1. 3 0
      .gitattributes
  2. 86 0
      compiler/llvm/itllvm.pas
  3. 173 0
      compiler/llvm/llvmbase.pas
  4. 52 0
      compiler/llvm/llvminfo.pas

+ 3 - 0
.gitattributes

@@ -314,6 +314,9 @@ compiler/jvm/rjvmsup.inc svneol=native#text/plain
 compiler/jvm/tgcpu.pas svneol=native#text/plain
 compiler/ldscript.pas svneol=native#text/plain
 compiler/link.pas svneol=native#text/plain
+compiler/llvm/itllvm.pas svneol=native#text/plain
+compiler/llvm/llvmbase.pas svneol=native#text/plain
+compiler/llvm/llvminfo.pas svneol=native#text/plain
 compiler/llvm/tgllvm.pas svneol=native#text/plain
 compiler/m68k/aasmcpu.pas svneol=native#text/plain
 compiler/m68k/ag68kgas.pas svneol=native#text/plain

+ 86 - 0
compiler/llvm/itllvm.pas

@@ -0,0 +1,86 @@
+{
+    Copyright (c) 2013 by Jonas Maebe
+
+    This unit contains the LLVM instruction tables
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+unit itllvm;
+
+{$i fpcdefs.inc}
+
+interface
+
+    uses
+      llvmbase, cgbase;
+
+    const
+      llvm_op2str : llvmop2strtable = ('',
+        { terminator instructions }
+        'ret', 'br', 'switch', 'indirectbr',
+        'invoke', 'resume',
+        'unreachable',
+        { binary operations }
+        'add', 'fadd', 'sub', 'fsub', 'mul', 'fmul',
+        'udiv','sdiv', 'fdiv', 'urem', 'srem', 'frem',
+        { bitwise binary operations }
+        'shl', 'lshr', 'ashr', 'and', 'or', 'xor',
+        { vector operations }
+        'extractelement', 'insertelement', 'shufflevector',
+        { aggregate operations }
+        'extractvalue', 'insertvalue',
+        { memory access and memory addressing operations }
+        'alloca',
+        'load', 'store',
+        'fence', 'cmpxchg', 'atomicrmw',
+        'getelementptr',
+        { conversion operations }
+        'trunc', 'zext', 'sext', 'fptrunc', 'fpext',
+        'fptoui', 'fptosi', 'uitofp', 'sitofp',
+        'ptrtoint', 'inttoptr',
+        'bitcast',
+        { other operations }
+        'icmp', 'fcmp',
+        'phi', 'select', 'call',
+        'va_arg', 'landingpad',
+        { fpc pseudo opcodes }
+        'type' { type definition }
+      );
+
+      llvm_cond2str : array[topcmp] of ansistring = ('',
+        'eq',
+        'sgt',
+        'slt',
+        'sge',
+        'sle',
+        'ne',
+        'ule',
+        'ul',
+        'uge',
+        'ug'
+      );
+
+      llvm_fpcond2str: array[tllvmfpcmp] of ansistring = (
+      'false',
+      'oeq', 'ogt', 'oge', 'olt', 'ole', 'one', 'ord',
+      'ueq', 'ugt', 'uge', 'ult', 'ule', 'une', 'uno',
+      'true');
+
+
+implementation
+
+end.

+ 173 - 0
compiler/llvm/llvmbase.pas

@@ -0,0 +1,173 @@
+{
+    Copyright (c) 2007-2008, 2013 by Jonas Maebe
+
+    Contains the base types for LLVM
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+{ This Unit contains the base types for LLVM
+}
+unit llvmbase;
+
+{$i fpcdefs.inc}
+
+interface
+
+  uses
+    strings,globtype,
+    cutils,cclasses,aasmbase,cpubase,cpuinfo,cgbase;
+
+
+{*****************************************************************************
+                                Assembler Opcodes
+*****************************************************************************}
+
+  type
+    tllvmop = (la_none,
+      { terminator instructions }
+      la_ret, la_br, la_switch, la_indirectbr,
+      la_invoke, la_resume,
+      la_unreachable,
+      { binary operations }
+      la_add, la_fadd, la_sub, la_fsub, la_mul, la_fmul,
+      la_udiv,la_sdiv, la_fdiv, la_urem, la_srem, la_frem,
+      { bitwise binary operations }
+      la_shl, la_lshr, la_ashr, la_and, la_or, la_xor,
+      { vector operations }
+      la_extractelement, la_insertelement, la_shufflevector,
+      { aggregate operations }
+      la_extractvalue, la_insertvalue,
+      { memory access and memory addressing operations }
+      la_alloca,
+      la_load, la_store,
+      la_fence, la_cmpxchg, la_atomicrmw,
+      la_getelementptr,
+      { conversion operations }
+      la_trunc, la_zext, la_sext, la_fptrunc, la_fpext,
+      la_fptoui, la_fptosi, la_uitofp, la_sitofp,
+      la_ptrtoint, la_inttoptr,
+      la_bitcast,
+      { other operations }
+      la_icmp, la_fcmp,
+      la_phi, la_select, la_call,
+      la_va_arg, la_landingpad,
+      { fpc pseudo opcodes }
+      la_type { type definition }
+    );
+
+  type
+    tllvmfpcmp = (
+      lfc_false,
+      lfc_oeq, lfc_ogt, lfc_oge, lfc_olt, lfc_ole, lfc_one, lfc_ord,
+      lfc_ueq, lfc_ugt, lfc_uge, lfc_ult, lfc_ule, lfc_une, lfc_uno,
+      lfc_true);
+
+    {# This should define the array of instructions as string }
+    llvmop2strtable=array[tllvmop] of string[14];
+
+  const
+    { = max(cpubase.max_operands,7) }
+    max_operands = ((-ord(cpubase.max_operands<=7)) and 7) or ((-ord(cpubase.max_operands>7)) and cpubase.max_operands);
+
+  function llvm_target_name: ansistring;
+
+implementation
+
+  uses
+    globals,
+    systems;
+
+{$j-}
+  const
+    llvmsystemcpu: array[tsystemcpu] of ansistring =
+      ('unknown',
+       'x86',
+       'm68k',
+       'alpha',
+       'ppc',
+       'sparc',
+       'unknown',
+       'ia64',
+       'x86_64',
+       'mips',
+       'arm',
+       'ppc64',
+       'avr',
+       'mipsel',
+       'unknown',
+       'unknown'
+      );
+
+  function llvm_target_name: ansistring;
+    begin
+      { architecture }
+{$ifdef arm}
+      llvm_target_name:=lower(cputypestr[current_settings.cputype]);
+{$else arm}
+      llvm_target_name:=llvmsystemcpu[target_info.cpu];
+{$endif}
+      { vendor and/or OS }
+      if target_info.system in systems_darwin then
+        begin
+          llvm_target_name:=llvm_target_name+'-apple';
+          if not(target_info.system in [system_arm_darwin,system_i386_iphonesim]) then
+            llvm_target_name:=llvm_target_name+'-macosx'+MacOSXVersionMin
+          else
+            llvm_target_name:=llvm_target_name+'-ios'+iPhoneOSVersionMin;
+        end
+      else if target_info.system in (systems_linux+systems_android) then
+        llvm_target_name:=llvm_target_name+'-linux'
+      else if target_info.system in systems_windows then
+        begin
+          { WinCE isn't supported (yet) by llvm, but if/when added this is
+            presumably how they will differentiate it }
+          if not(target_info.system in [system_i386_wince,system_arm_wince]) then
+            llvm_target_name:=llvm_target_name+'-pc';
+          llvm_target_name:=llvm_target_name+'-win32'
+        end
+      else if target_info.system in systems_freebsd then
+        llvm_target_name:=llvm_target_name+'-freebsd'
+      else if target_info.system in systems_openbsd then
+        llvm_target_name:=llvm_target_name+'-openbsd'
+      else if target_info.system in systems_netbsd then
+        llvm_target_name:=llvm_target_name+'-netbsd'
+      else if target_info.system in systems_aix then
+        llvm_target_name:=llvm_target_name+'-ibm-aix'
+      else if target_info.system in [system_i386_haiku] then
+        llvm_target_name:=llvm_target_name+'-haiku'
+      else if target_info.system in systems_embedded then
+        llvm_target_name:=llvm_target_name+'-none'
+      else
+        llvm_target_name:=llvm_target_name+'-unknown';
+
+      { environment/ABI }
+      if target_info.system in systems_android then
+        llvm_target_name:=llvm_target_name+'-android';
+{$if defined(FPC_ARMHF)}
+      llvm_target_name:=llvm_target_name+'-gnueabihf';
+{$elseif defined(FPC_ARMEL)}
+      if target_info.system in systems_embedded then
+        llvm_target_name:=llvm_target_name+'-eabi'
+      else if target_info.system=system_arm_android then
+        { handled above already
+        llvm_target_name:=llvm_target_name+'-android' }
+      else
+        llvm_target_name:=llvm_target_name+'-gnueabi';
+{$endif FPC_ARM_HF}
+    end;
+
+end.

+ 52 - 0
compiler/llvm/llvminfo.pas

@@ -0,0 +1,52 @@
+{
+    Copyright (c) 2010, 2013 by Jonas Maebe
+
+    Basic Processor information for LLVM
+
+    See the file COPYING.FPC, included in this distribution,
+    for details about the copyright.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+
+ **********************************************************************}
+
+Unit llvminfo;
+
+Interface
+
+  uses
+    globtype, cpubase;
+
+Type
+   { possible supported processors for this target }
+   tllvmcputype =
+      (llvmcpu_none,
+       { may add older/newer versions if required/appropriate }
+       llvmcpu_33
+      );
+
+
+Const
+
+   llvmcputypestr : array[tllvmcputype] of string[9] = ('',
+     'LLVM-3.3'
+   );
+
+   { Supported optimizations, only used for information }
+   supported_optimizerswitches = genericlevel1optimizerswitches+
+                                 genericlevel2optimizerswitches+
+                                 genericlevel3optimizerswitches-
+                                 { no need to write info about those }
+                                 [cs_opt_level1,cs_opt_level2,cs_opt_level3]+
+                                 [cs_opt_loopunroll,cs_opt_nodecse];
+
+   level1optimizerswitches = genericlevel1optimizerswitches;
+   level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches + [cs_opt_nodecse];
+   level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches + [{,cs_opt_loopunroll}];
+   level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [];
+
+Implementation
+
+end.