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* unlike other architectures, llvm requires that both operands of shl/shr are
of the same size -> ensure that this is the case for the shifts in
a_bit_test/set_reg_reg_reg() (fixes tests/tbs/tb0219.pp for llvm)

git-svn-id: trunk@34123 -

Jonas Maebe 9 years ago
parent
commit
458ba2efac
1 changed files with 37 additions and 0 deletions
  1. 37 0
      compiler/llvm/hlcgllvm.pas

+ 37 - 0
compiler/llvm/hlcgllvm.pas

@@ -51,6 +51,9 @@ uses
       procedure alloccpuregisters(list: TAsmList; rt: Tregistertype; const r: Tcpuregisterset); override;
       procedure deallocallcpuregisters(list: TAsmList); override;
 
+      procedure a_bit_test_reg_reg_reg(list: TAsmList; bitnumbersize, valuesize, destsize: tdef; bitnumber, value, destreg: tregister); override;
+      procedure a_bit_set_reg_reg(list: TAsmList; doset: boolean; bitnumbersize, destsize: tdef; bitnumber, dest: tregister); override;
+
      protected
       procedure a_call_common(list: TAsmList; pd: tabstractprocdef; const paras: array of pcgpara; const forceresdef: tdef; out res: tregister; out hlretdef: tdef; out llvmretdef: tdef; out callparas: tfplist);
      public
@@ -347,6 +350,40 @@ implementation
     end;
 
 
+  procedure thlcgllvm.a_bit_test_reg_reg_reg(list: TAsmList; bitnumbersize, valuesize, destsize: tdef; bitnumber, value, destreg: tregister);
+    var
+      tmpbitnumberreg: tregister;
+    begin
+      { unlike other architectures, llvm requires the bitnumber register to
+        have the same size as the shifted register }
+      if bitnumbersize.size<>valuesize.size then
+        begin
+          tmpbitnumberreg:=hlcg.getintregister(list,valuesize);
+          a_load_reg_reg(list,bitnumbersize,valuesize,bitnumber,tmpbitnumberreg);
+          bitnumbersize:=valuesize;
+          bitnumber:=tmpbitnumberreg;
+        end;
+      inherited;
+    end;
+
+
+  procedure thlcgllvm.a_bit_set_reg_reg(list: TAsmList; doset: boolean; bitnumbersize, destsize: tdef; bitnumber, dest: tregister);
+    var
+      tmpbitnumberreg: tregister;
+    begin
+      { unlike other architectures, llvm requires the bitnumber register to
+        have the same size as the shifted register }
+      if bitnumbersize.size<>destsize.size then
+        begin
+          tmpbitnumberreg:=hlcg.getintregister(list,destsize);
+          a_load_reg_reg(list,bitnumbersize,destsize,bitnumber,tmpbitnumberreg);
+          bitnumbersize:=destsize;
+          bitnumber:=tmpbitnumberreg;
+        end;
+      inherited;
+    end;
+
+
   function get_call_pd(pd: tabstractprocdef): tdef;
     begin
       if (pd.typ=procdef) or