* patch by Nico Erfurth: Support the usage of BIC instead of AND on ARM

BIC clears the specified bits, while AND keeps them. The usage of BIC
allows a broader range of shifterconsts to be used on the ARM cpu, often
saving a cycle.

Previously code like:
Data:=Data and $FFFFFF00

would result in

mvn r1, #255
and r0, r0, r1

This patch changes this to

bic r0, r0, #255

git-svn-id: trunk@21510 -

compiler/arm/cgcpu.pas

@@ -783,7 +783,10 @@ unit cgcpu;
                 so.shiftimm:=l1;
                 list.concat(taicpu.op_reg_reg_reg_shifterop(A_RSB,dst,src,src,so));
               end
-
+            { BIC clears the specified bits, while AND keeps them, using BIC allows to use a
+              broader range of shifterconstants.}
+            else if (op = OP_AND) and is_shifter_const(not(dword(a)),shift) then
+              list.concat(taicpu.op_reg_reg_const(A_BIC,dst,src,not(dword(a))))
             else
               begin
                 tmpreg:=getintregister(list,size);