* Replaced all user defined warnings by TODO comments to reduce compiler noise.

git-svn-id: trunk@11443 -

compiler/aggas.pas

@@ -249,7 +249,7 @@ implementation
 { not relocated properly on e.g. linux/ppc64. g++ generates there for a   }
 { vtable for a class called Window:                                       }
 { .section .data.rel.ro._ZTV6Window,"awG",@progbits,_ZTV6Window,comdat    }
-{$warning TODO .data.ro not yet working}
+{ TODO: .data.ro not yet working}
 {$if defined(arm) or defined(powerpc)}
           '.rodata',
 {$else arm}

compiler/aoptobj.pas

@@ -1040,7 +1040,7 @@ Unit AoptObj;
                       if GetNextInstruction(p, hp1) then
                         begin
                           if FindLabel(tasmlabel(taicpu(p).oper[0]^.ref^.symbol), hp1) and
-        {$warning FIXME removing the first instruction fails}
+        { TODO: FIXME removing the first instruction fails}
                               (p<>blockstart) then
                             begin
                               hp2:=tai(hp1.next);

compiler/arm/cpubase.pas

@@ -89,7 +89,7 @@ unit cpubase;
       first_mm_supreg    = RS_S0;
       first_mm_imreg     = $20;
 
-{$warning TODO Calculate bsstart}
+{ TODO: Calculate bsstart}
       regnumber_count_bsstart = 64;
 
       regnumber_table : array[tregisterindex] of tregister = (

compiler/avr/cpubase.pas

@@ -102,7 +102,7 @@ unit cpubase;
       first_mm_supreg    = RS_INVALID;
       first_mm_imreg     = RS_INVALID;
 
-{$warning TODO Calculate bsstart}
+{ TODO: Calculate bsstart}
       regnumber_count_bsstart = 64;
 
       regnumber_table : array[tregisterindex] of tregister = (

compiler/cfidwarf.pas

@@ -395,7 +395,7 @@ implementation
     procedure TDwarfAsmCFI.cfa_offset(list:TAsmList;reg:tregister;ofs:longint);
       begin
         cfa_advance_loc(list);
-{$warning TODO check if ref is a temp}
+{ TODO: check if ref is a temp}
         { offset must be positive }
         DwarfList.concat(tdwarfitem.create_reg_const(DW_CFA_offset_extended,doe_uleb,reg,doe_uleb,ofs div data_alignment_factor));
       end;

compiler/dbgdwarf.pas

@@ -1758,7 +1758,7 @@ implementation
                   begin
                     if (vo_is_thread_var in sym.varoptions) then
                       begin
-{$warning !!! FIXME: dwarf for thread vars !!!}
+{ TODO: !!! FIXME: dwarf for thread vars !!!}
                         blocksize:=0;
                       end
                     else

compiler/dbgstabs.pas

@@ -963,7 +963,7 @@ implementation
           begin
             if tabstractnormalvarsym(def.funcretsym).localloc.loc=LOC_REFERENCE then
               begin
-{$warning Need to add gdb support for ret in param register calling}
+{ TODO: Need to add gdb support for ret in param register calling}
                 if paramanager.ret_in_param(def.returndef,def.proccalloption) then
                   hs:='X*'
                 else

compiler/fppu.pas

@@ -982,7 +982,7 @@ uses
              ibloadunit :
                readloadunit;
              ibasmsymbols :
-{$warning TODO Remove ibasmsymbols}
+{ TODO: Remove ibasmsymbols}
                ;
              ibendimplementation :
                break;

compiler/htypechk.pas

@@ -2226,7 +2226,7 @@ implementation
            tve_shortint,tve_smallint,tve_longint,tve_chari64,
            tve_boolformal,tve_boolformal,tve_boolformal,tve_boolformal,tve_boolformal,
            tve_chari64,tve_chari64,tve_dblcurrency);
-{$warning fixme for 128 bit floats }
+{ TODO: fixme for 128 bit floats }
         variantfloatdef_cl: array[tfloattype] of tvariantequaltype =
           (tve_single,tve_dblcurrency,tve_extended,
            tve_dblcurrency,tve_dblcurrency,tve_extended);

compiler/i386/popt386.pas

@@ -627,7 +627,7 @@ begin
                 if GetNextInstruction(p, hp1) then
                   begin
                     if FindLabel(tasmlabel(taicpu(p).oper[0]^.ref^.symbol), hp1) and
-  {$warning FIXME removing the first instruction fails}
+  { TODO: FIXME removing the first instruction fails}
                         (p<>blockstart) then
                       begin
                         hp2:=tai(hp1.next);

compiler/link.pas

@@ -866,7 +866,7 @@ Implementation
       var
         objreader : TObjectReader;
       begin
-{$warning TODO Cleanup ignoring of   FPC generated libimp*.a files}
+{ TODO: Cleanup ignoring of   FPC generated libimp*.a files}
         { Don't load import libraries }
         if copy(ExtractFileName(para),1,6)='libimp' then
           exit;
@@ -1027,7 +1027,7 @@ Implementation
         Message1(exec_i_linking,outputname);
         FlushOutput;
 
-{$warning TODO Load custom linker script}
+{ TODO: Load custom linker script}
         DefaultLinkScript;
 
         exeoutput:=CExeOutput.Create;
@@ -1084,7 +1084,7 @@ Implementation
             exeoutput.WriteExeFile(outputname);
           end;
 
-{$warning TODO fixed section names}
+{ TODO: fixed section names}
         status.codesize:=exeoutput.findexesection('.text').size;
         status.datasize:=exeoutput.findexesection('.data').size;
         bsssec:=exeoutput.findexesection('.bss');

compiler/m68k/aasmcpu.pas

@@ -107,7 +107,7 @@ type
       globtype;
 
 
-{$WARNING FIX ME!! useful for debug, remove it, same table as in ag68kgas }
+{ TODO: FIX ME!! useful for debug, remove it, same table as in ag68kgas }
     const
       gas_op2str:op2strtable=
     {  warning: CPU32 opcodes are not fully compatible with the MC68020. }
@@ -526,7 +526,7 @@ type
           A_NEG, A_EXT, A_EXTB, A_NOT:
             result:=operand_readwrite;
           else begin
-{$WARNING FIX ME!!! remove ugly debug code ... }
+{ TODO: FIX ME!!! remove ugly debug code ... }
             writeln('M68K: unknown opcode when spilling: ',gas_op2str[opcode]);
             internalerror(200404091);
           end;

compiler/m68k/cgcpu.pas

@@ -243,7 +243,7 @@ unit cgcpu;
 //        writeln('a_param_reg');
 {$endif DEBUG_CHARLIE}
         { it's probably necessary to port this from x86 later, or provide an m68k solution (KB) }
-{$WARNING FIX ME! check_register_size()}
+{ TODO: FIX ME! check_register_size()}
         // check_register_size(size,r);
         if use_push(cgpara) then
           begin
@@ -298,7 +298,7 @@ unit cgcpu;
         begin
           if not assigned(paraloc) then
             exit;
-{$WARNING FIX ME!!! this also triggers location bug }
+{ TODO: FIX ME!!! this also triggers location bug }
           {if (paraloc^.loc<>LOC_REFERENCE) or
              (paraloc^.reference.index<>NR_STACK_POINTER_REG) or
              (tcgsize2size[paraloc^.size]>sizeof(aint)) then
@@ -569,7 +569,7 @@ unit cgcpu;
        href : treference;
 //       p: pointer;
       begin
-         {$WARNING FIX ME!!! take a look on this mess again...}
+         { TODO: FIX ME!!! take a look on this mess again...}
 //        if getregtype(r)=R_ADDRESSREGISTER then
 //          begin
 //            writeln('address reg?!?');
@@ -1369,7 +1369,7 @@ unit cgcpu;
               begin
                 { only 68020+ supports RTD, so this needs another code path
                   for 68000 and Coldfire (KB) }
-{$WARNING 68020+ only code generation, without fallback}
+{ TODO: 68020+ only code generation, without fallback}
                 list.concat(taicpu.op_const(A_RTD,S_NO,parasize));
               end
             else

compiler/m68k/cpubase.pas

@@ -129,7 +129,7 @@ unit cpubase;
 
       maxfpuregs = 8;
 
-{$WARNING TODO FIX BSSTART}
+{ TODO: FIX BSSTART}
       regnumber_count_bsstart = 16;
 
       regnumber_table : array[tregisterindex] of tregister = (
@@ -141,7 +141,7 @@ unit cpubase;
       );
 
       regdwarf_table : array[tregisterindex] of shortint = (
-{$warning TODO reused stabs values!}
+{ TODO: reused stabs values!}
         {$i r68ksta.inc}
       );
 
@@ -253,7 +253,7 @@ unit cpubase;
       NR_STACK_POINTER_REG = NR_SP;
       RS_STACK_POINTER_REG = RS_SP;
       {# Frame pointer register }
-{$warning FIX ME!!! frame pointer is A5 on Amiga, but A6 on unixes?}
+{ TODO: FIX ME!!! frame pointer is A5 on Amiga, but A6 on unixes?}
       NR_FRAME_POINTER_REG = NR_A5;
       RS_FRAME_POINTER_REG = RS_A5;
 
@@ -261,10 +261,10 @@ unit cpubase;
          such as in PIC code. The exact meaning is ABI specific. For
          further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
       }
-{$warning FIX ME!!! pic offset reg conflicts with frame pointer?}
+{ TODO: FIX ME!!! pic offset reg conflicts with frame pointer?}
       NR_PIC_OFFSET_REG = NR_A5;
       { Return address for DWARF }
-{$warning TODO just a guess!}
+{ TODO: just a guess!}
       NR_RETURN_ADDRESS_REG = NR_A0;
       { Results are returned in this register (32-bit values) }
       NR_FUNCTION_RETURN_REG = NR_D0;
@@ -412,7 +412,7 @@ implementation
       begin
         case s of
           OS_NO: begin
-{$WARNING FIX ME!!! results in bad code generation}
+{ TODO: FIX ME!!! results in bad code generation}
             cgsize2subreg:=R_SUBWHOLE;
             end;
 
@@ -495,7 +495,7 @@ implementation
     function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
       const
         inverse:array[TAsmCond] of TAsmCond=(C_None,
-{$warning TODO, this is just a copy!}
+{ TODO: TODO, this is just a copy!}
            C_CC,C_LS,C_CS,C_LT,C_EQ,C_MI,C_F,C_NE,
            C_GE,C_PL,C_GT,C_T,C_HI,C_VC,C_LE,C_VS
         );

compiler/m68k/cpupara.pas

@@ -144,7 +144,7 @@ unit cpupara;
       end;
 
 
-{$warning copied from ppc cg, needs work}
+{ TODO: copied from ppc cg, needs work}
     function tm68kparamanager.push_addr_param(varspez:tvarspez;def : tdef;calloption : tproccalloption) : boolean;
       begin
         result:=false;

compiler/m68k/n68kcnv.pas

@@ -163,7 +163,7 @@ implementation
       begin
          secondpass(left);
 
-{$warning needs LOC_JUMP support, because called for bool_to_bool from ncgcnv }
+{ TODO: needs LOC_JUMP support, because called for bool_to_bool from ncgcnv }
 
          { Explicit typecasts from any ordinal type to a boolean type }
          { must not change the ordinal value                          }

compiler/m68k/n68kmat.pas

@@ -260,7 +260,7 @@ implementation
       end;
 
 
-{$WARNING FIX ME!!! shlshrnode needs review}
+{ TODO: FIX ME!!! shlshrnode needs review}
     procedure tm68kshlshrnode.pass_generate_code;
       var
         hregister,resultreg,hregister1,

compiler/mips/cpubase.pas

@@ -105,7 +105,7 @@ unit cpubase;
       first_mm_supreg    = RS_NO;
       first_mm_imreg     = RS_NO;
 
-{$warning TODO Calculate bsstart}
+{ TODO: Calculate bsstart}
       regnumber_count_bsstart = 64;
 
       regnumber_table : array[tregisterindex] of tregister = (

compiler/nadd.pas

@@ -1439,7 +1439,7 @@ implementation
                     strtype:= st_longstring
                 else
                   begin
-                    {$warning todo: add a warning/hint here if one converting a too large array}
+                    { TODO: todo: add a warning/hint here if one converting a too large array}
                     { nodes is PChar, array [with size > 255] or OpenArrayOfChar.
                       Note: Delphi halts with error if "array [0..xx] of char"
                            is assigned to ShortString and string length is less

compiler/nbas.pas

@@ -616,7 +616,7 @@ implementation
         hp : tai;
       begin
         inherited ppuwrite(ppufile);
-{$warning FIXME Add saving of register sets}
+{ TODO: FIXME Add saving of register sets}
         if not(nf_get_asm_position in flags) then
           begin
             hp:=tai(p_asm.first);

compiler/ncal.pas

@@ -975,7 +975,7 @@ implementation
         funcretnode:=ppuloadnode(ppufile);
         inherited ppuload(t,ppufile);
         ppufile.getderef(symtableprocentryderef);
-{$warning FIXME: No withsymtable support}
+{ TODO: FIXME: No withsymtable support}
         symtableproc:=nil;
         ppufile.getderef(procdefinitionderef);
         ppufile.getsmallset(callnodeflags);

compiler/ncgld.pas

@@ -711,7 +711,7 @@ implementation
                           end
                         else
                           begin
-{$warning HACK: unaligned test, maybe remove all unaligned locations (array of char) from the compiler}
+{ TODO: HACK: unaligned test, maybe remove all unaligned locations (array of char) from the compiler}
                             { Use unaligned copy when the offset is not aligned }
                             len:=left.resultdef.size;
                             if (right.location.reference.offset mod sizeof(aint)<>0) or

compiler/ncnv.pas

@@ -2600,7 +2600,7 @@ implementation
         { equal sets for the code generator? }
         else if (left.resultdef.size=resultdef.size) and
                 (tsetdef(left.resultdef).setbase=tsetdef(resultdef).setbase) then
-          {$warning This causes wrong (but Delphi-compatible) results for disjoint subsets}
+          { TODO: This causes wrong (but Delphi-compatible) results for disjoint subsets}
           { e.g., this prints true because of this:
               var
                 sa: set of 1..2;

compiler/ogbase.pas

@@ -851,9 +851,9 @@ implementation
         secoptions : array[TAsmSectiontype] of TObjSectionOptions = ([],
           {code} [oso_Data,oso_load,oso_readonly,oso_executable,oso_keep],
           {Data} [oso_Data,oso_load,oso_write,oso_keep],
-{$warning TODO Fix sec_rodata be read-only-with-relocs}
+{ TODO: Fix sec_rodata be read-only-with-relocs}
           {roData} [oso_Data,oso_load,oso_write,oso_keep],
-{$warning TODO Fix sec_rodata_norel be read-only/constant}
+{ TODO: Fix sec_rodata_norel be read-only/constant}
           {roData_norel} [oso_Data,oso_load,oso_write,oso_keep],
           {bss} [oso_load,oso_write,oso_keep],
           {threadvar} [oso_load,oso_write],
@@ -2483,7 +2483,7 @@ implementation
               begin
                 objsec:=TObjSection(ObjData.ObjSectionList[j]);
                 objsec.Used:=false;
-{$warning TODO remove debug section always keep}
+{ TODO: remove debug section always keep}
                 if oso_debug in objsec.secoptions then
                   objsec.Used:=true;
                 if (oso_keep in objsec.secoptions) then

compiler/ogcoff.pas

@@ -1836,7 +1836,7 @@ const pemagic : array[0..3] of byte = (
                      include(secoptions,oso_keep);
                    if (Copy(secname,1,6)='.idata') then
                      begin
-  {$warning TODO idata keep can maybe replaced with grouping of text and idata}
+  { TODO: idata keep can maybe replaced with grouping of text and idata}
                        include(secoptions,oso_keep);
                        secname:=secname + '.' + ExtractFileName(InputFileName);
                      end;

compiler/options.pas

@@ -1797,7 +1797,7 @@ begin
         inc(pc);
      { create argument }
        arglen:=pc-argstart;
-{$warning FIXME: silent truncation of environment parameters }
+{ TODO: FIXME: silent truncation of environment parameters }
        if (arglen > 255) then
          arglen := 255;
        setlength(hs,arglen);

compiler/powerpc/cgcpu.pas

@@ -168,7 +168,7 @@ const
              RS_F10,RS_F11,RS_F12,RS_F13,RS_F31,RS_F30,RS_F29,RS_F28,RS_F27,
              RS_F26,RS_F25,RS_F24,RS_F23,RS_F22,RS_F21,RS_F20,RS_F19,RS_F18,
              RS_F17,RS_F16,RS_F15,RS_F14],first_fpu_imreg,[]);
-        {$warning FIX ME}
+        { TODO: FIX ME}
         rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBNONE,
             [RS_M0,RS_M1,RS_M2],first_mm_imreg,[]);
       end;
@@ -973,7 +973,7 @@ const
                { with RS_R30 it's also already smaller, but too big a speed trade-off to make }
                 (firstregint <= RS_R29)) then
               begin
-                {$warning TODO: 64 bit support }
+                { TODO: TODO: 64 bit support }
                 dec(href.offset,(RS_R31-firstregint)*sizeof(pint));
                 list.concat(taicpu.op_reg_ref(A_STMW,newreg(R_INTREGISTER,firstregint,R_SUBNONE),href));
               end
@@ -1089,7 +1089,7 @@ const
                 { with RS_R30 it's also already smaller, but too big a speed trade-off to make }
                 (firstregint <= RS_R29)) then
               begin
-                {$warning TODO: 64 bit support }
+                { TODO: TODO: 64 bit support }
                 dec(href.offset,(RS_R31-firstregint)*sizeof(pint));
                 list.concat(taicpu.op_reg_ref(A_LMW,newreg(R_INTREGISTER,firstregint,R_SUBNONE),href));
               end

compiler/powerpc/cpubase.pas

@@ -127,7 +127,7 @@ uses
       { MM Super register first and last }
       first_mm_imreg     = $20;
 
-{$warning TODO Calculate bsstart}
+{ TODO: Calculate bsstart}
       regnumber_count_bsstart = 64;
 
       regnumber_table : array[tregisterindex] of tregister = (
@@ -305,7 +305,7 @@ uses
 
          Taken from GCC rs6000.h
       }
-{$warning As indicated in rs6000.h, but can't find it anywhere else!}
+{ TODO: As indicated in rs6000.h, but can't find it anywhere else!}
       NR_PIC_OFFSET_REG = NR_R30;
       { Return address of a function }
       NR_RETURN_ADDRESS_REG = NR_R0;

compiler/powerpc64/cgcpu.pas

@@ -379,7 +379,7 @@ begin
      RS_F10, RS_F11, RS_F12, RS_F13, RS_F31, RS_F30, RS_F29, RS_F28, RS_F27,
      RS_F26, RS_F25, RS_F24, RS_F23, RS_F22, RS_F21, RS_F20, RS_F19, RS_F18,
      RS_F17, RS_F16, RS_F15, RS_F14], first_fpu_imreg, []);
-{$WARNING FIX ME}
+{ TODO: FIX ME}
   rg[R_MMREGISTER] := trgcpu.create(R_MMREGISTER, R_SUBNONE,
     [RS_M0, RS_M1, RS_M2], first_mm_imreg, []);
 end;

compiler/powerpc64/cpubase.pas

@@ -146,7 +146,7 @@ const
   { MM Super register first and last }
   first_mm_imreg = $20;
 
-{$WARNING TODO Calculate bsstart}
+{ TODO: Calculate bsstart}
   regnumber_count_bsstart = 64;
 
   regnumber_table: array[tregisterindex] of tregister = (
@@ -317,7 +317,7 @@ const
 
      Taken from GCC rs6000.h
   }
-{$WARNING As indicated in rs6000.h, but can't find it anywhere else!}
+{ TODO: As indicated in rs6000.h, but can't find it anywhere else!}
   NR_PIC_OFFSET_REG = NR_R30;
   { Return address of a function }
   NR_RETURN_ADDRESS_REG = NR_R0;

compiler/psystem.pas

@@ -560,7 +560,7 @@ implementation
         aiclass[ait_ent]:=tai_ent;
 {$endif alpha}
 {$ifdef m68k}
-{$warning FIXME: tai_labeled_instruction doesn't exists}
+{ TODO: FIXME: tai_labeled_instruction doesn't exists}
 //        aiclass[ait_labeled_instruction]:=tai_labeled_instruction;
 {$endif m68k}
 {$ifdef ia64}

compiler/regvars.pas

@@ -298,7 +298,7 @@ implementation
             if assigned(regvarinfo^.regvars[i]) and
                (getsupreg(tvarsym(regvarinfo^.regvars[i]).localloc.register)=supreg) then
               begin
-                {$warning fixme regvar_loaded_int}
+                { TODO: fixme regvar_loaded_int}
 (*                if supreg in rg.regvar_loaded_int then
                   begin
                     vsym := tvarsym(regvarinfo^.regvars[i]);
@@ -306,7 +306,7 @@ implementation
                     { possible that it's been modified  (JM)                  }
                     if not(vsym.varspez in [vs_const,vs_var,vs_out]) then
                       begin
-{$warning FIXME Check vsym.localloc for regvars}
+{ TODO: FIXME Check vsym.localloc for regvars}
 //                        reference_reset_base(hr,current_procinfo.framepointer,vsym.adjusted_address);
                         cgsize:=def_cgsize(vsym.vardef);
                         cg.a_load_reg_ref(asml,cgsize,cgsize,vsym.localloc.register,hr);
@@ -323,7 +323,7 @@ implementation
           for i := 1 to maxvarregs do
             if assigned(regvarinfo^.regvars[i]) then
               begin
-                {$warning fixme regvars}
+                { TODO: fixme regvars}
 (*
                 r:=rg.makeregsize(regvarinfo^.regvars[i].localloc.register,OS_INT);
                 if (r = reg) then
@@ -336,7 +336,7 @@ implementation
                         { possible that it's been modified  (JM)                  }
                         if not(vsym.varspez in [vs_const,vs_var,vs_out]) then
                           begin
-{$warning FIXME Check vsym.localloc for regvars}
+{ TODO: FIXME Check vsym.localloc for regvars}
 //                            reference_reset_base(hr,current_procinfo.framepointer,vsym.adjusted_address);
                             cgsize:=def_cgsize(vsym.vardef);
                             cg.a_load_reg_ref(asml,cgsize,cgsize,vsym.localloc.register,hr);
@@ -364,7 +364,7 @@ implementation
       exit;
 {$endif i386}
       reg:=vsym.localloc.register;
-      {$warning fixme regvars}
+      { TODO: fixme regvars}
 (*
       if getregtype(reg)=R_INTREGISTER then
         begin
@@ -372,7 +372,7 @@ implementation
           if not(getsupreg(reg) in rg.regvar_loaded_int) then
             begin
               asml.concat(tai_regalloc.alloc(reg));
-{$warning FIXME Check vsym.localloc for regvars}
+{ TODO: FIXME Check vsym.localloc for regvars}
 //              reference_reset_base(hr,current_procinfo.framepointer,vsym.adjusted_address);
               if paramanager.push_addr_param(vsym.varspez,vsym.vardef,current_procinfo.procdef.proccalloption) then
                 opsize := OS_ADDR
@@ -389,7 +389,7 @@ implementation
           if not rg.regvar_loaded_other[regidx] then
             begin
               asml.concat(tai_regalloc.alloc(reg));
-{$warning FIXME Check vsym.localloc for regvars}
+{ TODO: FIXME Check vsym.localloc for regvars}
 //              reference_reset_base(hr,current_procinfo.framepointer,vsym.adjusted_address);
               if paramanager.push_addr_param(vsym.varspez,vsym.vardef,current_procinfo.procdef.proccalloption) then
                 opsize := OS_ADDR
@@ -469,7 +469,7 @@ implementation
                 begin
 {$ifdef i386}
                   { reserve place on the FPU stack }
-                  {$warning fixme fpustack}
+                  { TODO: fixme fpustack}
 (*
                   regvarinfo^.fpuregvars[i].localloc.register:=trgcpu(rg).correct_fpuregister(NR_ST0,i-1);
 *)
@@ -578,7 +578,7 @@ implementation
                     begin
                       reg:=cg.makeregsize(reg,OS_INT);
                       regidx:=findreg_by_number(reg);
-                      {$warning fixme regvar dealloc}
+                      { TODO: fixme regvar dealloc}
 {
                       if (rg.regvar_loaded_other[regidx]) then
                        asml.concat(tai_regalloc.dealloc(reg));

compiler/sparc/cpubase.pas

@@ -34,7 +34,7 @@ uses
 *****************************************************************************}
 
     type
-{$WARNING CPU32 opcodes do not fully include the Ultra SPRAC instruction set.}
+{ TODO: CPU32 opcodes do not fully include the Ultra SPRAC instruction set.}
       { don't change the order of these opcodes! }
       TAsmOp=({$i opcode.inc});
 
@@ -75,7 +75,7 @@ uses
       first_mm_supreg    = 0;
       first_mm_imreg     = 1;
 
-{$warning TODO Calculate bsstart}
+{ TODO: Calculate bsstart}
       regnumber_count_bsstart = 128;
 
       regnumber_table : array[tregisterindex] of tregister = (
@@ -198,7 +198,7 @@ uses
       usableregsaddr = [];
       c_countusableregsaddr = 0;
 
-{$warning firstsaveintreg shall be RS_NO}
+{ TODO: firstsaveintreg shall be RS_NO}
       firstsaveintreg = RS_L0; { Temporary, having RS_NO is broken }
       lastsaveintreg = RS_L0; { L0..L7 are already saved, I0..O7 are parameter }
       firstsavefpureg = RS_F2; { F0..F1 is used for return value }
@@ -259,7 +259,7 @@ uses
 
          Taken from GCC rs6000.h
       }
-{$warning As indicated in rs6000.h, but can't find it anywhere else!}
+{ TODO: As indicated in rs6000.h, but can't find it anywhere else!}
       {PIC_OFFSET_REG = R_30;}
       { Return address for DWARF }
       NR_RETURN_ADDRESS_REG = NR_I7;

compiler/symdef.pas

@@ -2705,7 +2705,7 @@ implementation
          minparacount:=0;
          maxparacount:=0;
          ppufile.getderef(returndefderef);
-{$warning TODO remove fpu_used loading}
+{ TODO: remove fpu_used loading}
          ppufile.getbyte;
          proctypeoption:=tproctypeoption(ppufile.getbyte);
          proccalloption:=tproccalloption(ppufile.getbyte);
@@ -3924,7 +3924,7 @@ implementation
 
     function tobjectdef.getparentdef:tdef;
       begin
-{$warning TODO Remove getparentdef hack}
+{ TODO: Remove getparentdef hack}
         { With 2 forward declared classes with the child class before the
           parent class the child class is written earlier to the ppu. Leaving it
           possible to have a reference to the parent class for property overriding,

compiler/symtype.pas

@@ -635,7 +635,7 @@ implementation
 
         if assigned(s) then
          begin
-{$warning TODO ugly hack}
+{ TODO: ugly hack}
            if s is tsym then
              st:=FindUnitSymtable(tsym(s).owner)
            else

compiler/systems/t_amiga.pas

@@ -271,7 +271,7 @@ end;
 
 initialization
 {$ifdef m68k}
-{$warning No executable creation support for m68k yet!}
+{ TODO: No executable creation support for m68k yet!}
   RegisterExternalLinker(system_m68k_Amiga_info,TLinkerAmiga);
   RegisterTarget(system_m68k_Amiga_info);
 {$endif m68k}

compiler/x86/cpubase.pas

@@ -163,7 +163,7 @@ uses
 {$endif x86_64}
 
     const
-{$warning TODO Calculate bsstart}
+{ TODO: Calculate bsstart}
       regnumber_count_bsstart = 64;
 
       regnumber_table : array[tregisterindex] of tregister = (

compiler/x86/rgx86.pas

@@ -302,7 +302,7 @@ implementation
       begin
         used_in_proc:=used_in_proc+s;
 
-{$warning TODO firstsavefpureg}
+{ TODO: firstsavefpureg}
 (*
         { don't try to save the fpu registers if not desired (e.g. for }
         { the 80x86)                                                   }
@@ -338,7 +338,7 @@ implementation
          hr : treference;
 }
       begin
-{$warning TODO firstsavefpureg}
+{ TODO: firstsavefpureg}
 (*
         if firstsavefpureg <> R_NO then
           for r.enum:=lastsavefpureg downto firstsavefpureg do

compiler/x86_64/cpupara.pas

@@ -69,7 +69,7 @@ unit cpupara;
     function structure_in_registers(varspez:tvarspez;size:longint):boolean;
       begin
         if (target_info.system=system_x86_64_win64) then
-{$warning Temporary hack: vs_const parameters are always passed by reference for win64}
+{ TODO: Temporary hack: vs_const parameters are always passed by reference for win64}
           result:=(varspez=vs_value) and (size in [1,2,4,8])
         else
           result:=(size<=16);
@@ -84,7 +84,7 @@ unit cpupara;
            orddef:
              begin
                loc1:=LOC_REGISTER;
-               {$warning TODO 128bit also needs lochigh}
+               { TODO: 128bit also needs lochigh}
              end;
            floatdef:
              begin
@@ -101,7 +101,7 @@ unit cpupara;
                     begin
                       loc1:=LOC_MMREGISTER;
                       loc2:=LOC_MMREGISTER;
-                      {$warning TODO float 128bit needs SSEUP lochigh}
+                      { TODO: float 128bit needs SSEUP lochigh}
                     end;
                end;
              end;