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@@ -1063,23 +1063,21 @@ reg_treg,reg64 \2\x0F\x26\110 386,PRIV,X86_64
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[MOVD,movd]
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(Ch_Rop1, Ch_Wop2, Ch_None)
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-mmxreg,mem \2\x0F\x6E\110 PENT,MMX,SD
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-mmxreg,reg32 \2\x0F\x6E\110 PENT,MMX
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-mem,mmxreg \2\x0F\x7E\101 PENT,MMX,SD
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-reg32,mmxreg \2\x0F\x7E\101 PENT,MMX
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-xmmreg,reg32 \361\2\x0F\x6E\110 WILLAMETTE,SSE2
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-reg32,xmmreg \361\2\x0F\x7E\101 WILLAMETTE,SSE2
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-mem,xmmreg \361\325\2\x0F\x7E\101 WILLAMETTE,SSE2
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-xmmreg,mem \361\325\2\x0F\x6E\110 WILLAMETTE,SSE2
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+mmxreg,rm32 \2\x0F\x6E\110 PENT,MMX,SD
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+rm32,mmxreg \2\x0F\x7E\101 PENT,MMX,SD
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+xmmreg,rm32 \361\2\x0F\x6E\110 WILLAMETTE,SSE2
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+rm32,xmmreg \361\2\x0F\x7E\101 WILLAMETTE,SSE2
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[MOVQ,movq]
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(Ch_Rop1, Ch_Wop2, Ch_None)
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mmxreg,mmxrm \2\x0F\x6F\110 PENT,MMX,SM
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mmxrm,mmxreg \2\x0F\x7F\101 PENT,MMX,SM
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+mmxreg,rm64 \326\2\x0F\x6E\110 X86_64,MMX
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+rm64,mmxreg \326\2\x0F\x7E\101 X86_64,MMX
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xmmreg,xmmrm \333\2\x0F\x7E\110 WILLAMETTE,SSE2
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xmmrm,xmmreg \361\2\x0F\xD6\101 WILLAMETTE,SSE2
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-xmmreg,reg64 \361\326\2\x0F\x6E\110 WILLAMETTE,SSE2
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-reg64,xmmreg \361\326\2\x0F\x7E\101 WILLAMETTE,SSE2
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+xmmreg,reg64 \361\326\2\x0F\x6E\110 WILLAMETTE,SSE2,X86_64
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+reg64,xmmreg \361\326\2\x0F\x7E\101 WILLAMETTE,SSE2,X86_64
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[MOVSB]
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(Ch_All, Ch_None, Ch_None)
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@@ -1089,10 +1087,8 @@ void \1\xA4 8086
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; Ch_All isn't correct for the sse move, but how can it be solved? (FK)
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(Ch_All, Ch_None, Ch_None)
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void \325\1\xA5 386
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-xmmreg,xmmreg \334\2\x0F\x10\110 WILLAMETTE,SSE2
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-xmmreg,xmmreg \334\2\x0F\x11\110 WILLAMETTE,SSE2
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-mem,xmmreg \334\2\x0F\x11\101 WILLAMETTE,SSE2
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-xmmreg,mem \334\2\x0F\x10\110 WILLAMETTE,SSE2
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+xmmreg,xmmrm \334\2\x0F\x10\110 WILLAMETTE,SSE2
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+xmmrm,xmmreg \334\2\x0F\x11\101 WILLAMETTE,SSE2
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[MOVSQ]
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(Ch_All, Ch_None, Ch_None)
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@@ -3029,10 +3025,6 @@ mem \326\2\x0F\xC7\201 X86_64
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;
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; SSE4a (AMD Barcelona CPUs, n/a on Intel)
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;
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-
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-
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-; note: \333=F3h, \334=F2h, \336=66h, \325=no REX.W=1 for qword, \375=unsigned
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-
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[MOVNTSS]
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(Ch_All, Ch_None, Ch_None)
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mem,xmmreg \333\2\x0F\x2B\101 SSE4,SD
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@@ -3045,11 +3037,11 @@ mem,xmmreg \334\325\2\x0F\x2B\101 SSE4 ;,SQ
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(Ch_All, Ch_None, Ch_None)
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xmmreg,xmmreg \334\2\x0F\x79\110 SSE4
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; four operands are not possible yet
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-; xmmreg,xmmreg,imm,imm \110\334\76\2\x0F\x78\77\375\22\375\23 SSE4,SB
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+; xmmreg,xmmreg,imm,imm \334\2\x0F\x78\110\26\27 SSE4,SB
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[EXTRQ]
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(Ch_All, Ch_None, Ch_None)
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-xmmreg,imm,imm \361\2\x0F\x78\200\375\21\375\22 SSE4,SB
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+xmmreg,imm,imm \361\2\x0F\x78\200\25\26 SSE4,SB
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xmmreg,xmmreg \361\2\x0F\x79\110 SSE4
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[LZCNT,lzcntX]
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