+ added the atomic memory access WebAssembly instructions from the threading proposal for WebAssembly

compiler/wasm32/cpubase.pas

@@ -87,7 +87,34 @@ uses
       // bulk memory operations
       a_memory_copy, a_memory_fill,
       // exceptions
-      a_try,a_catch,a_catch_all,a_delegate,a_throw,a_rethrow,a_end_try
+      a_try,a_catch,a_catch_all,a_delegate,a_throw,a_rethrow,a_end_try,
+      // atomic memory accesses - load/store
+      a_i32_atomic_load8_u, a_i32_atomic_load16_u, a_i32_atomic_load,
+      a_i64_atomic_load8_u, a_i64_atomic_load16_u, a_i64_atomic_load32_u,
+      a_i64_atomic_load, a_i32_atomic_store8, a_i32_atomic_store16,
+      a_i32_atomic_store, a_i64_atomic_store8, a_i64_atomic_store16,
+      a_i64_atomic_store32, a_i64_atomic_store,
+      // atomic memory accesses - read-modify-write
+      a_i32_atomic_rmw8_add_u, a_i32_atomic_rmw16_add_u, a_i32_atomic_rmw_add,
+      a_i64_atomic_rmw8_add_u, a_i64_atomic_rmw16_add_u, a_i64_atomic_rmw32_add_u,
+      a_i64_atomic_rmw_add, a_i32_atomic_rmw8_sub_u, a_i32_atomic_rmw16_sub_u,
+      a_i32_atomic_rmw_sub, a_i64_atomic_rmw8_sub_u, a_i64_atomic_rmw16_sub_u,
+      a_i64_atomic_rmw32_sub_u, a_i64_atomic_rmw_sub, a_i32_atomic_rmw8_and_u,
+      a_i32_atomic_rmw16_and_u, a_i32_atomic_rmw_and, a_i64_atomic_rmw8_and_u,
+      a_i64_atomic_rmw16_and_u, a_i64_atomic_rmw32_and_u, a_i64_atomic_rmw_and,
+      a_i32_atomic_rmw8_or_u, a_i32_atomic_rmw16_or_u, a_i32_atomic_rmw_or,
+      a_i64_atomic_rmw8_or_u, a_i64_atomic_rmw16_or_u, a_i64_atomic_rmw32_or_u,
+      a_i64_atomic_rmw_or, a_i32_atomic_rmw8_xor_u, a_i32_atomic_rmw16_xor_u,
+      a_i32_atomic_rmw_xor, a_i64_atomic_rmw8_xor_u, a_i64_atomic_rmw16_xor_u,
+      a_i64_atomic_rmw32_xor_u, a_i64_atomic_rmw_xor, a_i32_atomic_rmw8_xchg_u,
+      a_i32_atomic_rmw16_xchg_u, a_i32_atomic_rmw_xchg, a_i64_atomic_rmw8_xchg_u,
+      a_i64_atomic_rmw16_xchg_u, a_i64_atomic_rmw32_xchg_u, a_i64_atomic_rmw_xchg,
+      // atomic memory accesses - compare exchange
+      a_i32_atomic_rmw8_cmpxchg_u, a_i32_atomic_rmw16_cmpxchg_u, a_i32_atomic_rmw_cmpxchg,
+      a_i64_atomic_rmw8_cmpxchg_u, a_i64_atomic_rmw16_cmpxchg_u, a_i64_atomic_rmw32_cmpxchg_u,
+      a_i64_atomic_rmw_cmpxchg,
+      // atomic memory accesses - wait and notify operators
+      a_memory_atomic_wait32, a_memory_atomic_wait64, a_memory_atomic_notify, a_atomic_fence
       );
 
       TWasmBasicType = (wbt_i32, wbt_i64, wbt_f32, wbt_f64);

compiler/wasm32/itcpugas.pas

@@ -86,7 +86,34 @@ interface
       // bulk memory operations
       'memory.copy 0,0', 'memory.fill 0',
       // exceptions
-      'try','catch','catch_all','delegate','throw','rethrow','end_try'
+      'try','catch','catch_all','delegate','throw','rethrow','end_try',
+      // atomic memory accesses - load/store
+      'i32.atomic.load8_u', 'i32.atomic.load16_u', 'i32.atomic.load',
+      'i64.atomic.load8_u', 'i64.atomic.load16_u', 'i64.atomic.load32_u',
+      'i64.atomic.load', 'i32.atomic.store8', 'i32.atomic.store16',
+      'i32.atomic.store', 'i64.atomic.store8', 'i64.atomic.store16',
+      'i64.atomic.store32', 'i64.atomic.store',
+      // atomic memory accesses - read-modify-write
+      'i32.atomic.rmw8.add_u', 'i32.atomic.rmw16.add_u', 'i32.atomic.rmw.add',
+      'i64.atomic.rmw8.add_u', 'i64.atomic.rmw16.add_u', 'i64.atomic.rmw32.add_u',
+      'i64.atomic.rmw.add', 'i32.atomic.rmw8.sub_u', 'i32.atomic.rmw16.sub_u',
+      'i32.atomic.rmw.sub', 'i64.atomic.rmw8.sub_u', 'i64.atomic.rmw16.sub_u',
+      'i64.atomic.rmw32.sub_u', 'i64.atomic.rmw.sub', 'i32.atomic.rmw8.and_u',
+      'i32.atomic.rmw16.and_u', 'i32.atomic.rmw.and', 'i64.atomic.rmw8.and_u',
+      'i64.atomic.rmw16.and_u', 'i64.atomic.rmw32.and_u', 'i64.atomic.rmw.and',
+      'i32.atomic.rmw8.or_u', 'i32.atomic.rmw16.or_u', 'i32.atomic.rmw.or',
+      'i64.atomic.rmw8.or_u', 'i64.atomic.rmw16.or_u', 'i64.atomic.rmw32.or_u',
+      'i64.atomic.rmw.or', 'i32.atomic.rmw8.xor_u', 'i32.atomic.rmw16.xor_u',
+      'i32.atomic.rmw.xor', 'i64.atomic.rmw8.xor_u', 'i64.atomic.rmw16.xor_u',
+      'i64.atomic.rmw32.xor_u', 'i64.atomic.rmw.xor', 'i32.atomic.rmw8.xchg_u',
+      'i32.atomic.rmw16.xchg_u', 'i32.atomic.rmw.xchg', 'i64.atomic.rmw8.xchg_u',
+      'i64.atomic.rmw16.xchg_u', 'i64.atomic.rmw32.xchg_u', 'i64.atomic.rmw.xchg',
+      // atomic memory accesses - compare exchange
+      'i32.atomic.rmw8.cmpxchg_u', 'i32.atomic.rmw16.cmpxchg_u', 'i32.atomic.rmw.cmpxchg',
+      'i64.atomic.rmw8.cmpxchg_u', 'i64.atomic.rmw16.cmpxchg_u', 'i64.atomic.rmw32.cmpxchg_u',
+      'i64.atomic.rmw.cmpxchg',
+      // atomic memory accesses - wait and notify operators
+      'memory.atomic.wait32', 'memory.atomic.wait64', 'memory.atomic.notify', 'atomic.fence'
     );
 
     gas_wasm_basic_type_str : array [TWasmBasicType] of string = ('i32','i64','f32','f64');

compiler/wasm32/strinst.inc

@@ -70,5 +70,32 @@
         // bulk memory operations
         'memory.copy', 'memory.fill',
         // exceptions
-        'try','catch','catch_all','delegate','throw','rethrow','end'
+        'try','catch','catch_all','delegate','throw','rethrow','end',
+        // atomic memory accesses - load/store
+        'i32.atomic.load8_u', 'i32.atomic.load16_u', 'i32.atomic.load',
+        'i64.atomic.load8_u', 'i64.atomic.load16_u', 'i64.atomic.load32_u',
+        'i64.atomic.load', 'i32.atomic.store8', 'i32.atomic.store16',
+        'i32.atomic.store', 'i64.atomic.store8', 'i64.atomic.store16',
+        'i64.atomic.store32', 'i64.atomic.store',
+        // atomic memory accesses - read-modify-write
+        'i32.atomic.rmw8.add_u', 'i32.atomic.rmw16.add_u', 'i32.atomic.rmw.add',
+        'i64.atomic.rmw8.add_u', 'i64.atomic.rmw16.add_u', 'i64.atomic.rmw32.add_u',
+        'i64.atomic.rmw.add', 'i32.atomic.rmw8.sub_u', 'i32.atomic.rmw16.sub_u',
+        'i32.atomic.rmw.sub', 'i64.atomic.rmw8.sub_u', 'i64.atomic.rmw16.sub_u',
+        'i64.atomic.rmw32.sub_u', 'i64.atomic.rmw.sub', 'i32.atomic.rmw8.and_u',
+        'i32.atomic.rmw16.and_u', 'i32.atomic.rmw.and', 'i64.atomic.rmw8.and_u',
+        'i64.atomic.rmw16.and_u', 'i64.atomic.rmw32.and_u', 'i64.atomic.rmw.and',
+        'i32.atomic.rmw8.or_u', 'i32.atomic.rmw16.or_u', 'i32.atomic.rmw.or',
+        'i64.atomic.rmw8.or_u', 'i64.atomic.rmw16.or_u', 'i64.atomic.rmw32.or_u',
+        'i64.atomic.rmw.or', 'i32.atomic.rmw8.xor_u', 'i32.atomic.rmw16.xor_u',
+        'i32.atomic.rmw.xor', 'i64.atomic.rmw8.xor_u', 'i64.atomic.rmw16.xor_u',
+        'i64.atomic.rmw32.xor_u', 'i64.atomic.rmw.xor', 'i32.atomic.rmw8.xchg_u',
+        'i32.atomic.rmw16.xchg_u', 'i32.atomic.rmw.xchg', 'i64.atomic.rmw8.xchg_u',
+        'i64.atomic.rmw16.xchg_u', 'i64.atomic.rmw32.xchg_u', 'i64.atomic.rmw.xchg',
+        // atomic memory accesses - compare exchange
+        'i32.atomic.rmw8.cmpxchg_u', 'i32.atomic.rmw16.cmpxchg_u', 'i32.atomic.rmw.cmpxchg',
+        'i64.atomic.rmw8.cmpxchg_u', 'i64.atomic.rmw16.cmpxchg_u', 'i64.atomic.rmw32.cmpxchg_u',
+        'i64.atomic.rmw.cmpxchg',
+        // atomic memory accesses - wait and notify operators
+        'memory.atomic.wait32', 'memory.atomic.wait64', 'memory.atomic.notify', 'atomic.fence'