* fixed spilling

* fixed register assignment for instructions requiring a register>R15

git-svn-id: branches/avr@17046 -

compiler/avr/aasmcpu.pas

@@ -209,14 +209,14 @@ implementation
 
     function taicpu.spilling_get_operation_type(opnr: longint): topertype;
       begin
-        result := operand_read;
+        result:=operand_read;
         case opcode of
           A_CP,A_CPC,A_CPI :
             ;
           else
             begin
-              if opnr=ops-1 then
-                result := operand_write;
+              if (opnr=0) then
+                result:=operand_write;
             end;
         end;
       end;
@@ -226,9 +226,15 @@ implementation
       begin
         case getregtype(r) of
           R_INTREGISTER :
-            result:=taicpu.op_ref_reg(A_LD,ref,r);
+            if ref.offset<>0 then
+              result:=taicpu.op_reg_ref(A_LDD,r,ref)
+            else
+              result:=taicpu.op_reg_ref(A_LD,r,ref);
           R_ADDRESSREGISTER :
-            result:=taicpu.op_ref_reg(A_LD,ref,r);
+            if ref.offset<>0 then
+              result:=taicpu.op_reg_ref(A_LDD,r,ref)
+            else
+              result:=taicpu.op_reg_ref(A_LD,r,ref);
           else
             internalerror(200401041);
         end;
@@ -239,9 +245,15 @@ implementation
       begin
         case getregtype(r) of
           R_INTREGISTER :
-            result:=taicpu.op_reg_ref(A_ST,r,ref);
+            if ref.offset<>0 then
+              result:=taicpu.op_ref_reg(A_STD,ref,r)
+            else
+              result:=taicpu.op_ref_reg(A_ST,ref,r);
           R_ADDRESSREGISTER :
-            result:=taicpu.op_reg_ref(A_ST,r,ref);
+            if ref.offset<>0 then
+              result:=taicpu.op_ref_reg(A_STD,ref,r)
+            else
+              result:=taicpu.op_ref_reg(A_ST,ref,r);
           else
             internalerror(200401041);
         end;

compiler/avr/rgcpu.pas

@@ -87,28 +87,80 @@ unit rgcpu;
       end;
 
 
-
     procedure trgcpu.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);
+      var
+        helpins  : tai;
+        tmpref   : treference;
+        helplist : TAsmList;
+        hreg     : tregister;
       begin
-        inherited do_spill_read(list,pos,spilltemp,tempreg);
+        if abs(spilltemp.offset)>63 then
+          begin
+            helplist:=TAsmList.create;
+
+            helplist.concat(taicpu.op_reg_const(A_LDI,NR_R26,lo(word(spilltemp.offset))));
+            helplist.concat(taicpu.op_reg_const(A_LDI,NR_R27,hi(word(spilltemp.offset))));
+            helplist.concat(taicpu.op_reg_reg(A_ADD,NR_R26,spilltemp.base));
+            helplist.concat(taicpu.op_reg_reg(A_ADC,NR_R27,GetNextReg(spilltemp.base)));
+
+            reference_reset_base(tmpref,NR_R26,0,1);
+            helpins:=spilling_create_load(tmpref,tempreg);
+            helplist.concat(helpins);
+            list.insertlistafter(pos,helplist);
+            helplist.free;
+          end
+        else
+          inherited do_spill_read(list,pos,spilltemp,tempreg);
       end;
 
 
     procedure trgcpu.do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);
+      var
+        tmpref   : treference;
+        helplist : TAsmList;
+        hreg     : tregister;
       begin
-        inherited do_spill_written(list,pos,spilltemp,tempreg);
-      end;
+        if abs(spilltemp.offset)>63 then
+          begin
+            helplist:=TAsmList.create;
+
+            helplist.concat(taicpu.op_reg_const(A_LDI,NR_R26,lo(word(spilltemp.offset))));
+            helplist.concat(taicpu.op_reg_const(A_LDI,NR_R27,hi(word(spilltemp.offset))));
+            helplist.concat(taicpu.op_reg_reg(A_ADD,NR_R26,spilltemp.base));
+            helplist.concat(taicpu.op_reg_reg(A_ADC,NR_R27,GetNextReg(spilltemp.base)));
+
+            reference_reset_base(tmpref,NR_R26,0,1);
+            helplist.concat(spilling_create_store(tempreg,tmpref));
+            list.insertlistafter(pos,helplist);
+            helplist.free;
+          end
+        else
+          inherited do_spill_written(list,pos,spilltemp,tempreg);
+    end;
 
 
     procedure trgintcpu.add_cpu_interferences(p : tai);
       var
-        r : tregister;
+        r : tsuperregister;
       begin
         if p.typ=ait_instruction then
           begin
             case taicpu(p).opcode of
-              A_LD:
-                ;
+              A_CPI,
+              A_ANDI,
+              A_ORI,
+              A_SUBI,
+              A_SBCI,
+              A_LDI:
+                for r:=RS_R0 to RS_R15 do
+                  add_edge(r,GetSupReg(taicpu(p).oper[0]^.reg));
+              A_MULS:
+                begin
+                  for r:=RS_R0 to RS_R15 do
+                    add_edge(r,GetSupReg(taicpu(p).oper[0]^.reg));
+                  for r:=RS_R0 to RS_R15 do
+                    add_edge(r,GetSupReg(taicpu(p).oper[1]^.reg));
+                end;
             end;
           end;
       end;