* (re)set upper bits of register when appropriate for all operations in

    a_op_reg_reg() (except for NOT, which was already handled correctly)
    + test

git-svn-id: trunk@25840 -

.gitattributes

@@ -10032,6 +10032,7 @@ tests/tbs/tb0598.pp svneol=native#text/plain
 tests/tbs/tb0599.pp svneol=native#text/plain
 tests/tbs/tb0600.pp svneol=native#text/plain
 tests/tbs/tb0601.pp svneol=native#text/pascal
+tests/tbs/tb0602.pp svneol=native#text/plain
 tests/tbs/tb205.pp svneol=native#text/plain
 tests/tbs/tbs0594.pp svneol=native#text/pascal
 tests/tbs/ub0060.pp svneol=native#text/plain

compiler/arm/cgcpu.pas

@@ -702,7 +702,10 @@ unit cgcpu;
          so : tshifterop;
        begin
          if op = OP_NEG then
-             list.concat(taicpu.op_reg_reg_const(A_RSB,dst,src,0))
+           begin
+             list.concat(taicpu.op_reg_reg_const(A_RSB,dst,src,0));
+             maybeadjustresult(list,OP_NEG,size,dst);
+           end
          else if op = OP_NOT then
            begin
              if size in [OS_8, OS_16, OS_S8, OS_S16] then
@@ -725,7 +728,7 @@ unit cgcpu;
                list.concat(taicpu.op_reg_reg(A_MVN,dst,src));
            end
          else
-             a_op_reg_reg_reg(list,op,OS_32,src,dst,dst);
+           a_op_reg_reg_reg(list,op,size,src,dst,dst);
        end;
 
 

tests/tbs/tb0602.pp

@@ -0,0 +1,19 @@
+{$ifdef fpc}
+{$mode delphi}
+{$endif}
+
+procedure test;
+var
+  w: word;
+  arr: array[0..1] of word;
+begin
+  arr[1]:=2;
+  w:=1;
+  dec(w,arr[w]);
+  if cardinal(w)<>$ffff then
+    halt(1);
+end;
+
+begin
+  test;
+end.