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@@ -3408,6 +3408,13 @@ implementation
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{$endif x86_64}
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end;
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+ &240..&243:
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+ begin
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+{$ifdef x86_64}
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+ rex:=rex or (rexbits(oper[c and 7]^.reg) and $F4);
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+{$endif x86_64}
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+ inc(len);
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+ end;
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&350:
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begin
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exists_evex := true;
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@@ -3593,6 +3600,7 @@ implementation
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* field the register value of operand b.
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* \2ab - a ModRM, calculated on EA in operand a, with the spare
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* field equal to digit b.
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+ * \24a - operator a in ModRM.reg. ModRM 11:rrr:000
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* \254,\255,\256 - a signed 32-bit immediate to be extended to 64 bits
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* \300,\301,\302 - might be an 0x67, depending on the address size of
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* the memory reference in operand x.
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@@ -4001,6 +4009,16 @@ implementation
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end;
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+ &240..&243:
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+ begin
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+ opidx := c and 7;
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+ if ops > opidx then
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+ begin
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+ if (oper[opidx]^.typ=top_reg) then
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+ if getsupreg(oper[opidx]^.reg) and $10 = $0 then EVEXr := 1;
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+ end else EVEXr := 1; // modrm:reg not used =>> 1
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+ EVEXx:=1; //-- modrm.rm not used;
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+ end;
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&333: begin
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VEXvvvv := VEXvvvv OR $02; // set SIMD-prefix $F3
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//VEXpp := $02; // set SIMD-prefix $F3
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@@ -4503,6 +4521,11 @@ implementation
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end;
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&74,&75,&76 : ; // 074..076 - vex-coded vector operand
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// ignore
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+ &240..&243:
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+ begin
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+ bytes[0]:=$C0 or ((byte(oper[c and 7]^.reg) and 7) shl 3); {ModRM 11:rrr:000}
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+ objdata.writebytes(bytes,1);
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+ end;
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&254,&255,&256 : // 0254..0256 - dword implicitly sign-extended to 64-bit (x86_64 only)
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begin
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getvalsym(c-&254);
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