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@@ -47,6 +47,7 @@ Interface
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function OptPass1Shift(var p: tai): boolean;
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function OptPostCMP(var p: tai): boolean;
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function OptPass1Data(var p: tai): boolean;
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+ function RemoveSuperfluousFMov(const p: tai; movp: tai; const optimizer: string): boolean;
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End;
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Implementation
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@@ -193,6 +194,82 @@ Implementation
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end;
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+ function TCpuAsmOptimizer.RemoveSuperfluousFMov(const p: tai; movp: tai; const optimizer: string):boolean;
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+ var
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+ alloc,
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+ dealloc : tai_regalloc;
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+ hp1 : tai;
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+ begin
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+ Result:=false;
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+ if ((MatchInstruction(movp, A_FMOV, [taicpu(p).condition], [taicpu(p).oppostfix]) and
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+ ((getregtype(taicpu(movp).oper[0]^.reg)=R_MMREGISTER) { or (taicpu(p).opcode in [A_LDUR])})
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+ ) { or
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+ (((taicpu(p).oppostfix in [PF_F64F32,PF_F64S16,PF_F64S32,PF_F64U16,PF_F64U32]) or (getsubreg(taicpu(p).oper[0]^.reg)=R_SUBFD)) and MatchInstruction(movp, A_VMOV, [taicpu(p).condition], [PF_F64])) or
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+ (((taicpu(p).oppostfix in [PF_F32F64,PF_F32S16,PF_F32S32,PF_F32U16,PF_F32U32]) or (getsubreg(taicpu(p).oper[0]^.reg)=R_SUBFS)) and MatchInstruction(movp, A_VMOV, [taicpu(p).condition], [PF_F32])) }
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+ ) and
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+ (taicpu(movp).ops=2) and
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+ MatchOperand(taicpu(movp).oper[1]^, taicpu(p).oper[0]^.reg) and
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+ { the destination register of the mov might not be used beween p and movp }
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+ not(RegUsedBetween(taicpu(movp).oper[0]^.reg,p,movp)) and
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+ { Take care to only do this for instructions which REALLY load to the first register.
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+ Otherwise
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+ str reg0, [reg1]
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+ fmov reg2, reg0
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+ will be optimized to
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+ str reg2, [reg1]
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+ }
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+ RegLoadedWithNewValue(taicpu(p).oper[0]^.reg, p) then
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+ begin
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+ dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(movp.Next));
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+ if assigned(dealloc) then
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+ begin
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+ DebugMsg('Peephole '+optimizer+' removed superfluous vmov', movp);
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+ result:=true;
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+
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+ { taicpu(p).oper[0]^.reg is not used anymore, try to find its allocation
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+ and remove it if possible }
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+ asml.Remove(dealloc);
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+ alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.previous));
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+ if assigned(alloc) then
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+ begin
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+ asml.Remove(alloc);
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+ alloc.free;
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+ dealloc.free;
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+ end
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+ else
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+ asml.InsertAfter(dealloc,p);
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+
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+ { try to move the allocation of the target register }
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+ GetLastInstruction(movp,hp1);
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+ alloc:=FindRegAlloc(taicpu(movp).oper[0]^.reg,tai(hp1.Next));
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+ if assigned(alloc) then
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+ begin
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+ asml.Remove(alloc);
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+ asml.InsertBefore(alloc,p);
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+ { adjust used regs }
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+ IncludeRegInUsedRegs(taicpu(movp).oper[0]^.reg,UsedRegs);
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+ end;
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+
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+ { change
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+ vldr reg0,[reg1]
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+ vmov reg2,reg0
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+ into
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+ ldr reg2,[reg1]
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+
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+ if reg2 is an int register
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+ if (taicpu(p).opcode=A_VLDR) and (getregtype(taicpu(movp).oper[0]^.reg)=R_INTREGISTER) then
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+ taicpu(p).opcode:=A_LDR;
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+ }
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+
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+ { finally get rid of the mov }
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+ taicpu(p).loadreg(0,taicpu(movp).oper[0]^.reg);
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+ asml.remove(movp);
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+ movp.free;
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+ end;
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+ end;
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+ end;
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+
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+
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function TCpuAsmOptimizer.OptPass1Shift(var p : tai): boolean;
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var
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hp1,hp2: tai;
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@@ -346,6 +423,8 @@ Implementation
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function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
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+ var
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+ hp1: tai;
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begin
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result := false;
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if p.typ=ait_instruction then
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@@ -382,6 +461,20 @@ Implementation
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Result:=OptPass1SXTB(p);
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A_SXTH:
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Result:=OptPass1SXTH(p);
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+// A_VLDR,
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+ A_FADD,
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+ A_FMUL,
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+ A_FDIV,
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+ A_FSUB,
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+ A_FSQRT,
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+ A_FNEG,
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+ A_FCVT,
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+ A_FABS:
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+ begin
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+ if GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
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+ RemoveSuperfluousFMov(p, hp1, 'FOpFMov2FOp') then
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+ Result:=true;
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+ end
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else
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;
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end;
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