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@@ -55,6 +55,12 @@ unit aoptx86;
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function RegInInstruction(Reg: TRegister; p1: tai): Boolean;override;
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function GetNextInstructionUsingReg(Current: tai; out Next: tai; reg: TRegister): Boolean;
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+ { Identical to GetNextInstructionUsingReg, but returns a value indicating
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+ how many instructions away that Next is from Current is.
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+
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+ 0 = failure, equivalent to False in GetNextInstructionUsingReg }
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+ function GetNextInstructionUsingRegCount(Current: tai; out Next: tai; reg: TRegister): Cardinal;
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+
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{ This version of GetNextInstructionUsingReg will look across conditional jumps,
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potentially allowing further optimisation (although it might need to know if
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it crossed a conditional jump. }
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@@ -478,6 +484,27 @@ unit aoptx86;
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end;
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+ function TX86AsmOptimizer.GetNextInstructionUsingRegCount(Current: tai; out Next: tai; reg: TRegister): Cardinal;
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+ var
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+ GetNextResult: Boolean;
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+ begin
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+ Result:=0;
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+ Next:=Current;
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+ repeat
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+ GetNextResult := GetNextInstruction(Next,Next);
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+ if GetNextResult then
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+ Inc(Result)
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+ else
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+ { Must return zero upon hitting the end of the linked list without a match }
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+ Result := 0;
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+ until not (GetNextResult) or
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+ not(cs_opt_level3 in current_settings.optimizerswitches) or
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+ (Next.typ<>ait_instruction) or
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+ RegInInstruction(reg,Next) or
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+ is_calljmp(taicpu(Next).opcode);
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+ end;
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+
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+
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function TX86AsmOptimizer.GetNextInstructionUsingRegCond(Current: tai; out Next: tai; reg: TRegister; var JumpTracking: TLinkedList; var CrossJump: Boolean): Boolean;
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procedure TrackJump(Symbol: TAsmSymbol);
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@@ -12631,7 +12658,10 @@ unit aoptx86;
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function TX86AsmOptimizer.OptPass2ADD(var p : tai) : boolean;
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var
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- hp1: tai; NewRef: TReference;
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+ hp1, hp2: tai;
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+ NewRef: TReference;
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+ Distance: Cardinal;
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+ TempTracking: TAllUsedRegs;
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{ This entire nested function is used in an if-statement below, but we
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want to avoid all the used reg transfers and GetNextInstruction calls
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@@ -12644,18 +12674,82 @@ unit aoptx86;
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hp2 := p;
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repeat
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UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
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- until not GetNextInstruction(hp2, hp2) or (hp2 = hp1);
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+ until not (cs_opt_level3 in current_settings.optimizerswitches) or not GetNextInstruction(hp2, hp2) or (hp2 = hp1);
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Result := not RegUsedAfterInstruction(taicpu(p).oper[1]^.reg, hp1, TmpUsedRegs);
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end;
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begin
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Result := False;
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- if not GetNextInstruction(p, hp1) or (hp1.typ <> ait_instruction) then
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- Exit;
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- if (taicpu(p).opsize in [S_L{$ifdef x86_64}, S_Q{$endif}]) then
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+ if (taicpu(p).opsize in [S_L{$ifdef x86_64}, S_Q{$endif}]) and
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+ (taicpu(p).oper[1]^.typ = top_reg) then
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begin
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+ Distance := GetNextInstructionUsingRegCount(p, hp1, taicpu(p).oper[1]^.reg);
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+ if (Distance = 0) or (Distance > 3) { Likely too far to make a meaningful difference } or
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+ (hp1.typ <> ait_instruction) or
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+ not
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+ (
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+ (cs_opt_level3 in current_settings.optimizerswitches) or
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+ { GetNextInstructionUsingRegCount just returns the next valid instruction under -O2 and under }
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+ RegInInstruction(taicpu(p).oper[1]^.reg, hp1)
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+ ) then
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+ Exit;
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+
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+ { Some of the MOV optimisations are much more in-depth. For example, if we have:
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+ addq $x, %rax
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+ movq %rax, %rdx
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+ sarq $63, %rdx
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+ (%rax still in use)
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+
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+ ...letting OptPass2ADD run its course (and without -Os) will produce:
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+ leaq $x(%rax),%rdx
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+ addq $x, %rax
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+ sarq $63, %rdx
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+
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+ ...which is okay since it breaks the dependency chain between
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+ addq and movq, but if OptPass2MOV is called first:
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+
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+ addq $x, %rax
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+ cqto
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+
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+ ...which is better in all ways, taking only 2 cycles to execute
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+ and much smaller in code size.
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+ }
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+
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+ { The extra register tracking is quite strenuous }
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+ if (cs_opt_level2 in current_settings.optimizerswitches) and
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+ MatchInstruction(hp1, A_MOV, []) then
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+ begin
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+ { Update the register tracking to the MOV instruction }
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+ CopyUsedRegs(TempTracking);
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+ hp2 := p;
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+ repeat
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+ UpdateUsedRegs(tai(hp2.Next));
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+ until not (cs_opt_level3 in current_settings.optimizerswitches) or not GetNextInstruction(hp2, hp2) or (hp2 = hp1);
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+
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+ { if hp1 <> hp2 after the call, then hp1 got removed, so let
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+ OptPass2ADD get called again }
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+ if OptPass2MOV(hp1) and (hp1 <> hp2) then
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+ begin
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+ { Reset the tracking to the current instruction }
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+ RestoreUsedRegs(TempTracking);
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+ ReleaseUsedRegs(TempTracking);
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+
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+ Result := True;
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+ Exit;
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+ end;
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+
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+ { Reset the tracking to the current instruction }
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+ RestoreUsedRegs(TempTracking);
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+ ReleaseUsedRegs(TempTracking);
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+
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+ { If OptPass2MOV returned True, we don't need to set Result to
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+ True if hp1 didn't change because the ADD instruction didn't
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+ get modified and we'll be evaluating hp1 again when the
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+ peephole optimizer reaches it }
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+ end;
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+
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{ Change:
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add %reg2,%reg1
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mov/s/z #(%reg1),%reg1 (%reg1 superregisters must be the same)
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@@ -12663,7 +12757,7 @@ unit aoptx86;
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To:
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mov/s/z #(%reg1,%reg2),%reg1
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}
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- if MatchOpType(taicpu(p), top_reg, top_reg) and
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+ if (taicpu(p).oper[0]^.typ = top_reg) and
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MatchInstruction(hp1, [A_MOV, A_MOVZX, A_MOVSX{$ifdef x86_64}, A_MOVSXD{$endif}], []) and
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MatchOpType(taicpu(hp1), top_ref, top_reg) and
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(taicpu(hp1).oper[0]^.ref^.scalefactor <= 1) and
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@@ -12686,11 +12780,18 @@ unit aoptx86;
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)
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) then
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begin
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+ AllocRegBetween(taicpu(p).oper[0]^.reg, p, hp1, UsedRegs);
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taicpu(hp1).oper[0]^.ref^.base := taicpu(p).oper[1]^.reg;
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taicpu(hp1).oper[0]^.ref^.index := taicpu(p).oper[0]^.reg;
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DebugMsg(SPeepholeOptimization + 'AddMov2Mov done', p);
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- RemoveCurrentp(p, hp1);
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+
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+ if (cs_opt_level3 in current_settings.optimizerswitches) then
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+ { hp1 may not be the immediate next instruction under -O3 }
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+ RemoveCurrentp(p)
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+ else
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+ RemoveCurrentp(p, hp1);
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+
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Result := True;
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Exit;
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end;
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@@ -12704,51 +12805,69 @@ unit aoptx86;
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Breaks the dependency chain.
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}
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- if MatchOpType(taicpu(p),top_const,top_reg) and
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+ if (taicpu(p).oper[0]^.typ = top_const) and
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MatchInstruction(hp1, A_MOV, [taicpu(p).opsize]) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[1]^.reg) and
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(
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- { Don't do AddMov2LeaAdd under -Os, but do allow AddMov2Lea }
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- not (cs_opt_size in current_settings.optimizerswitches) or
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- (
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- not RegUsedAfterInstruction(taicpu(p).oper[1]^.reg, hp1, TmpUsedRegs) and
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- RegUsedAfterInstruction(NR_DEFAULTFLAGS, hp1, TmpUsedRegs)
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- )
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+ { Instructions are guaranteed to be adjacent on -O2 and under }
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+ not (cs_opt_level3 in current_settings.optimizerswitches) or
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+ not RegUsedBetween(taicpu(hp1).oper[1]^.reg, p, hp1)
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) then
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begin
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- { Change the MOV instruction to a LEA instruction, and update the
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- first operand }
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+ TransferUsedRegs(TmpUsedRegs);
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+ hp2 := p;
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+ repeat
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+ UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
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+ until not (cs_opt_level3 in current_settings.optimizerswitches) or not GetNextInstruction(hp2, hp2) or (hp2 = hp1);
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- reference_reset(NewRef, 1, []);
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- NewRef.base := taicpu(p).oper[1]^.reg;
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- NewRef.scalefactor := 1;
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- NewRef.offset := asizeint(taicpu(p).oper[0]^.val);
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+ if (
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+ { Don't do AddMov2LeaAdd under -Os, but do allow AddMov2Lea }
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+ not (cs_opt_size in current_settings.optimizerswitches) or
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+ (
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+ not RegUsedAfterInstruction(taicpu(p).oper[1]^.reg, hp1, TmpUsedRegs) and
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+ not RegUsedAfterInstruction(NR_DEFAULTFLAGS, hp1, TmpUsedRegs)
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+ )
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+ ) then
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+ begin
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+ { Change the MOV instruction to a LEA instruction, and update the
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+ first operand }
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- taicpu(hp1).opcode := A_LEA;
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- taicpu(hp1).loadref(0, NewRef);
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+ reference_reset(NewRef, 1, []);
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+ NewRef.base := taicpu(p).oper[1]^.reg;
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+ NewRef.scalefactor := 1;
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+ NewRef.offset := asizeint(taicpu(p).oper[0]^.val);
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- TransferUsedRegs(TmpUsedRegs);
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- UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
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- if RegUsedAfterInstruction(NewRef.base, hp1, TmpUsedRegs) or
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- RegUsedAfterInstruction(NR_DEFAULTFLAGS, hp1, TmpUsedRegs) then
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- begin
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- { Move what is now the LEA instruction to before the SUB instruction }
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- Asml.Remove(hp1);
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- Asml.InsertBefore(hp1, p);
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- AllocRegBetween(taicpu(hp1).oper[1]^.reg, hp1, p, UsedRegs);
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+ taicpu(hp1).opcode := A_LEA;
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+ taicpu(hp1).loadref(0, NewRef);
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- DebugMsg(SPeepholeOptimization + 'AddMov2LeaAdd', p);
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- p := hp1;
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- end
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- else
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- begin
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- { Since %reg1 or the flags aren't used afterwards, we can delete p completely }
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- RemoveCurrentP(p, hp1);
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- DebugMsg(SPeepholeOptimization + 'AddMov2Lea', p);
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- end;
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+ if RegUsedAfterInstruction(NewRef.base, hp1, TmpUsedRegs) or
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+ RegUsedAfterInstruction(NR_DEFAULTFLAGS, hp1, TmpUsedRegs) then
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+ begin
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+ hp2 := tai(hp1.Next); { for the benefit of AllocRegBetween }
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- Result := True;
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+ { Move what is now the LEA instruction to before the ADD instruction }
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+ Asml.Remove(hp1);
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+ Asml.InsertBefore(hp1, p);
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+ AllocRegBetween(taicpu(hp1).oper[1]^.reg, hp1, hp2, UsedRegs);
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+
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+ DebugMsg(SPeepholeOptimization + 'AddMov2LeaAdd', p);
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+ p := hp1;
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+ end
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+ else
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+ begin
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+ { Since %reg1 or the flags aren't used afterwards, we can delete p completely }
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+ DebugMsg(SPeepholeOptimization + 'AddMov2Lea', hp1);
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+
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+ if (cs_opt_level3 in current_settings.optimizerswitches) then
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+ { hp1 may not be the immediate next instruction under -O3 }
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+ RemoveCurrentp(p)
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+ else
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+ RemoveCurrentp(p, hp1);
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+ end;
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+
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+ Result := True;
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+ end;
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end;
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end;
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end;
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@@ -12800,65 +12919,156 @@ unit aoptx86;
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function TX86AsmOptimizer.OptPass2SUB(var p: tai): Boolean;
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var
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- hp1: tai; NewRef: TReference;
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- begin
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- { Change:
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- subl/q $x,%reg1
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- movl/q %reg1,%reg2
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- To:
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- leal/q $-x(%reg1),%reg2
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- subl/q $x,%reg1 (can be removed if %reg1 or the flags are not used afterwards)
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+ hp1, hp2: tai;
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+ NewRef: TReference;
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+ Distance: Cardinal;
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+ TempTracking: TAllUsedRegs;
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- Breaks the dependency chain and potentially permits the removal of
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- a CMP instruction if one follows.
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- }
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+ begin
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Result := False;
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- if (taicpu(p).opsize in [S_L{$ifdef x86_64}, S_Q{$endif x86_64}]) and
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- MatchOpType(taicpu(p),top_const,top_reg) and
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- GetNextInstruction(p, hp1) and
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- MatchInstruction(hp1, A_MOV, [taicpu(p).opsize]) and
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- (taicpu(hp1).oper[1]^.typ = top_reg) and
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- MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[1]^.reg) and
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- (
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- { Don't do SubMov2LeaSub under -Os, but do allow SubMov2Lea }
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- not (cs_opt_size in current_settings.optimizerswitches) or
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- (
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- not RegUsedAfterInstruction(taicpu(p).oper[1]^.reg, hp1, TmpUsedRegs) and
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- RegUsedAfterInstruction(NR_DEFAULTFLAGS, hp1, TmpUsedRegs)
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- )
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- ) then
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+
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+ if (taicpu(p).opsize in [S_L{$ifdef x86_64}, S_Q{$endif}]) and
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+ MatchOpType(taicpu(p),top_const,top_reg) then
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begin
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- { Change the MOV instruction to a LEA instruction, and update the
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- first operand }
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- reference_reset(NewRef, 1, []);
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- NewRef.base := taicpu(p).oper[1]^.reg;
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- NewRef.scalefactor := 1;
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- NewRef.offset := -taicpu(p).oper[0]^.val;
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+ Distance := GetNextInstructionUsingRegCount(p, hp1, taicpu(p).oper[1]^.reg);
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+ if (Distance = 0) or (Distance > 3) { Likely too far to make a meaningful difference } or
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+ (hp1.typ <> ait_instruction) or
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+ not
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+ (
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+ (cs_opt_level3 in current_settings.optimizerswitches) or
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+ { GetNextInstructionUsingRegCount just returns the next valid instruction under -O2 and under }
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+ RegInInstruction(taicpu(p).oper[1]^.reg, hp1)
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+ ) then
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+ Exit;
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- taicpu(hp1).opcode := A_LEA;
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- taicpu(hp1).loadref(0, NewRef);
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+ { Some of the MOV optimisations are much more in-depth. For example, if we have:
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+ subq $x, %rax
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+ movq %rax, %rdx
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+ sarq $63, %rdx
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+ (%rax still in use)
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- TransferUsedRegs(TmpUsedRegs);
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- UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
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- if RegUsedAfterInstruction(NewRef.base, hp1, TmpUsedRegs) or
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- RegUsedAfterInstruction(NR_DEFAULTFLAGS, hp1, TmpUsedRegs) then
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- begin
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- { Move what is now the LEA instruction to before the SUB instruction }
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- Asml.Remove(hp1);
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- Asml.InsertBefore(hp1, p);
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- AllocRegBetween(taicpu(hp1).oper[1]^.reg, hp1, p, UsedRegs);
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+ ...letting OptPass2SUB run its course (and without -Os) will produce:
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+ leaq $-x(%rax),%rdx
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+ movq $x, %rax
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+ sarq $63, %rdx
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- DebugMsg(SPeepholeOptimization + 'SubMov2LeaSub', p);
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- p := hp1;
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- end
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- else
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+ ...which is okay since it breaks the dependency chain between
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+ subq and movq, but if OptPass2MOV is called first:
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+
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+ subq $x, %rax
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+ cqto
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+
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+ ...which is better in all ways, taking only 2 cycles to execute
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+ and much smaller in code size.
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+ }
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+
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+ { The extra register tracking is quite strenuous }
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|
|
+ if (cs_opt_level2 in current_settings.optimizerswitches) and
|
|
|
+ MatchInstruction(hp1, A_MOV, []) then
|
|
|
begin
|
|
|
- { Since %reg1 or the flags aren't used afterwards, we can delete p completely }
|
|
|
- RemoveCurrentP(p, hp1);
|
|
|
- DebugMsg(SPeepholeOptimization + 'SubMov2Lea', p);
|
|
|
+ { Update the register tracking to the MOV instruction }
|
|
|
+ CopyUsedRegs(TempTracking);
|
|
|
+ hp2 := p;
|
|
|
+ repeat
|
|
|
+ UpdateUsedRegs(tai(hp2.Next));
|
|
|
+ until not (cs_opt_level3 in current_settings.optimizerswitches) or not GetNextInstruction(hp2, hp2) or (hp2 = hp1);
|
|
|
+
|
|
|
+ { if hp1 <> hp2 after the call, then hp1 got removed, so let
|
|
|
+ OptPass2SUB get called again }
|
|
|
+ if OptPass2MOV(hp1) and (hp1 <> hp2) then
|
|
|
+ begin
|
|
|
+ { Reset the tracking to the current instruction }
|
|
|
+ RestoreUsedRegs(TempTracking);
|
|
|
+ ReleaseUsedRegs(TempTracking);
|
|
|
+
|
|
|
+ Result := True;
|
|
|
+ Exit;
|
|
|
+ end;
|
|
|
+
|
|
|
+ { Reset the tracking to the current instruction }
|
|
|
+ RestoreUsedRegs(TempTracking);
|
|
|
+ ReleaseUsedRegs(TempTracking);
|
|
|
+
|
|
|
+ { If OptPass2MOV returned True, we don't need to set Result to
|
|
|
+ True if hp1 didn't change because the SUB instruction didn't
|
|
|
+ get modified and we'll be evaluating hp1 again when the
|
|
|
+ peephole optimizer reaches it }
|
|
|
end;
|
|
|
|
|
|
- Result := True;
|
|
|
+ { Change:
|
|
|
+ subl/q $x,%reg1
|
|
|
+ movl/q %reg1,%reg2
|
|
|
+ To:
|
|
|
+ leal/q $-x(%reg1),%reg2
|
|
|
+ subl/q $x,%reg1 (can be removed if %reg1 or the flags are not used afterwards)
|
|
|
+
|
|
|
+ Breaks the dependency chain and potentially permits the removal of
|
|
|
+ a CMP instruction if one follows.
|
|
|
+ }
|
|
|
+ if MatchInstruction(hp1, A_MOV, [taicpu(p).opsize]) and
|
|
|
+ (taicpu(hp1).oper[1]^.typ = top_reg) and
|
|
|
+ MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[1]^.reg) and
|
|
|
+ (
|
|
|
+ { Instructions are guaranteed to be adjacent on -O2 and under }
|
|
|
+ not (cs_opt_level3 in current_settings.optimizerswitches) or
|
|
|
+ not RegUsedBetween(taicpu(hp1).oper[1]^.reg, p, hp1)
|
|
|
+ ) then
|
|
|
+ begin
|
|
|
+ TransferUsedRegs(TmpUsedRegs);
|
|
|
+ hp2 := p;
|
|
|
+ repeat
|
|
|
+ UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
|
|
|
+ until not (cs_opt_level3 in current_settings.optimizerswitches) or not GetNextInstruction(hp2, hp2) or (hp2 = hp1);
|
|
|
+
|
|
|
+ if (
|
|
|
+ { Don't do SubMov2LeaSub under -Os, but do allow SubMov2Lea }
|
|
|
+ not (cs_opt_size in current_settings.optimizerswitches) or
|
|
|
+ (
|
|
|
+ not RegUsedAfterInstruction(taicpu(p).oper[1]^.reg, hp1, TmpUsedRegs) and
|
|
|
+ not RegUsedAfterInstruction(NR_DEFAULTFLAGS, hp1, TmpUsedRegs)
|
|
|
+ )
|
|
|
+ ) then
|
|
|
+ begin
|
|
|
+ { Change the MOV instruction to a LEA instruction, and update the
|
|
|
+ first operand }
|
|
|
+ reference_reset(NewRef, 1, []);
|
|
|
+ NewRef.base := taicpu(p).oper[1]^.reg;
|
|
|
+ NewRef.scalefactor := 1;
|
|
|
+ NewRef.offset := -taicpu(p).oper[0]^.val;
|
|
|
+
|
|
|
+ taicpu(hp1).opcode := A_LEA;
|
|
|
+ taicpu(hp1).loadref(0, NewRef);
|
|
|
+
|
|
|
+ TransferUsedRegs(TmpUsedRegs);
|
|
|
+ UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
|
|
|
+ if RegUsedAfterInstruction(NewRef.base, hp1, TmpUsedRegs) or
|
|
|
+ RegUsedAfterInstruction(NR_DEFAULTFLAGS, hp1, TmpUsedRegs) then
|
|
|
+ begin
|
|
|
+ hp2 := tai(hp1.Next); { for the benefit of AllocRegBetween }
|
|
|
+
|
|
|
+ { Move what is now the LEA instruction to before the SUB instruction }
|
|
|
+ Asml.Remove(hp1);
|
|
|
+ Asml.InsertBefore(hp1, p);
|
|
|
+ AllocRegBetween(taicpu(hp1).oper[1]^.reg, hp1, hp2, UsedRegs);
|
|
|
+
|
|
|
+ DebugMsg(SPeepholeOptimization + 'SubMov2LeaSub', p);
|
|
|
+ p := hp1;
|
|
|
+ end
|
|
|
+ else
|
|
|
+ begin
|
|
|
+ { Since %reg1 or the flags aren't used afterwards, we can delete p completely }
|
|
|
+ DebugMsg(SPeepholeOptimization + 'SubMov2Lea', hp1);
|
|
|
+
|
|
|
+ if (cs_opt_level3 in current_settings.optimizerswitches) then
|
|
|
+ { hp1 may not be the immediate next instruction under -O3 }
|
|
|
+ RemoveCurrentp(p)
|
|
|
+ else
|
|
|
+ RemoveCurrentp(p, hp1);
|
|
|
+ end;
|
|
|
+
|
|
|
+ Result := True;
|
|
|
+ end;
|
|
|
+ end;
|
|
|
end;
|
|
|
end;
|
|
|
|
J. Gareth "Kit" Moreton