* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.

git-svn-id: trunk@25627 -

.gitattributes

@@ -218,7 +218,6 @@ compiler/i386/r386nasm.inc svneol=native#text/plain
 compiler/i386/r386nor.inc svneol=native#text/plain
 compiler/i386/r386nri.inc svneol=native#text/plain
 compiler/i386/r386num.inc svneol=native#text/plain
-compiler/i386/r386op.inc svneol=native#text/plain
 compiler/i386/r386ot.inc svneol=native#text/plain
 compiler/i386/r386rni.inc svneol=native#text/plain
 compiler/i386/r386sri.inc svneol=native#text/plain
@@ -263,7 +262,6 @@ compiler/i8086/r8086nasm.inc svneol=native#text/plain
 compiler/i8086/r8086nor.inc svneol=native#text/plain
 compiler/i8086/r8086nri.inc svneol=native#text/plain
 compiler/i8086/r8086num.inc svneol=native#text/plain
-compiler/i8086/r8086op.inc svneol=native#text/plain
 compiler/i8086/r8086ot.inc svneol=native#text/plain
 compiler/i8086/r8086rni.inc svneol=native#text/plain
 compiler/i8086/r8086sri.inc svneol=native#text/plain
@@ -807,7 +805,6 @@ compiler/x86_64/r8664int.inc svneol=native#text/plain
 compiler/x86_64/r8664iri.inc svneol=native#text/plain
 compiler/x86_64/r8664nor.inc svneol=native#text/plain
 compiler/x86_64/r8664num.inc svneol=native#text/plain
-compiler/x86_64/r8664op.inc svneol=native#text/plain
 compiler/x86_64/r8664ot.inc svneol=native#text/plain
 compiler/x86_64/r8664rni.inc svneol=native#text/plain
 compiler/x86_64/r8664sri.inc svneol=native#text/plain

compiler/i386/r386ari.inc

@@ -8,22 +8,22 @@
 15,
 6,
 5,
-38,
 39,
 40,
 41,
+42,
 26,
 7,
 10,
 19,
 9,
-32,
 33,
 34,
 35,
 36,
 37,
-27,
+38,
+28,
 11,
 4,
 22,
@@ -31,13 +31,13 @@
 8,
 20,
 12,
+32,
 25,
-28,
 18,
 24,
-47,
-30,
 31,
+29,
+30,
 57,
 58,
 59,
@@ -48,7 +48,7 @@
 64,
 17,
 23,
-29,
+27,
 56,
 48,
 49,
@@ -58,11 +58,11 @@
 53,
 54,
 55,
-42,
 43,
 44,
 45,
 46,
+47,
 65,
 66,
 67,

compiler/i386/r386att.inc

@@ -24,13 +24,14 @@
 '%ebp',
 '%sp',
 '%esp',
-'%eip',
-'%cs',
-'%ds',
 '%es',
+'%cs',
 '%ss',
+'%ds',
 '%fs',
 '%gs',
+'%flags',
+'%eip',
 '%dr0',
 '%dr1',
 '%dr2',
@@ -46,7 +47,6 @@
 '%tr5',
 '%tr6',
 '%tr7',
-'%flags',
 '%st(0)',
 '%st(1)',
 '%st(2)',

compiler/i386/r386con.inc

@@ -24,29 +24,29 @@ NR_BP = tregister($01030006);
 NR_EBP = tregister($01040006);
 NR_SP = tregister($01030007);
 NR_ESP = tregister($01040007);
-NR_EIP = tregister($05040000);
+NR_ES = tregister($05000000);
 NR_CS = tregister($05000001);
-NR_DS = tregister($05000002);
-NR_ES = tregister($05000003);
-NR_SS = tregister($05000004);
-NR_FS = tregister($05000005);
-NR_GS = tregister($05000006);
-NR_DR0 = tregister($05000007);
-NR_DR1 = tregister($05000008);
-NR_DR2 = tregister($05000009);
-NR_DR3 = tregister($0500000a);
-NR_DR6 = tregister($0500000b);
-NR_DR7 = tregister($0500000c);
-NR_CR0 = tregister($0500000d);
-NR_CR2 = tregister($0500000e);
-NR_CR3 = tregister($0500000f);
-NR_CR4 = tregister($05000010);
-NR_TR3 = tregister($05000011);
-NR_TR4 = tregister($05000012);
-NR_TR5 = tregister($05000013);
-NR_TR6 = tregister($05000014);
-NR_TR7 = tregister($05000015);
-NR_FLAGS = tregister($05000016);
+NR_SS = tregister($05000002);
+NR_DS = tregister($05000003);
+NR_FS = tregister($05000004);
+NR_GS = tregister($05000005);
+NR_FLAGS = tregister($05000006);
+NR_EIP = tregister($05040007);
+NR_DR0 = tregister($05000008);
+NR_DR1 = tregister($05000009);
+NR_DR2 = tregister($0500000a);
+NR_DR3 = tregister($0500000b);
+NR_DR6 = tregister($0500000d);
+NR_DR7 = tregister($0500000e);
+NR_CR0 = tregister($05000010);
+NR_CR2 = tregister($05000012);
+NR_CR3 = tregister($05000013);
+NR_CR4 = tregister($05000014);
+NR_TR3 = tregister($0500001b);
+NR_TR4 = tregister($0500001c);
+NR_TR5 = tregister($0500001d);
+NR_TR6 = tregister($0500001e);
+NR_TR7 = tregister($0500001f);
 NR_ST0 = tregister($02000000);
 NR_ST1 = tregister($02000001);
 NR_ST2 = tregister($02000002);

compiler/i386/r386dwrf.inc

@@ -24,7 +24,6 @@
 5,
 4,
 4,
-8,
 -1,
 -1,
 -1,
@@ -32,6 +31,7 @@
 -1,
 -1,
 -1,
+8,
 -1,
 -1,
 -1,

compiler/i386/r386int.inc

@@ -24,13 +24,14 @@
 'ebp',
 'sp',
 'esp',
-'eip',
-'cs',
-'ds',
 'es',
+'cs',
 'ss',
+'ds',
 'fs',
 'gs',
+'flags',
+'eip',
 'dr0',
 'dr1',
 'dr2',
@@ -46,7 +47,6 @@
 'tr5',
 'tr6',
 'tr7',
-'flags',
 'st(0)',
 'st(1)',
 'st(2)',

compiler/i386/r386iri.inc

@@ -9,22 +9,22 @@
 15,
 6,
 5,
-38,
 39,
 40,
 41,
+42,
 26,
 7,
 10,
 19,
 9,
-32,
 33,
 34,
 35,
 36,
 37,
-27,
+38,
+28,
 11,
 4,
 22,
@@ -32,13 +32,13 @@
 8,
 20,
 12,
+32,
 25,
-28,
 18,
 24,
-47,
-30,
 31,
+29,
+30,
 57,
 58,
 59,
@@ -49,7 +49,7 @@
 64,
 17,
 23,
-29,
+27,
 56,
 48,
 49,
@@ -59,11 +59,11 @@
 53,
 54,
 55,
-42,
 43,
 44,
 45,
 46,
+47,
 65,
 66,
 67,

compiler/i386/r386nasm.inc

@@ -24,13 +24,14 @@
 'ebp',
 'sp',
 'esp',
-'eip',
-'cs',
-'ds',
 'es',
+'cs',
 'ss',
+'ds',
 'fs',
 'gs',
+'flags',
+'eip',
 'dr0',
 'dr1',
 'dr2',
@@ -46,7 +47,6 @@
 'tr5',
 'tr6',
 'tr7',
-'flags',
 'st0',
 'st1',
 'st2',

compiler/i386/r386nri.inc

@@ -9,22 +9,22 @@
 15,
 6,
 5,
-38,
 39,
 40,
 41,
+42,
 26,
 7,
 10,
 19,
 9,
-32,
 33,
 34,
 35,
 36,
 37,
-27,
+38,
+28,
 11,
 4,
 22,
@@ -32,13 +32,13 @@
 8,
 20,
 12,
+32,
 25,
-28,
 18,
 24,
-47,
-30,
 31,
+29,
+30,
 57,
 58,
 59,
@@ -49,7 +49,7 @@
 64,
 17,
 23,
-29,
+27,
 56,
 48,
 49,
@@ -59,11 +59,11 @@
 53,
 54,
 55,
-42,
 43,
 44,
 45,
 46,
+47,
 65,
 66,
 67,

compiler/i386/r386num.inc

@@ -24,29 +24,29 @@ tregister($01030006),
 tregister($01040006),
 tregister($01030007),
 tregister($01040007),
-tregister($05040000),
+tregister($05000000),
 tregister($05000001),
 tregister($05000002),
 tregister($05000003),
 tregister($05000004),
 tregister($05000005),
 tregister($05000006),
-tregister($05000007),
+tregister($05040007),
 tregister($05000008),
 tregister($05000009),
 tregister($0500000a),
 tregister($0500000b),
-tregister($0500000c),
 tregister($0500000d),
 tregister($0500000e),
-tregister($0500000f),
 tregister($05000010),
-tregister($05000011),
 tregister($05000012),
 tregister($05000013),
 tregister($05000014),
-tregister($05000015),
-tregister($05000016),
+tregister($0500001b),
+tregister($0500001c),
+tregister($0500001d),
+tregister($0500001e),
+tregister($0500001f),
 tregister($02000000),
 tregister($02000001),
 tregister($02000002),

compiler/i386/r386op.inc

@@ -1,82 +0,0 @@
-{ don't edit, this file is generated from x86reg.dat }
-0,
-0,
-4,
-0,
-0,
-1,
-5,
-1,
-1,
-2,
-6,
-2,
-2,
-3,
-7,
-3,
-3,
-6,
-6,
-7,
-7,
-5,
-5,
-4,
-4,
-0,
-1,
-3,
-0,
-2,
-4,
-5,
-0,
-1,
-2,
-3,
-6,
-7,
-0,
-2,
-3,
-4,
-3,
-4,
-5,
-6,
-7,
-0,
-0,
-1,
-2,
-3,
-4,
-5,
-6,
-7,
-0,
-0,
-1,
-2,
-3,
-4,
-5,
-6,
-7,
-0,
-1,
-2,
-3,
-4,
-5,
-6,
-7,
-0,
-1,
-2,
-3,
-4,
-5,
-6,
-7

compiler/i386/r386ot.inc

@@ -24,13 +24,14 @@ OT_REG16,
 OT_REG32,
 OT_REG16,
 OT_REG32,
-OT_NONE,
-OT_REG_CS,
 OT_REG_DESS,
+OT_REG_CS,
 OT_REG_DESS,
 OT_REG_DESS,
 OT_REG_FSGS,
 OT_REG_FSGS,
+OT_NONE,
+OT_NONE,
 OT_REG_DREG,
 OT_REG_DREG,
 OT_REG_DREG,
@@ -46,7 +47,6 @@ OT_REG_TREG,
 OT_REG_TREG,
 OT_REG_TREG,
 OT_REG_TREG,
-OT_NONE,
 OT_FPU0,
 OT_FPUREG,
 OT_FPUREG,

compiler/i386/r386rni.inc

@@ -57,13 +57,13 @@
 78,
 79,
 80,
+25,
 26,
 27,
 28,
 29,
 30,
 31,
-32,
 33,
 34,
 35,
@@ -79,4 +79,4 @@
 45,
 46,
 47,
-25
+32

compiler/i386/r386sri.inc

@@ -9,22 +9,22 @@
 15,
 6,
 5,
-38,
 39,
 40,
 41,
+42,
 26,
 7,
 10,
 19,
 9,
-32,
 33,
 34,
 35,
 36,
 37,
-27,
+38,
+28,
 11,
 4,
 22,
@@ -32,13 +32,13 @@
 8,
 20,
 12,
+32,
 25,
-28,
 18,
 24,
-47,
-30,
 31,
+29,
+30,
 57,
 58,
 59,
@@ -49,7 +49,7 @@
 64,
 17,
 23,
-29,
+27,
 56,
 48,
 49,
@@ -59,11 +59,11 @@
 53,
 54,
 55,
-42,
 43,
 44,
 45,
 46,
+47,
 65,
 66,
 67,

compiler/i386/r386std.inc

@@ -24,13 +24,14 @@
 'ebp',
 'sp',
 'esp',
-'eip',
-'cs',
-'ds',
 'es',
+'cs',
 'ss',
+'ds',
 'fs',
 'gs',
+'flags',
+'eip',
 'dr0',
 'dr1',
 'dr2',
@@ -46,7 +47,6 @@
 'tr5',
 'tr6',
 'tr7',
-'flags',
 'st(0)',
 'st(1)',
 'st(2)',

compiler/i8086/r8086ari.inc

@@ -8,22 +8,22 @@
 15,
 6,
 5,
-38,
 39,
 40,
 41,
+42,
 26,
 7,
 10,
 19,
 9,
-32,
 33,
 34,
 35,
 36,
 37,
-27,
+38,
+28,
 11,
 4,
 22,
@@ -31,13 +31,13 @@
 8,
 20,
 12,
+32,
 25,
-28,
 18,
 24,
-47,
-30,
 31,
+29,
+30,
 57,
 58,
 59,
@@ -48,7 +48,7 @@
 64,
 17,
 23,
-29,
+27,
 56,
 48,
 49,
@@ -58,11 +58,11 @@
 53,
 54,
 55,
-42,
 43,
 44,
 45,
 46,
+47,
 65,
 66,
 67,

compiler/i8086/r8086att.inc

@@ -24,13 +24,14 @@
 '%ebp',
 '%sp',
 '%esp',
-'%eip',
-'%cs',
-'%ds',
 '%es',
+'%cs',
 '%ss',
+'%ds',
 '%fs',
 '%gs',
+'%flags',
+'%eip',
 '%dr0',
 '%dr1',
 '%dr2',
@@ -46,7 +47,6 @@
 '%tr5',
 '%tr6',
 '%tr7',
-'%flags',
 '%st(0)',
 '%st(1)',
 '%st(2)',

compiler/i8086/r8086con.inc

@@ -24,29 +24,29 @@ NR_BP = tregister($01030006);
 NR_EBP = tregister($01040006);
 NR_SP = tregister($01030007);
 NR_ESP = tregister($01040007);
-NR_EIP = tregister($05040000);
+NR_ES = tregister($05000000);
 NR_CS = tregister($05000001);
-NR_DS = tregister($05000002);
-NR_ES = tregister($05000003);
-NR_SS = tregister($05000004);
-NR_FS = tregister($05000005);
-NR_GS = tregister($05000006);
-NR_DR0 = tregister($05000007);
-NR_DR1 = tregister($05000008);
-NR_DR2 = tregister($05000009);
-NR_DR3 = tregister($0500000a);
-NR_DR6 = tregister($0500000b);
-NR_DR7 = tregister($0500000c);
-NR_CR0 = tregister($0500000d);
-NR_CR2 = tregister($0500000e);
-NR_CR3 = tregister($0500000f);
-NR_CR4 = tregister($05000010);
-NR_TR3 = tregister($05000011);
-NR_TR4 = tregister($05000012);
-NR_TR5 = tregister($05000013);
-NR_TR6 = tregister($05000014);
-NR_TR7 = tregister($05000015);
-NR_FLAGS = tregister($05000016);
+NR_SS = tregister($05000002);
+NR_DS = tregister($05000003);
+NR_FS = tregister($05000004);
+NR_GS = tregister($05000005);
+NR_FLAGS = tregister($05000006);
+NR_EIP = tregister($05040007);
+NR_DR0 = tregister($05000008);
+NR_DR1 = tregister($05000009);
+NR_DR2 = tregister($0500000a);
+NR_DR3 = tregister($0500000b);
+NR_DR6 = tregister($0500000d);
+NR_DR7 = tregister($0500000e);
+NR_CR0 = tregister($05000010);
+NR_CR2 = tregister($05000012);
+NR_CR3 = tregister($05000013);
+NR_CR4 = tregister($05000014);
+NR_TR3 = tregister($0500001b);
+NR_TR4 = tregister($0500001c);
+NR_TR5 = tregister($0500001d);
+NR_TR6 = tregister($0500001e);
+NR_TR7 = tregister($0500001f);
 NR_ST0 = tregister($02000000);
 NR_ST1 = tregister($02000001);
 NR_ST2 = tregister($02000002);

compiler/i8086/r8086dwrf.inc

@@ -24,7 +24,6 @@
 5,
 4,
 4,
-8,
 -1,
 -1,
 -1,
@@ -32,6 +31,7 @@
 -1,
 -1,
 -1,
+8,
 -1,
 -1,
 -1,

compiler/i8086/r8086int.inc

@@ -24,13 +24,14 @@
 'ebp',
 'sp',
 'esp',
-'eip',
-'cs',
-'ds',
 'es',
+'cs',
 'ss',
+'ds',
 'fs',
 'gs',
+'flags',
+'eip',
 'dr0',
 'dr1',
 'dr2',
@@ -46,7 +47,6 @@
 'tr5',
 'tr6',
 'tr7',
-'flags',
 'st(0)',
 'st(1)',
 'st(2)',

compiler/i8086/r8086iri.inc

@@ -9,22 +9,22 @@
 15,
 6,
 5,
-38,
 39,
 40,
 41,
+42,
 26,
 7,
 10,
 19,
 9,
-32,
 33,
 34,
 35,
 36,
 37,
-27,
+38,
+28,
 11,
 4,
 22,
@@ -32,13 +32,13 @@
 8,
 20,
 12,
+32,
 25,
-28,
 18,
 24,
-47,
-30,
 31,
+29,
+30,
 57,
 58,
 59,
@@ -49,7 +49,7 @@
 64,
 17,
 23,
-29,
+27,
 56,
 48,
 49,
@@ -59,11 +59,11 @@
 53,
 54,
 55,
-42,
 43,
 44,
 45,
 46,
+47,
 65,
 66,
 67,

compiler/i8086/r8086nasm.inc

@@ -24,13 +24,14 @@
 'ebp',
 'sp',
 'esp',
-'eip',
-'cs',
-'ds',
 'es',
+'cs',
 'ss',
+'ds',
 'fs',
 'gs',
+'flags',
+'eip',
 'dr0',
 'dr1',
 'dr2',
@@ -46,7 +47,6 @@
 'tr5',
 'tr6',
 'tr7',
-'flags',
 'st0',
 'st1',
 'st2',

compiler/i8086/r8086nri.inc

@@ -9,22 +9,22 @@
 15,
 6,
 5,
-38,
 39,
 40,
 41,
+42,
 26,
 7,
 10,
 19,
 9,
-32,
 33,
 34,
 35,
 36,
 37,
-27,
+38,
+28,
 11,
 4,
 22,
@@ -32,13 +32,13 @@
 8,
 20,
 12,
+32,
 25,
-28,
 18,
 24,
-47,
-30,
 31,
+29,
+30,
 57,
 58,
 59,
@@ -49,7 +49,7 @@
 64,
 17,
 23,
-29,
+27,
 56,
 48,
 49,
@@ -59,11 +59,11 @@
 53,
 54,
 55,
-42,
 43,
 44,
 45,
 46,
+47,
 65,
 66,
 67,

compiler/i8086/r8086num.inc

@@ -24,29 +24,29 @@ tregister($01030006),
 tregister($01040006),
 tregister($01030007),
 tregister($01040007),
-tregister($05040000),
+tregister($05000000),
 tregister($05000001),
 tregister($05000002),
 tregister($05000003),
 tregister($05000004),
 tregister($05000005),
 tregister($05000006),
-tregister($05000007),
+tregister($05040007),
 tregister($05000008),
 tregister($05000009),
 tregister($0500000a),
 tregister($0500000b),
-tregister($0500000c),
 tregister($0500000d),
 tregister($0500000e),
-tregister($0500000f),
 tregister($05000010),
-tregister($05000011),
 tregister($05000012),
 tregister($05000013),
 tregister($05000014),
-tregister($05000015),
-tregister($05000016),
+tregister($0500001b),
+tregister($0500001c),
+tregister($0500001d),
+tregister($0500001e),
+tregister($0500001f),
 tregister($02000000),
 tregister($02000001),
 tregister($02000002),

compiler/i8086/r8086op.inc

@@ -1,82 +0,0 @@
-{ don't edit, this file is generated from x86reg.dat }
-0,
-0,
-4,
-0,
-0,
-1,
-5,
-1,
-1,
-2,
-6,
-2,
-2,
-3,
-7,
-3,
-3,
-6,
-6,
-7,
-7,
-5,
-5,
-4,
-4,
-0,
-1,
-3,
-0,
-2,
-4,
-5,
-0,
-1,
-2,
-3,
-6,
-7,
-0,
-2,
-3,
-4,
-3,
-4,
-5,
-6,
-7,
-0,
-0,
-1,
-2,
-3,
-4,
-5,
-6,
-7,
-0,
-0,
-1,
-2,
-3,
-4,
-5,
-6,
-7,
-0,
-1,
-2,
-3,
-4,
-5,
-6,
-7,
-0,
-1,
-2,
-3,
-4,
-5,
-6,
-7

compiler/i8086/r8086ot.inc

@@ -24,13 +24,14 @@ OT_REG16,
 OT_REG32,
 OT_REG16,
 OT_REG32,
-OT_NONE,
-OT_REG_CS,
 OT_REG_DESS,
+OT_REG_CS,
 OT_REG_DESS,
 OT_REG_DESS,
 OT_REG_FSGS,
 OT_REG_FSGS,
+OT_NONE,
+OT_NONE,
 OT_REG_DREG,
 OT_REG_DREG,
 OT_REG_DREG,
@@ -46,7 +47,6 @@ OT_REG_TREG,
 OT_REG_TREG,
 OT_REG_TREG,
 OT_REG_TREG,
-OT_NONE,
 OT_FPU0,
 OT_FPUREG,
 OT_FPUREG,

compiler/i8086/r8086rni.inc

@@ -57,13 +57,13 @@
 78,
 79,
 80,
+25,
 26,
 27,
 28,
 29,
 30,
 31,
-32,
 33,
 34,
 35,
@@ -79,4 +79,4 @@
 45,
 46,
 47,
-25
+32

compiler/i8086/r8086sri.inc

@@ -9,22 +9,22 @@
 15,
 6,
 5,
-38,
 39,
 40,
 41,
+42,
 26,
 7,
 10,
 19,
 9,
-32,
 33,
 34,
 35,
 36,
 37,
-27,
+38,
+28,
 11,
 4,
 22,
@@ -32,13 +32,13 @@
 8,
 20,
 12,
+32,
 25,
-28,
 18,
 24,
-47,
-30,
 31,
+29,
+30,
 57,
 58,
 59,
@@ -49,7 +49,7 @@
 64,
 17,
 23,
-29,
+27,
 56,
 48,
 49,
@@ -59,11 +59,11 @@
 53,
 54,
 55,
-42,
 43,
 44,
 45,
 46,
+47,
 65,
 66,
 67,

compiler/i8086/r8086std.inc

@@ -24,13 +24,14 @@
 'ebp',
 'sp',
 'esp',
-'eip',
-'cs',
-'ds',
 'es',
+'cs',
 'ss',
+'ds',
 'fs',
 'gs',
+'flags',
+'eip',
 'dr0',
 'dr1',
 'dr2',
@@ -46,7 +47,6 @@
 'tr5',
 'tr6',
 'tr7',
-'flags',
 'st(0)',
 'st(1)',
 'st(2)',

compiler/utils/mkx86reg.pp

@@ -308,7 +308,7 @@ end;
 
 procedure write_inc_files;
 
-var attfile,intfile,otfile,opfile,
+var attfile,intfile,otfile,
     norfile,nasmfile,stdfile,
     numfile,stabfile,dwrffile,confile,
     rnifile,irifile,srifile,
@@ -326,7 +326,6 @@ begin
   openinc(stabfile,fileprefix+'stab.inc');
   openinc(dwrffile,fileprefix+'dwrf.inc');
   openinc(otfile,fileprefix+'ot.inc');
-  openinc(opfile,fileprefix+'op.inc');
   openinc(norfile,fileprefix+'nor.inc');
   openinc(rnifile,fileprefix+'rni.inc');
   openinc(srifile,fileprefix+'sri.inc');
@@ -346,7 +345,6 @@ begin
           writeln(stabfile,',');
           writeln(dwrffile,',');
           writeln(otfile,',');
-          writeln(opfile,',');
           writeln(rnifile,',');
           writeln(srifile,',');
           writeln(arifile,',');
@@ -372,7 +370,6 @@ begin
       else
         write(dwrffile,dwarf32[i]);
       write(otfile,ots[i]);
-      write(opfile,ops[i]);
       write(rnifile,regnumber_index[i]);
       write(srifile,std_regname_index[i]);
       write(arifile,att_regname_index[i]);
@@ -389,7 +386,6 @@ begin
   closeinc(stabfile);
   closeinc(dwrffile);
   closeinc(otfile);
-  closeinc(opfile);
   closeinc(norfile);
   closeinc(rnifile);
   closeinc(srifile);

compiler/x86/aasmcpu.pas

@@ -1507,9 +1507,9 @@ implementation
       end;
 
     const
-      segprefixes: array[NR_CS..NR_GS] of Byte=(
-      //cs   ds   es   ss   fs   gs
-        $2E, $3E, $26, $36, $64, $65
+      segprefixes: array[NR_ES..NR_GS] of Byte=(
+      // es  cs   ss   ds   fs   gs
+        $26, $2E, $36, $3E, $64, $65
       );
 
     procedure taicpu.Pass2(objdata:TObjData);
@@ -1519,7 +1519,7 @@ implementation
          exit;
         current_filepos:=fileinfo;
         { Segment override }
-        if (segprefix>=NR_CS) and (segprefix<=NR_GS) then
+        if (segprefix>=NR_ES) and (segprefix<=NR_GS) then
          begin
            objdata.writebytes(segprefixes[segprefix],1);
            { fix the offset for GenNode }
@@ -1552,31 +1552,39 @@ implementation
       end;
 
 
+    procedure badreg(r:Tregister);
+      begin
+        Message1(asmw_e_invalid_register,generic_regname(r));
+      end;
+
+
     function regval(r:Tregister):byte;
       const
-    {$if defined(x86_64)}
-        opcode_table:array[tregisterindex] of tregisterindex = (
-          {$i r8664op.inc}
-        );
-    {$elseif defined(i386)}
-        opcode_table:array[tregisterindex] of tregisterindex = (
-          {$i r386op.inc}
-        );
-    {$elseif defined(i8086)}
-        opcode_table:array[tregisterindex] of tregisterindex = (
-          {$i r8086op.inc}
-        );
-    {$endif}
+        intsupreg2opcode: array[0..7] of byte=
+        // ax cx dx bx si di bp sp   -- in x86reg.dat
+        // ax cx dx bx sp bp si di   -- needed order
+          (0, 1, 2, 3, 6, 7, 5, 4);
+        maxsupreg: array[tregistertype] of tsuperregister=
+{$ifdef x86_64}
+          (0, 16, 9, 8, 16, 32, 0);
+{$else x86_64}
+          (0,  8, 9, 8,  8, 32, 0);
+{$endif x86_64}
       var
-        regidx : tregisterindex;
+        rs: tsuperregister;
+        rt: tregistertype;
       begin
-        regidx:=findreg_by_number(r);
-        if regidx<>0 then
-          result:=opcode_table[regidx]
-        else
+        rs:=getsupreg(r);
+        rt:=getregtype(r);
+        if (rs>=maxsupreg[rt]) then
+          badreg(r);
+        result:=rs and 7;
+        if (rt=R_INTREGISTER) then
           begin
-            Message1(asmw_e_invalid_register,generic_regname(r));
-            result:=0;
+            if (rs<8) then
+              result:=intsupreg2opcode[rs];
+            if getsubreg(r)=R_SUBH then
+              inc(result,4);
           end;
       end;
 

compiler/x86/x86reg.dat

@@ -6,6 +6,14 @@
 ;
 ; For stab/dwarf numbers see gdb/i386-tdep.c and gdb/amd64-tdep.c
 ;
+; NOTE: registers are numbered so that 3 LSB of superregister number matches the opcode.
+; Exceptions are:
+;  - high byte registers (AH/CH/DH/BH)
+;  - NR_FLAGS, NR_EIP and NR_RIP.
+;  - We use order [eax ecx edx ebx esi edi ebp esp], while the correct
+;    one is       [eax ecx edx ebx esp ebp esi edi],
+;    this is due to asm optimizer coding style
+
 NR_NO,$00000000,INVALID,INVALID,INVALID,INVALID,-1,-1,-1,OT_NONE,0
 NR_AL,$01010000,al,%al,al,al,0,0,0,OT_REG_AL,0
 NR_AH,$01020000,ah,%ah,ah,ah,0,0,0,OT_REG8,4
@@ -76,33 +84,33 @@ NR_R15L,$0101000f,r15b,%r15b,r15b,r15b,-1,-1,15,OT_REG8,7,64
 NR_R15W,$0103000f,r15w,%r15w,r15w,r15w,-1,-1,15,OT_REG16,7,64
 NR_R15D,$0104000f,r15d,%r15d,r15d,r15d,-1,-1,15,OT_REG32,7,64
 
-; EIP is needed for DWARF call frame info return address (RA)
-NR_RIP,$05050000,rip,%rip,rip,rip,-1,8,16,OT_NONE,0,64
-NR_EIP,$05040000,eip,%eip,eip,eip,-1,8,16,OT_NONE,0
+NR_ES,$05000000,es,%es,es,es,-1,-1,-1,OT_REG_DESS,0
 NR_CS,$05000001,cs,%cs,cs,cs,-1,-1,-1,OT_REG_CS,1
-NR_DS,$05000002,ds,%ds,ds,ds,-1,-1,-1,OT_REG_DESS,3
-NR_ES,$05000003,es,%es,es,es,-1,-1,-1,OT_REG_DESS,0
-NR_SS,$05000004,ss,%ss,ss,ss,-1,-1,-1,OT_REG_DESS,2
-NR_FS,$05000005,fs,%fs,fs,fs,-1,-1,-1,OT_REG_FSGS,4
-NR_GS,$05000006,gs,%gs,gs,gs,-1,-1,-1,OT_REG_FSGS,5
+NR_SS,$05000002,ss,%ss,ss,ss,-1,-1,-1,OT_REG_DESS,2
+NR_DS,$05000003,ds,%ds,ds,ds,-1,-1,-1,OT_REG_DESS,3
+NR_FS,$05000004,fs,%fs,fs,fs,-1,-1,-1,OT_REG_FSGS,4
+NR_GS,$05000005,gs,%gs,gs,gs,-1,-1,-1,OT_REG_FSGS,5
 
-NR_DR0,$05000007,dr0,%dr0,dr0,dr0,-1,-1,-1,OT_REG_DREG,0
-NR_DR1,$05000008,dr1,%dr1,dr1,dr1,-1,-1,-1,OT_REG_DREG,1
-NR_DR2,$05000009,dr2,%dr2,dr2,dr2,-1,-1,-1,OT_REG_DREG,2
-NR_DR3,$0500000a,dr3,%dr3,dr3,dr3,-1,-1,-1,OT_REG_DREG,3
-NR_DR6,$0500000b,dr6,%dr6,dr6,dr6,-1,-1,-1,OT_REG_DREG,6
-NR_DR7,$0500000c,dr7,%dr7,dr7,dr7,-1,-1,-1,OT_REG_DREG,7
-NR_CR0,$0500000d,cr0,%cr0,cr0,cr0,-1,-1,-1,OT_REG_CREG,0
-NR_CR2,$0500000e,cr2,%cr2,cr2,cr2,-1,-1,-1,OT_REG_CREG,2
-NR_CR3,$0500000f,cr3,%cr3,cr3,cr3,-1,-1,-1,OT_REG_CREG,3
-NR_CR4,$05000010,cr4,%cr4,cr4,cr4,-1,-1,-1,OT_REG_CR4,4
-NR_TR3,$05000011,tr3,%tr3,tr3,tr3,-1,-1,-1,OT_REG_TREG,3
-NR_TR4,$05000012,tr4,%tr4,tr4,tr4,-1,-1,-1,OT_REG_TREG,4
-NR_TR5,$05000013,tr5,%tr5,tr5,tr5,-1,-1,-1,OT_REG_TREG,5
-NR_TR6,$05000014,tr6,%tr6,tr6,tr6,-1,-1,-1,OT_REG_TREG,6
-NR_TR7,$05000015,tr7,%tr7,tr7,tr7,-1,-1,-1,OT_REG_TREG,7
+NR_FLAGS,$05000006,flags,%flags,flags,flags,-1,-1,-1,OT_NONE,0
+; EIP is needed for DWARF call frame info return address (RA)
+NR_RIP,$05050007,rip,%rip,rip,rip,-1,8,16,OT_NONE,0,64
+NR_EIP,$05040007,eip,%eip,eip,eip,-1,8,16,OT_NONE,0
 
-NR_FLAGS,$05000016,flags,%flags,flags,flags,-1,-1,-1,OT_NONE,0
+NR_DR0,$05000008,dr0,%dr0,dr0,dr0,-1,-1,-1,OT_REG_DREG,0
+NR_DR1,$05000009,dr1,%dr1,dr1,dr1,-1,-1,-1,OT_REG_DREG,1
+NR_DR2,$0500000a,dr2,%dr2,dr2,dr2,-1,-1,-1,OT_REG_DREG,2
+NR_DR3,$0500000b,dr3,%dr3,dr3,dr3,-1,-1,-1,OT_REG_DREG,3
+NR_DR6,$0500000d,dr6,%dr6,dr6,dr6,-1,-1,-1,OT_REG_DREG,6
+NR_DR7,$0500000e,dr7,%dr7,dr7,dr7,-1,-1,-1,OT_REG_DREG,7
+NR_CR0,$05000010,cr0,%cr0,cr0,cr0,-1,-1,-1,OT_REG_CREG,0
+NR_CR2,$05000012,cr2,%cr2,cr2,cr2,-1,-1,-1,OT_REG_CREG,2
+NR_CR3,$05000013,cr3,%cr3,cr3,cr3,-1,-1,-1,OT_REG_CREG,3
+NR_CR4,$05000014,cr4,%cr4,cr4,cr4,-1,-1,-1,OT_REG_CR4,4
+NR_TR3,$0500001b,tr3,%tr3,tr3,tr3,-1,-1,-1,OT_REG_TREG,3
+NR_TR4,$0500001c,tr4,%tr4,tr4,tr4,-1,-1,-1,OT_REG_TREG,4
+NR_TR5,$0500001d,tr5,%tr5,tr5,tr5,-1,-1,-1,OT_REG_TREG,5
+NR_TR6,$0500001e,tr6,%tr6,tr6,tr6,-1,-1,-1,OT_REG_TREG,6
+NR_TR7,$0500001f,tr7,%tr7,tr7,tr7,-1,-1,-1,OT_REG_TREG,7
 
 NR_ST0,$02000000,st(0),%st(0),st(0),st0,12,11,33,OT_FPU0,0
 NR_ST1,$02000001,st(1),%st(1),st(1),st1,13,12,34,OT_FPUREG,1

compiler/x86_64/r8664ari.inc

@@ -9,22 +9,22 @@
 18,
 7,
 6,
-83,
 84,
 85,
 86,
-71,
+87,
+70,
 8,
 12,
 26,
 25,
 11,
-77,
 78,
 79,
 80,
 81,
 82,
+83,
 72,
 13,
 4,
@@ -33,13 +33,13 @@
 9,
 27,
 14,
-70,
-73,
+77,
+69,
 23,
 35,
-92,
 75,
-76,
+73,
+74,
 102,
 103,
 104,
@@ -86,14 +86,14 @@
 10,
 28,
 15,
-69,
+76,
 24,
 36,
 22,
 21,
 34,
 33,
-74,
+71,
 101,
 93,
 94,
@@ -103,11 +103,11 @@
 98,
 99,
 100,
-87,
 88,
 89,
 90,
 91,
+92,
 110,
 111,
 120,

compiler/x86_64/r8664att.inc

@@ -68,14 +68,15 @@
 '%r15b',
 '%r15w',
 '%r15d',
-'%rip',
-'%eip',
-'%cs',
-'%ds',
 '%es',
+'%cs',
 '%ss',
+'%ds',
 '%fs',
 '%gs',
+'%flags',
+'%rip',
+'%eip',
 '%dr0',
 '%dr1',
 '%dr2',
@@ -91,7 +92,6 @@
 '%tr5',
 '%tr6',
 '%tr7',
-'%flags',
 '%st(0)',
 '%st(1)',
 '%st(2)',

compiler/x86_64/r8664con.inc

@@ -68,30 +68,30 @@ NR_R15 = tregister($0105000f);
 NR_R15L = tregister($0101000f);
 NR_R15W = tregister($0103000f);
 NR_R15D = tregister($0104000f);
-NR_RIP = tregister($05050000);
-NR_EIP = tregister($05040000);
+NR_ES = tregister($05000000);
 NR_CS = tregister($05000001);
-NR_DS = tregister($05000002);
-NR_ES = tregister($05000003);
-NR_SS = tregister($05000004);
-NR_FS = tregister($05000005);
-NR_GS = tregister($05000006);
-NR_DR0 = tregister($05000007);
-NR_DR1 = tregister($05000008);
-NR_DR2 = tregister($05000009);
-NR_DR3 = tregister($0500000a);
-NR_DR6 = tregister($0500000b);
-NR_DR7 = tregister($0500000c);
-NR_CR0 = tregister($0500000d);
-NR_CR2 = tregister($0500000e);
-NR_CR3 = tregister($0500000f);
-NR_CR4 = tregister($05000010);
-NR_TR3 = tregister($05000011);
-NR_TR4 = tregister($05000012);
-NR_TR5 = tregister($05000013);
-NR_TR6 = tregister($05000014);
-NR_TR7 = tregister($05000015);
-NR_FLAGS = tregister($05000016);
+NR_SS = tregister($05000002);
+NR_DS = tregister($05000003);
+NR_FS = tregister($05000004);
+NR_GS = tregister($05000005);
+NR_FLAGS = tregister($05000006);
+NR_RIP = tregister($05050007);
+NR_EIP = tregister($05040007);
+NR_DR0 = tregister($05000008);
+NR_DR1 = tregister($05000009);
+NR_DR2 = tregister($0500000a);
+NR_DR3 = tregister($0500000b);
+NR_DR6 = tregister($0500000d);
+NR_DR7 = tregister($0500000e);
+NR_CR0 = tregister($05000010);
+NR_CR2 = tregister($05000012);
+NR_CR3 = tregister($05000013);
+NR_CR4 = tregister($05000014);
+NR_TR3 = tregister($0500001b);
+NR_TR4 = tregister($0500001c);
+NR_TR5 = tregister($0500001d);
+NR_TR6 = tregister($0500001e);
+NR_TR7 = tregister($0500001f);
 NR_ST0 = tregister($02000000);
 NR_ST1 = tregister($02000001);
 NR_ST2 = tregister($02000002);

compiler/x86_64/r8664dwrf.inc

@@ -68,8 +68,6 @@
 15,
 15,
 15,
-16,
-16,
 -1,
 -1,
 -1,
@@ -77,6 +75,8 @@
 -1,
 -1,
 -1,
+16,
+16,
 -1,
 -1,
 -1,

compiler/x86_64/r8664int.inc

@@ -68,14 +68,15 @@
 'r15b',
 'r15w',
 'r15d',
-'rip',
-'eip',
-'cs',
-'ds',
 'es',
+'cs',
 'ss',
+'ds',
 'fs',
 'gs',
+'flags',
+'rip',
+'eip',
 'dr0',
 'dr1',
 'dr2',
@@ -91,7 +92,6 @@
 'tr5',
 'tr6',
 'tr7',
-'flags',
 'st(0)',
 'st(1)',
 'st(2)',

compiler/x86_64/r8664iri.inc

@@ -10,22 +10,22 @@
 18,
 7,
 6,
-83,
 84,
 85,
 86,
-71,
+87,
+70,
 8,
 12,
 26,
 25,
 11,
-77,
 78,
 79,
 80,
 81,
 82,
+83,
 72,
 13,
 4,
@@ -34,13 +34,13 @@
 9,
 27,
 14,
-70,
-73,
+77,
+69,
 23,
 35,
-92,
 75,
-76,
+73,
+74,
 102,
 103,
 104,
@@ -87,14 +87,14 @@
 10,
 28,
 15,
-69,
+76,
 24,
 36,
 22,
 21,
 34,
 33,
-74,
+71,
 101,
 93,
 94,
@@ -104,11 +104,11 @@
 98,
 99,
 100,
-87,
 88,
 89,
 90,
 91,
+92,
 110,
 111,
 120,

compiler/x86_64/r8664num.inc

@@ -68,30 +68,30 @@ tregister($0105000f),
 tregister($0101000f),
 tregister($0103000f),
 tregister($0104000f),
-tregister($05050000),
-tregister($05040000),
+tregister($05000000),
 tregister($05000001),
 tregister($05000002),
 tregister($05000003),
 tregister($05000004),
 tregister($05000005),
 tregister($05000006),
-tregister($05000007),
+tregister($05050007),
+tregister($05040007),
 tregister($05000008),
 tregister($05000009),
 tregister($0500000a),
 tregister($0500000b),
-tregister($0500000c),
 tregister($0500000d),
 tregister($0500000e),
-tregister($0500000f),
 tregister($05000010),
-tregister($05000011),
 tregister($05000012),
 tregister($05000013),
 tregister($05000014),
-tregister($05000015),
-tregister($05000016),
+tregister($0500001b),
+tregister($0500001c),
+tregister($0500001d),
+tregister($0500001e),
+tregister($0500001f),
 tregister($02000000),
 tregister($02000001),
 tregister($02000002),

compiler/x86_64/r8664op.inc

@@ -1,143 +0,0 @@
-{ don't edit, this file is generated from x86reg.dat }
-0,
-0,
-4,
-0,
-0,
-0,
-1,
-5,
-1,
-1,
-1,
-2,
-6,
-2,
-2,
-2,
-3,
-7,
-3,
-3,
-3,
-6,
-6,
-6,
-6,
-7,
-7,
-7,
-7,
-5,
-5,
-5,
-5,
-4,
-4,
-4,
-4,
-0,
-0,
-0,
-0,
-1,
-1,
-1,
-1,
-2,
-2,
-2,
-2,
-3,
-3,
-3,
-3,
-4,
-4,
-4,
-4,
-5,
-5,
-5,
-5,
-6,
-6,
-6,
-6,
-7,
-7,
-7,
-7,
-0,
-0,
-1,
-3,
-0,
-2,
-4,
-5,
-0,
-1,
-2,
-3,
-6,
-7,
-0,
-2,
-3,
-4,
-3,
-4,
-5,
-6,
-7,
-0,
-0,
-1,
-2,
-3,
-4,
-5,
-6,
-7,
-0,
-0,
-1,
-2,
-3,
-4,
-5,
-6,
-7,
-0,
-1,
-2,
-3,
-4,
-5,
-6,
-7,
-0,
-1,
-2,
-3,
-4,
-5,
-6,
-7,
-0,
-1,
-2,
-3,
-4,
-5,
-6,
-7,
-0,
-1,
-2,
-3,
-4,
-5,
-6,
-7

compiler/x86_64/r8664ot.inc

@@ -68,14 +68,15 @@ OT_REG64,
 OT_REG8,
 OT_REG16,
 OT_REG32,
-OT_NONE,
-OT_NONE,
-OT_REG_CS,
 OT_REG_DESS,
+OT_REG_CS,
 OT_REG_DESS,
 OT_REG_DESS,
 OT_REG_FSGS,
 OT_REG_FSGS,
+OT_NONE,
+OT_NONE,
+OT_NONE,
 OT_REG_DREG,
 OT_REG_DREG,
 OT_REG_DREG,
@@ -91,7 +92,6 @@ OT_REG_TREG,
 OT_REG_TREG,
 OT_REG_TREG,
 OT_REG_TREG,
-OT_NONE,
 OT_FPU0,
 OT_FPUREG,
 OT_FPUREG,

compiler/x86_64/r8664rni.inc

@@ -117,13 +117,13 @@
 139,
 140,
 141,
+69,
+70,
 71,
 72,
 73,
 74,
 75,
-76,
-77,
 78,
 79,
 80,
@@ -139,5 +139,5 @@
 90,
 91,
 92,
-70,
-69
+77,
+76

compiler/x86_64/r8664sri.inc

@@ -10,22 +10,22 @@
 18,
 7,
 6,
-83,
 84,
 85,
 86,
-71,
+87,
+70,
 8,
 12,
 26,
 25,
 11,
-77,
 78,
 79,
 80,
 81,
 82,
+83,
 72,
 13,
 4,
@@ -34,13 +34,13 @@
 9,
 27,
 14,
-70,
-73,
+77,
+69,
 23,
 35,
-92,
 75,
-76,
+73,
+74,
 102,
 103,
 104,
@@ -87,14 +87,14 @@
 10,
 28,
 15,
-69,
+76,
 24,
 36,
 22,
 21,
 34,
 33,
-74,
+71,
 101,
 93,
 94,
@@ -104,11 +104,11 @@
 98,
 99,
 100,
-87,
 88,
 89,
 90,
 91,
+92,
 110,
 111,
 120,

compiler/x86_64/r8664stab.inc

@@ -68,8 +68,6 @@
 15,
 15,
 15,
-16,
-16,
 -1,
 -1,
 -1,
@@ -77,6 +75,8 @@
 -1,
 -1,
 -1,
+16,
+16,
 -1,
 -1,
 -1,

compiler/x86_64/r8664std.inc

@@ -68,14 +68,15 @@
 'r15b',
 'r15w',
 'r15d',
-'rip',
-'eip',
-'cs',
-'ds',
 'es',
+'cs',
 'ss',
+'ds',
 'fs',
 'gs',
+'flags',
+'rip',
+'eip',
 'dr0',
 'dr1',
 'dr2',
@@ -91,7 +92,6 @@
 'tr5',
 'tr6',
 'tr7',
-'flags',
 'st(0)',
 'st(1)',
 'st(2)',