* fixed <instr> reg,reg with regs>=r8

* fixed section naming
* fixed relocations

git-svn-id: trunk@3041 -

compiler/ogbase.pas

@@ -42,7 +42,11 @@ interface
       TExeSection = class;
       TExeSymbol  = class;
 
-      TObjRelocationType = (RELOC_ABSOLUTE,RELOC_RELATIVE,RELOC_RVA);
+      TObjRelocationType = (RELOC_ABSOLUTE,RELOC_RELATIVE,RELOC_RVA
+{$ifdef x86_64}
+        ,RELOC_ABSOLUTE32
+{$endif x86_64}
+      );
 
       TObjSectionOption = (
        { Has data available in the file }
@@ -353,6 +357,11 @@ interface
       end;
       TExeOutputClass=class of TExeOutput;
 
+{$ifdef i386}
+    const
+      RELOC_ABSOLUTE32 = RELOC_ABSOLUTE;
+{$endif i386}
+
     var
       exeoutput : TExeOutput;
 

compiler/ogelf.pas

@@ -725,7 +725,7 @@ implementation
 {$ifdef i386}
            s.relocsect:=TElfObjSection.create_ext('.rel'+s.name,SHT_REL,0,symtabsect.secshidx,s.secshidx,4,sizeof(TElfReloc));
 {$else i386}
-           s.relocsect:=TElfObjSection.create_ext('.rel'+s.name,SHT_RELA,0,symtabsect.secshidx,s.secshidx,4,sizeof(TElfReloc));
+           s.relocsect:=TElfObjSection.create_ext('.rela'+s.name,SHT_RELA,0,symtabsect.secshidx,s.secshidx,4,sizeof(TElfReloc));
 {$endif i386}
            { add the relocations }
            r:=TObjRelocation(s.relocations.first);
@@ -779,8 +779,16 @@ implementation
                     { length of the relocated location is handled here }
                     rel.addend:=qword(-4);
                   end;
-              RELOC_ABSOLUTE :
-                  reltyp:=R_X86_64_64;
+                RELOC_ABSOLUTE :
+                  begin
+                    reltyp:=R_X86_64_64;
+                    rel.addend:=0;
+                  end;
+                RELOC_ABSOLUTE32 :
+                  begin
+                    reltyp:=R_X86_64_32S;
+                    rel.addend:=0;
+                  end;
                 else
                   internalerror(200602261);
               end;

compiler/x86/aasmcpu.pas

@@ -1428,7 +1428,7 @@ implementation
               (getsupreg(input.reg)>=RS_XMM8)) then
               begin
                 output.rex_present:=true;
-                output.rex:=output.rex or $44;
+                output.rex:=output.rex or $41;
                 inc(output.size,1);
               end;
 
@@ -1850,6 +1850,7 @@ implementation
                           begin
                             if rex=0 then
                               inc(len);
+
                             rex:=rex or $44;
                           end;
                       end;
@@ -2124,16 +2125,16 @@ implementation
                 else
                   begin
                     if assigned(currsym) then
-                     objdata.writereloc(currval,4,currsym,RELOC_ABSOLUTE)
+                      objdata.writereloc(currval,4,currsym,RELOC_ABSOLUTE32)
                     else
-                     objdata.writebytes(currval,4);
+                      objdata.writebytes(currval,4);
                   end
               end;
             32,33,34 :
               begin
                 getvalsym(c-32);
                 if assigned(currsym) then
-                 objdata.writereloc(currval,4,currsym,RELOC_ABSOLUTE)
+                 objdata.writereloc(currval,4,currsym,RELOC_ABSOLUTE32)
                 else
                  objdata.writebytes(currval,4);
               end;
@@ -2153,7 +2154,7 @@ implementation
                 if assigned(currsym) then
                  objdata.writereloc(currval,4,currsym,RELOC_RELATIVE)
                 else
-                 objdata.writereloc(currval-insend,4,nil,RELOC_ABSOLUTE)
+                 objdata.writereloc(currval-insend,4,nil,RELOC_ABSOLUTE32)
               end;
             56,57,58 :
               begin
@@ -2161,7 +2162,7 @@ implementation
                 if assigned(currsym) then
                  objdata.writereloc(currval,4,currsym,RELOC_RELATIVE)
                 else
-                 objdata.writereloc(currval-insend,4,nil,RELOC_ABSOLUTE)
+                 objdata.writereloc(currval-insend,4,nil,RELOC_ABSOLUTE32)
               end;
             192,193,194 :
               begin
@@ -2284,7 +2285,7 @@ implementation
                          if (oper[opidx]^.ot and OT_MEMORY)=OT_MEMORY then
                            begin
                              currsym:=objdata.symbolref(oper[opidx]^.ref^.symbol);
-                             objdata.writereloc(oper[opidx]^.ref^.offset,1,currsym,RELOC_ABSOLUTE)
+                             objdata.writereloc(oper[opidx]^.ref^.offset,1,currsym,RELOC_ABSOLUTE);
                            end
                          else
                           begin
@@ -2296,7 +2297,7 @@ implementation
                      2,4 :
                        begin
                          objdata.writereloc(oper[opidx]^.ref^.offset,ea_data.bytes,
-                           objdata.symbolref(oper[opidx]^.ref^.symbol),RELOC_ABSOLUTE);
+                           objdata.symbolref(oper[opidx]^.ref^.symbol),RELOC_ABSOLUTE32);
                          inc(s,ea_data.bytes);
                        end;
                    end;

compiler/x86/x86reg.dat

@@ -47,34 +47,34 @@ NR_R8,$01050008,r8,%r8,r8,r8,-1,-1,8,OT_REG64,0,64
 NR_R8L,$01010008,r8b,%r8b,r8b,r8b,-1,-1,8,OT_REG8,0,64
 NR_R8W,$01030008,r8w,%r8w,r8w,r8w,-1,-1,8,OT_REG16,0,64
 NR_R8D,$01040008,r8d,%r8d,r8d,r8d,-1,-1,8,OT_REG32,0,64
-NR_R9,$01050009,r9,%r9,r9,r9,-1,-1,9,OT_REG64,0,64
-NR_R9L,$01010009,r9b,%r9b,r9b,r9b,-1,-1,9,OT_REG8,0,64
-NR_R9W,$01030009,r9w,%r9w,r9w,r9w,-1,-1,9,OT_REG16,0,64
-NR_R9D,$01040009,r9d,%r9d,r9d,r9d,-1,-1,9,OT_REG32,0,64
-NR_R10,$0105000a,r10,%r10,r10,r10,-1,-1,10,OT_REG64,0,64
-NR_R10L,$0101000a,r10b,%r10b,r10b,r10b,-1,-1,10,OT_REG8,0,64
-NR_R10W,$0103000a,r10w,%r10w,r10w,r10w,-1,-1,10,OT_REG16,0,64
-NR_R10D,$0104000a,r10d,%r10d,r10d,r10d,-1,-1,10,OT_REG32,0,64
-NR_R11,$0105000b,r11,%r11,r11,r11,-1,-1,11,OT_REG64,0,64
-NR_R11L,$0101000b,r11b,%r11b,r11b,r11b,-1,-1,11,OT_REG8,0,64
-NR_R11W,$0103000b,r11w,%r11w,r11w,r11w,-1,-1,11,OT_REG16,0,64
-NR_R11D,$0104000b,r11d,%r11d,r11d,r11d,-1,-1,11,OT_REG32,0,64
-NR_R12,$0105000c,r12,%r12,r12,r12,-1,-1,12,OT_REG64,0,64
-NR_R12L,$0101000c,r12b,%r12b,r12b,r12b,-1,-1,12,OT_REG8,0,64
-NR_R12W,$0103000c,r12w,%r12w,r12w,r12w,-1,-1,12,OT_REG16,0,64
-NR_R12D,$0104000c,r12d,%r12d,r12d,r12d,-1,-1,12,OT_REG32,0,64
-NR_R13,$0105000d,r13,%r13,r13,r13,-1,-1,13,OT_REG64,0,64
-NR_R13L,$0101000d,r13b,%r13b,r13b,r13b,-1,-1,13,OT_REG8,0,64
-NR_R13W,$0103000d,r13w,%r13w,r13w,r13w,-1,-1,13,OT_REG16,0,64
-NR_R13D,$0104000d,r13d,%r13d,r13d,r13d,-1,-1,13,OT_REG32,0,64
-NR_R14,$0105000e,r14,%r14,r14,r14,-1,-1,14,OT_REG64,0,64
-NR_R14L,$0101000e,r14b,%r14b,r14b,r14b,-1,-1,14,OT_REG8,0,64
-NR_R14W,$0103000e,r14w,%r14w,r14w,r14w,-1,-1,14,OT_REG16,0,64
-NR_R14D,$0104000e,r14d,%r14d,r14d,r14d,-1,-1,14,OT_REG32,0,64
-NR_R15,$0105000f,r15,%r15,r15,r15,-1,-1,15,OT_REG64,0,64
-NR_R15L,$0101000f,r15b,%r15b,r15b,r15b,-1,-1,15,OT_REG8,0,64
-NR_R15W,$0103000f,r15w,%r15w,r15w,r15w,-1,-1,15,OT_REG16,0,64
-NR_R15D,$0104000f,r15d,%r15d,r15d,r15d,-1,-1,15,OT_REG32,0,64
+NR_R9,$01050009,r9,%r9,r9,r9,-1,-1,9,OT_REG64,1,64
+NR_R9L,$01010009,r9b,%r9b,r9b,r9b,-1,-1,9,OT_REG8,1,64
+NR_R9W,$01030009,r9w,%r9w,r9w,r9w,-1,-1,9,OT_REG16,1,64
+NR_R9D,$01040009,r9d,%r9d,r9d,r9d,-1,-1,9,OT_REG32,1,64
+NR_R10,$0105000a,r10,%r10,r10,r10,-1,-1,10,OT_REG64,2,64
+NR_R10L,$0101000a,r10b,%r10b,r10b,r10b,-1,-1,10,OT_REG8,2,64
+NR_R10W,$0103000a,r10w,%r10w,r10w,r10w,-1,-1,10,OT_REG16,2,64
+NR_R10D,$0104000a,r10d,%r10d,r10d,r10d,-1,-1,10,OT_REG32,2,64
+NR_R11,$0105000b,r11,%r11,r11,r11,-1,-1,11,OT_REG64,3,64
+NR_R11L,$0101000b,r11b,%r11b,r11b,r11b,-1,-1,11,OT_REG8,3,64
+NR_R11W,$0103000b,r11w,%r11w,r11w,r11w,-1,-1,11,OT_REG16,3,64
+NR_R11D,$0104000b,r11d,%r11d,r11d,r11d,-1,-1,11,OT_REG32,3,64
+NR_R12,$0105000c,r12,%r12,r12,r12,-1,-1,12,OT_REG64,4,64
+NR_R12L,$0101000c,r12b,%r12b,r12b,r12b,-1,-1,12,OT_REG8,4,64
+NR_R12W,$0103000c,r12w,%r12w,r12w,r12w,-1,-1,12,OT_REG16,4,64
+NR_R12D,$0104000c,r12d,%r12d,r12d,r12d,-1,-1,12,OT_REG32,4,64
+NR_R13,$0105000d,r13,%r13,r13,r13,-1,-1,13,OT_REG64,5,64
+NR_R13L,$0101000d,r13b,%r13b,r13b,r13b,-1,-1,13,OT_REG8,5,64
+NR_R13W,$0103000d,r13w,%r13w,r13w,r13w,-1,-1,13,OT_REG16,5,64
+NR_R13D,$0104000d,r13d,%r13d,r13d,r13d,-1,-1,13,OT_REG32,5,64
+NR_R14,$0105000e,r14,%r14,r14,r14,-1,-1,14,OT_REG64,6,64
+NR_R14L,$0101000e,r14b,%r14b,r14b,r14b,-1,-1,14,OT_REG8,6,64
+NR_R14W,$0103000e,r14w,%r14w,r14w,r14w,-1,-1,14,OT_REG16,6,64
+NR_R14D,$0104000e,r14d,%r14d,r14d,r14d,-1,-1,14,OT_REG32,6,64
+NR_R15,$0105000f,r15,%r15,r15,r15,-1,-1,15,OT_REG64,7,64
+NR_R15L,$0101000f,r15b,%r15b,r15b,r15b,-1,-1,15,OT_REG8,7,64
+NR_R15W,$0103000f,r15w,%r15w,r15w,r15w,-1,-1,15,OT_REG16,7,64
+NR_R15D,$0104000f,r15d,%r15d,r15d,r15d,-1,-1,15,OT_REG32,7,64
 
 ; EIP is needed for DWARF call frame info return address (RA)
 NR_RIP,$05000000,rip,%rip,rip,rip,-1,8,16,OT_NONE,0,64

compiler/x86_64/r8664op.inc

@@ -40,34 +40,34 @@
 0,
 0,
 0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
-0,
+1,
+1,
+1,
+1,
+2,
+2,
+2,
+2,
+3,
+3,
+3,
+3,
+4,
+4,
+4,
+4,
+5,
+5,
+5,
+5,
+6,
+6,
+6,
+6,
+7,
+7,
+7,
+7,
 0,
 0,
 1,