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@@ -1085,9 +1085,9 @@ Begin
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Reg := Reg32(Reg);
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Counter := 0;
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Repeat
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- Case Pai386(p1)^.oper[Counter].typ Of
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- Top_Reg: TmpResult := Reg = Reg32(Pai386(p1)^.oper[Counter].reg);
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- Top_Ref: TmpResult := RegInRef(Reg, Pai386(p1)^.oper[Counter].ref^);
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+ Case Paicpu(p1)^.oper[Counter].typ Of
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+ Top_Reg: TmpResult := Reg = Reg32(Paicpu(p1)^.oper[Counter].reg);
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+ Top_Ref: TmpResult := RegInRef(Reg, Paicpu(p1)^.oper[Counter].ref^);
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End;
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Inc(Counter)
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Until (Counter = 3) or TmpResult;
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@@ -1308,19 +1308,19 @@ Begin
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(Counter <= Content.NrOfMods) Do
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Begin
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If (p^.typ = ait_instruction) and
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- ((Pai386(p)^.opcode = A_MOV) or
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- (Pai386(p)^.opcode = A_MOVZX) or
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- (Pai386(p)^.opcode = A_MOVSX))
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+ ((Paicpu(p)^.opcode = A_MOV) or
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+ (Paicpu(p)^.opcode = A_MOVZX) or
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+ (Paicpu(p)^.opcode = A_MOVSX))
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Then
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Begin
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- If (Pai386(p)^.oper[0].typ = top_ref) Then
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- With Pai386(p)^.oper[0].ref^ Do
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+ If (Paicpu(p)^.oper[0].typ = top_ref) Then
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+ With Paicpu(p)^.oper[0].ref^ Do
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If (Base = ProcInfo.FramePointer) And
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(Index = R_NO)
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Then
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Begin
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- RegsChecked := RegsChecked + [Reg32(Pai386(p)^.oper[1].reg)];
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- If Reg = Reg32(Pai386(p)^.oper[1].reg) Then
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+ RegsChecked := RegsChecked + [Reg32(Paicpu(p)^.oper[1].reg)];
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+ If Reg = Reg32(Paicpu(p)^.oper[1].reg) Then
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Break;
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End
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Else
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@@ -1381,12 +1381,12 @@ End;
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Begin
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If (p^.typ = ait_instruction) Then
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Begin
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- Case Pai386(p)^.oper[0].typ Of
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+ Case Paicpu(p)^.oper[0].typ Of
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top_reg:
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- If Not(Pai386(p)^.oper[0].reg in [R_NO,R_ESP,ProcInfo.FramePointer]) Then
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- RegSet := RegSet + [Pai386(p)^.oper[0].reg];
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+ If Not(Paicpu(p)^.oper[0].reg in [R_NO,R_ESP,ProcInfo.FramePointer]) Then
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+ RegSet := RegSet + [Paicpu(p)^.oper[0].reg];
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top_ref:
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- With TReference(Pai386(p)^.oper[0]^) Do
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+ With TReference(Paicpu(p)^.oper[0]^) Do
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Begin
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If Not(Base in [ProcInfo.FramePointer,R_NO,R_ESP])
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Then RegSet := RegSet + [Base];
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@@ -1394,12 +1394,12 @@ Begin
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Then RegSet := RegSet + [Index];
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End;
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End;
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- Case Pai386(p)^.oper[1].typ Of
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+ Case Paicpu(p)^.oper[1].typ Of
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top_reg:
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- If Not(Pai386(p)^.oper[1].reg in [R_NO,R_ESP,ProcInfo.FramePointer]) Then
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- If RegSet := RegSet + [TRegister(TwoWords(Pai386(p)^.oper[1]).Word1];
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+ If Not(Paicpu(p)^.oper[1].reg in [R_NO,R_ESP,ProcInfo.FramePointer]) Then
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+ If RegSet := RegSet + [TRegister(TwoWords(Paicpu(p)^.oper[1]).Word1];
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top_ref:
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- With TReference(Pai386(p)^.oper[1]^) Do
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+ With TReference(Paicpu(p)^.oper[1]^) Do
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Begin
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If Not(Base in [ProcInfo.FramePointer,R_NO,R_ESP])
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Then RegSet := RegSet + [Base];
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@@ -1449,31 +1449,31 @@ Function InstructionsEquivalent(p1, p2: Pai; Var RegInfo: TRegInfo): Boolean;
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{$ifdef csdebug}
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var hp: pai;
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{$endif csdebug}
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-Begin {checks whether two Pai386 instructions are equal}
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+Begin {checks whether two Paicpu instructions are equal}
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If Assigned(p1) And Assigned(p2) And
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(Pai(p1)^.typ = ait_instruction) And
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(Pai(p1)^.typ = ait_instruction) And
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- (Pai386(p1)^.opcode = Pai386(p2)^.opcode) And
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- (Pai386(p1)^.oper[0].typ = Pai386(p2)^.oper[0].typ) And
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- (Pai386(p1)^.oper[1].typ = Pai386(p2)^.oper[1].typ) And
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- (Pai386(p1)^.oper[2].typ = Pai386(p2)^.oper[2].typ)
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+ (Paicpu(p1)^.opcode = Paicpu(p2)^.opcode) And
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+ (Paicpu(p1)^.oper[0].typ = Paicpu(p2)^.oper[0].typ) And
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+ (Paicpu(p1)^.oper[1].typ = Paicpu(p2)^.oper[1].typ) And
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+ (Paicpu(p1)^.oper[2].typ = Paicpu(p2)^.oper[2].typ)
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Then
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{both instructions have the same structure:
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"<operator> <operand of type1>, <operand of type 2>"}
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- If ((Pai386(p1)^.opcode = A_MOV) or
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- (Pai386(p1)^.opcode = A_MOVZX) or
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- (Pai386(p1)^.opcode = A_MOVSX)) And
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- (Pai386(p1)^.oper[0].typ = top_ref) {then .oper[1]t = top_reg} Then
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- If Not(RegInRef(Pai386(p1)^.oper[1].reg, Pai386(p1)^.oper[0].ref^)) Then
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+ If ((Paicpu(p1)^.opcode = A_MOV) or
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+ (Paicpu(p1)^.opcode = A_MOVZX) or
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+ (Paicpu(p1)^.opcode = A_MOVSX)) And
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+ (Paicpu(p1)^.oper[0].typ = top_ref) {then .oper[1]t = top_reg} Then
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+ If Not(RegInRef(Paicpu(p1)^.oper[1].reg, Paicpu(p1)^.oper[0].ref^)) Then
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{the "old" instruction is a load of a register with a new value, not with
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a value based on the contents of this register (so no "mov (reg), reg")}
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- If Not(RegInRef(Pai386(p2)^.oper[1].reg, Pai386(p2)^.oper[0].ref^)) And
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- RefsEqual(Pai386(p1)^.oper[0].ref^, Pai386(p2)^.oper[0].ref^)
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+ If Not(RegInRef(Paicpu(p2)^.oper[1].reg, Paicpu(p2)^.oper[0].ref^)) And
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+ RefsEqual(Paicpu(p1)^.oper[0].ref^, Paicpu(p2)^.oper[0].ref^)
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Then
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{the "new" instruction is also a load of a register with a new value, and
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this value is fetched from the same memory location}
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Begin
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- With Pai386(p2)^.oper[0].ref^ Do
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+ With Paicpu(p2)^.oper[0].ref^ Do
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Begin
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If Not(Base in [ProcInfo.FramePointer, R_NO, R_ESP])
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{it won't do any harm if the register is already in RegsLoadedForRef}
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@@ -1484,10 +1484,10 @@ Begin {checks whether two Pai386 instructions are equal}
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{add the registers from the reference (.oper[0]) to the RegInfo, all registers
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from the reference are the same in the old and in the new instruction
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sequence}
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- AddOp2RegInfo(Pai386(p1)^.oper[0], RegInfo);
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+ AddOp2RegInfo(Paicpu(p1)^.oper[0], RegInfo);
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{the registers from .oper[1] have to be equivalent, but not necessarily equal}
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InstructionsEquivalent :=
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- RegsEquivalent(Pai386(p1)^.oper[1].reg, Pai386(p2)^.oper[1].reg, RegInfo, OpAct_Write);
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+ RegsEquivalent(Paicpu(p1)^.oper[1].reg, Paicpu(p2)^.oper[1].reg, RegInfo, OpAct_Write);
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End
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{the registers are loaded with values from different memory locations. If
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this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
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@@ -1496,10 +1496,10 @@ Begin {checks whether two Pai386 instructions are equal}
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Else
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{load register with a value based on the current value of this register}
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Begin
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- With Pai386(p2)^.oper[0].ref^ Do
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+ With Paicpu(p2)^.oper[0].ref^ Do
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Begin
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If Not(Base in [ProcInfo.FramePointer,
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- Reg32(Pai386(p2)^.oper[1].reg),R_NO,R_ESP])
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+ Reg32(Paicpu(p2)^.oper[1].reg),R_NO,R_ESP])
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{it won't do any harm if the register is already in RegsLoadedForRef}
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Then
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Begin
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@@ -1509,7 +1509,7 @@ Begin {checks whether two Pai386 instructions are equal}
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{$endif csdebug}
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end;
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If Not(Index in [ProcInfo.FramePointer,
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- Reg32(Pai386(p2)^.oper[1].reg),R_NO,R_ESP])
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+ Reg32(Paicpu(p2)^.oper[1].reg),R_NO,R_ESP])
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Then
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Begin
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RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef + [Index];
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@@ -1519,18 +1519,18 @@ Begin {checks whether two Pai386 instructions are equal}
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end;
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End;
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- If Not(Reg32(Pai386(p2)^.oper[1].reg) In [ProcInfo.FramePointer,R_NO,R_ESP])
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+ If Not(Reg32(Paicpu(p2)^.oper[1].reg) In [ProcInfo.FramePointer,R_NO,R_ESP])
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Then
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Begin
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RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
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- [Reg32(Pai386(p2)^.oper[1].reg)];
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+ [Reg32(Paicpu(p2)^.oper[1].reg)];
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{$ifdef csdebug}
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- Writeln(att_reg2str[Reg32(Pai386(p2)^.oper[1].reg)], ' removed');
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+ Writeln(att_reg2str[Reg32(Paicpu(p2)^.oper[1].reg)], ' removed');
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{$endif csdebug}
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end;
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InstructionsEquivalent :=
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- OpsEquivalent(Pai386(p1)^.oper[0], Pai386(p2)^.oper[0], RegInfo, OpAct_Read) And
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- OpsEquivalent(Pai386(p1)^.oper[1], Pai386(p2)^.oper[1], RegInfo, OpAct_Write)
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+ OpsEquivalent(Paicpu(p1)^.oper[0], Paicpu(p2)^.oper[0], RegInfo, OpAct_Read) And
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+ OpsEquivalent(Paicpu(p1)^.oper[1], Paicpu(p2)^.oper[1], RegInfo, OpAct_Write)
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End
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Else
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{an instruction <> mov, movzx, movsx}
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@@ -1543,9 +1543,9 @@ Begin {checks whether two Pai386 instructions are equal}
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p2^.next := hp;
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{$endif csdebug}
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InstructionsEquivalent :=
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- OpsEquivalent(Pai386(p1)^.oper[0], Pai386(p2)^.oper[0], RegInfo, OpAct_Unknown) And
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- OpsEquivalent(Pai386(p1)^.oper[1], Pai386(p2)^.oper[1], RegInfo, OpAct_Unknown) And
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- OpsEquivalent(Pai386(p1)^.oper[2], Pai386(p2)^.oper[2], RegInfo, OpAct_Unknown)
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+ OpsEquivalent(Paicpu(p1)^.oper[0], Paicpu(p2)^.oper[0], RegInfo, OpAct_Unknown) And
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+ OpsEquivalent(Paicpu(p1)^.oper[1], Paicpu(p2)^.oper[1], RegInfo, OpAct_Unknown) And
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+ OpsEquivalent(Paicpu(p1)^.oper[2], Paicpu(p2)^.oper[2], RegInfo, OpAct_Unknown)
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end
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{the instructions haven't even got the same structure, so they're certainly
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not equivalent}
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@@ -1571,16 +1571,16 @@ End;
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(*
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Function InstructionsEqual(p1, p2: Pai): Boolean;
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-Begin {checks whether two Pai386 instructions are equal}
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+Begin {checks whether two Paicpu instructions are equal}
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InstructionsEqual :=
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Assigned(p1) And Assigned(p2) And
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((Pai(p1)^.typ = ait_instruction) And
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(Pai(p1)^.typ = ait_instruction) And
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- (Pai386(p1)^.opcode = Pai386(p2)^.opcode) And
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- (Pai386(p1)^.oper[0].typ = Pai386(p2)^.oper[0].typ) And
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- (Pai386(p1)^.oper[1].typ = Pai386(p2)^.oper[1].typ) And
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- OpsEqual(Pai386(p1)^.oper[0].typ, Pai386(p1)^.oper[0], Pai386(p2)^.oper[0]) And
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- OpsEqual(Pai386(p1)^.oper[1].typ, Pai386(p1)^.oper[1], Pai386(p2)^.oper[1]))
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+ (Paicpu(p1)^.opcode = Paicpu(p2)^.opcode) And
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+ (Paicpu(p1)^.oper[0].typ = Paicpu(p2)^.oper[0].typ) And
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+ (Paicpu(p1)^.oper[1].typ = Paicpu(p2)^.oper[1].typ) And
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+ OpsEqual(Paicpu(p1)^.oper[0].typ, Paicpu(p1)^.oper[0], Paicpu(p2)^.oper[0]) And
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+ OpsEqual(Paicpu(p1)^.oper[1].typ, Paicpu(p1)^.oper[1], Paicpu(p2)^.oper[1]))
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End;
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*)
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@@ -1591,10 +1591,10 @@ Begin
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TmpResult := False;
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If (p^.typ = ait_instruction) Then
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Begin
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- If (Pai386(p)^.oper[0].typ = Top_Ref) Then
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- TmpResult := RefsEqual(Ref, Pai386(p)^.oper[0].ref^);
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- If Not(TmpResult) And (Pai386(p)^.oper[1].typ = Top_Ref) Then
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- TmpResult := RefsEqual(Ref, Pai386(p)^.oper[1].ref^);
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+ If (Paicpu(p)^.oper[0].typ = Top_Ref) Then
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+ TmpResult := RefsEqual(Ref, Paicpu(p)^.oper[0].ref^);
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+ If Not(TmpResult) And (Paicpu(p)^.oper[1].typ = Top_Ref) Then
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+ TmpResult := RefsEqual(Ref, Paicpu(p)^.oper[1].ref^);
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End;
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RefInInstruction := TmpResult;
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End;
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@@ -1652,8 +1652,8 @@ Begin
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((Counter <> WhichReg) Or
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((NrOfMods <> 1) And
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{StarMod is always of the type ait_instruction}
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- (Pai386(StartMod)^.oper[0].typ = top_ref) And
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- RefsEqual(Pai386(StartMod)^.oper[0].ref^, Ref)
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+ (Paicpu(StartMod)^.oper[0].typ = top_ref) And
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+ RefsEqual(Paicpu(StartMod)^.oper[0].ref^, Ref)
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)
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)
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)
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@@ -1677,9 +1677,9 @@ Begin
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(Ref.Base = R_EDI) Or
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{don't destroy if reg contains a parameter, local or global variable}
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Not((NrOfMods = 1) And
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- (Pai386(StartMod)^.oper[0].typ = top_ref) And
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- ((Pai386(StartMod)^.oper[0].ref^.base = ProcInfo.FramePointer) Or
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- Assigned(Pai386(StartMod)^.oper[0].ref^.Symbol)
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+ (Paicpu(StartMod)^.oper[0].typ = top_ref) And
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+ ((Paicpu(StartMod)^.oper[0].ref^.base = ProcInfo.FramePointer) Or
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+ Assigned(Paicpu(StartMod)^.oper[0].ref^.Symbol)
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)
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)
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)
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@@ -1739,7 +1739,7 @@ End;
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{$ifdef arithopt}
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Procedure AddInstr2RegContents({$ifdef statedebug} asml: paasmoutput; {$endif}
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-p: pai386; reg: TRegister);
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+p: paicpu; reg: TRegister);
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{$ifdef statedebug}
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var hp: pai;
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{$endif statedebug}
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@@ -1773,7 +1773,7 @@ Begin
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End;
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Procedure AddInstr2OpContents({$ifdef statedebug} asml: paasmoutput; {$endif}
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-p: pai386; const oper: TOper);
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+p: paicpu; const oper: TOper);
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Begin
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If oper.typ = top_reg Then
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AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, oper.reg)
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@@ -1869,7 +1869,7 @@ Begin
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Begin
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If (GetLastInstruction(p, hp) And
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Not(((hp^.typ = ait_instruction)) And
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- (pai386_labeled(hp)^.is_jmp))
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+ (paicpu_labeled(hp)^.is_jmp))
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Then
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{previous instruction not a JMP -> the contents of the registers after the
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previous intruction has been executed have to be taken into account as well}
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@@ -1886,7 +1886,7 @@ Begin
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already been processed}
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If GetLastInstruction(p, hp) And
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Not(hp^.typ = ait_instruction) And
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- (pai386_labeled(hp)^.opcode = A_JMP))
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+ (paicpu_labeled(hp)^.opcode = A_JMP))
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Then
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{previous instruction not a jmp, so keep all the registers' contents from the
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previous instruction}
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@@ -1903,8 +1903,8 @@ Begin
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been processed}
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While GetNextInstruction(hp, hp) And
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Not((hp^.typ = ait_instruction) And
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- (pai386(hp)^.is_jmp) and
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- (pasmlabel(pai386(hp)^.oper[0].sym)^.labelnr = Pai_Label(p)^.l^.labelnr)) And
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+ (paicpu(hp)^.is_jmp) and
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+ (pasmlabel(paicpu(hp)^.oper[0].sym)^.labelnr = Pai_Label(p)^.l^.labelnr)) And
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Not((hp^.typ = ait_label) And
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(LTable^[Pai_Label(hp)^.l^.labelnr-LoLab].RefsFound
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= Pai_Label(hp)^.l^.RefCount) And
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@@ -1945,13 +1945,13 @@ Begin
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ait_instruction:
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Begin
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- if pai386(p)^.is_jmp then
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+ if paicpu(p)^.is_jmp then
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begin
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{$IfNDef JumpAnal}
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;
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{$Else JumpAnal}
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- With LTable^[pasmlabel(pai386(p)^.oper[0].sym)^.labelnr-LoLab] Do
|
|
|
- If (RefsFound = pasmlabel(pai386(p)^.oper[0].sym)^.RefCount) Then
|
|
|
+ With LTable^[pasmlabel(paicpu(p)^.oper[0].sym)^.labelnr-LoLab] Do
|
|
|
+ If (RefsFound = pasmlabel(paicpu(p)^.oper[0].sym)^.RefCount) Then
|
|
|
Begin
|
|
|
If (InstrCnt < InstrNr)
|
|
|
Then
|
|
@@ -1977,7 +1977,7 @@ Begin
|
|
|
{ If (JmpsProcessed > 0) Or
|
|
|
Not(GetLastInstruction(PaiObj, hp) And
|
|
|
(hp^.typ = ait_labeled_instruction) And
|
|
|
- (pai386_labeled(hp)^.opcode = A_JMP))
|
|
|
+ (paicpu_labeled(hp)^.opcode = A_JMP))
|
|
|
Then}
|
|
|
{instruction prior to label is not a jmp, or at least one jump to the label
|
|
|
has yet been processed}
|
|
@@ -2035,36 +2035,36 @@ Begin
|
|
|
end
|
|
|
else
|
|
|
begin
|
|
|
- InstrProp := AsmInstr[Pai386(p)^.opcode];
|
|
|
- Case Pai386(p)^.opcode Of
|
|
|
+ InstrProp := AsmInstr[Paicpu(p)^.opcode];
|
|
|
+ Case Paicpu(p)^.opcode Of
|
|
|
A_MOV, A_MOVZX, A_MOVSX:
|
|
|
Begin
|
|
|
- Case Pai386(p)^.oper[0].typ Of
|
|
|
+ Case Paicpu(p)^.oper[0].typ Of
|
|
|
Top_Reg:
|
|
|
- Case Pai386(p)^.oper[1].typ Of
|
|
|
+ Case Paicpu(p)^.oper[1].typ Of
|
|
|
Top_Reg:
|
|
|
Begin
|
|
|
- DestroyReg(CurProp, Pai386(p)^.oper[1].reg);
|
|
|
- ReadReg(CurProp, Pai386(p)^.oper[0].reg);
|
|
|
-{ CurProp^.Regs[Pai386(p)^.oper[1].reg] :=
|
|
|
- CurProp^.Regs[Pai386(p)^.oper[0].reg];
|
|
|
- If (CurProp^.Regs[Pai386(p)^.oper[1].reg].ModReg = R_NO) Then
|
|
|
- CurProp^.Regs[Pai386(p)^.oper[1].reg].ModReg :=
|
|
|
- Pai386(p)^.oper[0].reg;}
|
|
|
+ DestroyReg(CurProp, Paicpu(p)^.oper[1].reg);
|
|
|
+ ReadReg(CurProp, Paicpu(p)^.oper[0].reg);
|
|
|
+{ CurProp^.Regs[Paicpu(p)^.oper[1].reg] :=
|
|
|
+ CurProp^.Regs[Paicpu(p)^.oper[0].reg];
|
|
|
+ If (CurProp^.Regs[Paicpu(p)^.oper[1].reg].ModReg = R_NO) Then
|
|
|
+ CurProp^.Regs[Paicpu(p)^.oper[1].reg].ModReg :=
|
|
|
+ Paicpu(p)^.oper[0].reg;}
|
|
|
End;
|
|
|
Top_Ref:
|
|
|
Begin
|
|
|
- ReadReg(CurProp, Pai386(p)^.oper[0].reg);
|
|
|
- ReadRef(CurProp, Pai386(p)^.oper[1].ref);
|
|
|
- DestroyRefs(p, Pai386(p)^.oper[1].ref^, Pai386(p)^.oper[0].reg);
|
|
|
+ ReadReg(CurProp, Paicpu(p)^.oper[0].reg);
|
|
|
+ ReadRef(CurProp, Paicpu(p)^.oper[1].ref);
|
|
|
+ DestroyRefs(p, Paicpu(p)^.oper[1].ref^, Paicpu(p)^.oper[0].reg);
|
|
|
End;
|
|
|
End;
|
|
|
Top_Ref:
|
|
|
Begin {destination is always a register in this case}
|
|
|
- ReadRef(CurProp, Pai386(p)^.oper[0].ref);
|
|
|
- ReadReg(CurProp, Pai386(p)^.oper[1].reg);
|
|
|
- TmpReg := Reg32(Pai386(p)^.oper[1].reg);
|
|
|
- If RegInRef(TmpReg, Pai386(p)^.oper[0].ref^) And
|
|
|
+ ReadRef(CurProp, Paicpu(p)^.oper[0].ref);
|
|
|
+ ReadReg(CurProp, Paicpu(p)^.oper[1].reg);
|
|
|
+ TmpReg := Reg32(Paicpu(p)^.oper[1].reg);
|
|
|
+ If RegInRef(TmpReg, Paicpu(p)^.oper[0].ref^) And
|
|
|
(CurProp^.Regs[TmpReg].Typ = Con_Ref)
|
|
|
Then
|
|
|
Begin
|
|
@@ -2082,7 +2082,7 @@ Begin
|
|
|
Else
|
|
|
Begin
|
|
|
DestroyReg(CurProp, TmpReg);
|
|
|
- If Not(RegInRef(TmpReg, Pai386(p)^.oper[0].ref^)) Then
|
|
|
+ If Not(RegInRef(TmpReg, Paicpu(p)^.oper[0].ref^)) Then
|
|
|
With CurProp^.Regs[TmpReg] Do
|
|
|
Begin
|
|
|
Typ := Con_Ref;
|
|
@@ -2098,10 +2098,10 @@ Begin
|
|
|
End;
|
|
|
Top_Const:
|
|
|
Begin
|
|
|
- Case Pai386(p)^.oper[1].typ Of
|
|
|
+ Case Paicpu(p)^.oper[1].typ Of
|
|
|
Top_Reg:
|
|
|
Begin
|
|
|
- TmpReg := Reg32(Pai386(p)^.oper[1].reg);
|
|
|
+ TmpReg := Reg32(Paicpu(p)^.oper[1].reg);
|
|
|
With CurProp^.Regs[TmpReg] Do
|
|
|
Begin
|
|
|
DestroyReg(CurProp, TmpReg);
|
|
@@ -2111,8 +2111,8 @@ Begin
|
|
|
End;
|
|
|
Top_Ref:
|
|
|
Begin
|
|
|
- ReadRef(CurProp, Pai386(p)^.oper[1].ref);
|
|
|
- DestroyRefs(P, Pai386(p)^.oper[1].ref^, R_NO);
|
|
|
+ ReadRef(CurProp, Paicpu(p)^.oper[1].ref);
|
|
|
+ DestroyRefs(P, Paicpu(p)^.oper[1].ref^, R_NO);
|
|
|
End;
|
|
|
End;
|
|
|
End;
|
|
@@ -2120,19 +2120,19 @@ Begin
|
|
|
End;
|
|
|
A_DIV, A_IDIV, A_MUL:
|
|
|
Begin
|
|
|
- ReadOp(Curprop, Pai386(p)^.oper[0]);
|
|
|
+ ReadOp(Curprop, Paicpu(p)^.oper[0]);
|
|
|
ReadReg(CurProp,R_EAX);
|
|
|
- If (Pai386(p)^.OpCode = A_IDIV) or
|
|
|
- (Pai386(p)^.OpCode = A_DIV) Then
|
|
|
+ If (Paicpu(p)^.OpCode = A_IDIV) or
|
|
|
+ (Paicpu(p)^.OpCode = A_DIV) Then
|
|
|
ReadReg(CurProp,R_EDX);
|
|
|
DestroyReg(CurProp, R_EAX)
|
|
|
End;
|
|
|
A_IMUL:
|
|
|
Begin
|
|
|
- ReadOp(CurProp,Pai386(p)^.oper[0]);
|
|
|
- ReadOp(CurProp,Pai386(p)^.oper[1]);
|
|
|
- If (Pai386(p)^.oper[2].typ = top_none) Then
|
|
|
- If (Pai386(p)^.oper[1].typ = top_none) Then
|
|
|
+ ReadOp(CurProp,Paicpu(p)^.oper[0]);
|
|
|
+ ReadOp(CurProp,Paicpu(p)^.oper[1]);
|
|
|
+ If (Paicpu(p)^.oper[2].typ = top_none) Then
|
|
|
+ If (Paicpu(p)^.oper[1].typ = top_none) Then
|
|
|
Begin
|
|
|
ReadReg(CurProp,R_EAX);
|
|
|
DestroyReg(CurProp, R_EAX);
|
|
@@ -2140,32 +2140,32 @@ Begin
|
|
|
End
|
|
|
Else
|
|
|
{$ifdef arithopt}
|
|
|
- AddOp2RegContents(Pai386(p), Pai386(p)^.oper[1])
|
|
|
+ AddOp2RegContents(Paicpu(p), Paicpu(p)^.oper[1])
|
|
|
{$else arithopt}
|
|
|
- DestroyOp(p, Pai386(p)^.oper[1])
|
|
|
+ DestroyOp(p, Paicpu(p)^.oper[1])
|
|
|
{$endif arithopt}
|
|
|
Else
|
|
|
{$ifdef arithopt}
|
|
|
- AddOp2RegContents(Pai386(p), Pai386(p)^.oper[2]);
|
|
|
+ AddOp2RegContents(Paicpu(p), Paicpu(p)^.oper[2]);
|
|
|
{$else arithopt}
|
|
|
- DestroyOp(p, Pai386(p)^.oper[2]);
|
|
|
+ DestroyOp(p, Paicpu(p)^.oper[2]);
|
|
|
{$endif arithopt}
|
|
|
End;
|
|
|
A_XOR:
|
|
|
Begin
|
|
|
- ReadOp(CurProp, Pai386(p)^.oper[0]);
|
|
|
- ReadOp(CurProp, Pai386(p)^.oper[1]);
|
|
|
- If (Pai386(p)^.oper[0].typ = top_reg) And
|
|
|
- (Pai386(p)^.oper[1].typ = top_reg) And
|
|
|
- (Pai386(p)^.oper[0].reg = Pai386(p)^.oper[1].reg)
|
|
|
+ ReadOp(CurProp, Paicpu(p)^.oper[0]);
|
|
|
+ ReadOp(CurProp, Paicpu(p)^.oper[1]);
|
|
|
+ If (Paicpu(p)^.oper[0].typ = top_reg) And
|
|
|
+ (Paicpu(p)^.oper[1].typ = top_reg) And
|
|
|
+ (Paicpu(p)^.oper[0].reg = Paicpu(p)^.oper[1].reg)
|
|
|
Then
|
|
|
Begin
|
|
|
- DestroyReg(CurProp, Pai386(p)^.oper[0].reg);
|
|
|
- CurProp^.Regs[Reg32(Pai386(p)^.oper[0].reg)].typ := Con_Const;
|
|
|
- CurProp^.Regs[Reg32(Pai386(p)^.oper[0].reg)].StartMod := Pointer(0)
|
|
|
+ DestroyReg(CurProp, Paicpu(p)^.oper[0].reg);
|
|
|
+ CurProp^.Regs[Reg32(Paicpu(p)^.oper[0].reg)].typ := Con_Const;
|
|
|
+ CurProp^.Regs[Reg32(Paicpu(p)^.oper[0].reg)].StartMod := Pointer(0)
|
|
|
End
|
|
|
Else
|
|
|
- DestroyOp(p, Pai386(p)^.oper[1]);
|
|
|
+ DestroyOp(p, Paicpu(p)^.oper[1]);
|
|
|
End
|
|
|
Else
|
|
|
Begin
|
|
@@ -2184,46 +2184,46 @@ Begin
|
|
|
{$ifdef arithopt}
|
|
|
C_MEAX..C_MEDI:
|
|
|
AddInstr2RegContents({$ifdef statedebug} asml, {$endif}
|
|
|
- Pai386(p),
|
|
|
+ Paicpu(p),
|
|
|
TCh2Reg(InstrProp.Ch[Cnt]));
|
|
|
{$endif arithopt}
|
|
|
C_CDirFlag: CurProp^.DirFlag := F_NotSet;
|
|
|
C_SDirFlag: CurProp^.DirFlag := F_Set;
|
|
|
- C_Rop1: ReadOp(CurProp, Pai386(p)^.oper[0]);
|
|
|
- C_Rop2: ReadOp(CurProp, Pai386(p)^.oper[1]);
|
|
|
- C_ROp3: ReadOp(CurProp, Pai386(p)^.oper[2]);
|
|
|
+ C_Rop1: ReadOp(CurProp, Paicpu(p)^.oper[0]);
|
|
|
+ C_Rop2: ReadOp(CurProp, Paicpu(p)^.oper[1]);
|
|
|
+ C_ROp3: ReadOp(CurProp, Paicpu(p)^.oper[2]);
|
|
|
C_Wop1..C_RWop1:
|
|
|
Begin
|
|
|
If (InstrProp.Ch[Cnt] in [C_RWop1]) Then
|
|
|
- ReadOp(CurProp, Pai386(p)^.oper[0]);
|
|
|
- DestroyOp(p, Pai386(p)^.oper[0]);
|
|
|
+ ReadOp(CurProp, Paicpu(p)^.oper[0]);
|
|
|
+ DestroyOp(p, Paicpu(p)^.oper[0]);
|
|
|
End;
|
|
|
{$ifdef arithopt}
|
|
|
C_Mop1:
|
|
|
AddInstr2OpContents({$ifdef statedebug} asml, {$endif}
|
|
|
- Pai386(p), Pai386(p)^.oper[0]);
|
|
|
+ Paicpu(p), Paicpu(p)^.oper[0]);
|
|
|
{$endif arithopt}
|
|
|
C_Wop2..C_RWop2:
|
|
|
Begin
|
|
|
If (InstrProp.Ch[Cnt] = C_RWop2) Then
|
|
|
- ReadOp(CurProp, Pai386(p)^.oper[1]);
|
|
|
- DestroyOp(p, Pai386(p)^.oper[1]);
|
|
|
+ ReadOp(CurProp, Paicpu(p)^.oper[1]);
|
|
|
+ DestroyOp(p, Paicpu(p)^.oper[1]);
|
|
|
End;
|
|
|
{$ifdef arithopt}
|
|
|
C_Mop2:
|
|
|
AddInstr2OpContents({$ifdef statedebug} asml, {$endif}
|
|
|
- Pai386(p), Pai386(p)^.oper[1]);
|
|
|
+ Paicpu(p), Paicpu(p)^.oper[1]);
|
|
|
{$endif arithopt}
|
|
|
C_WOp3..C_RWOp3:
|
|
|
Begin
|
|
|
If (InstrProp.Ch[Cnt] = C_RWOp3) Then
|
|
|
- ReadOp(CurProp, Pai386(p)^.oper[2]);
|
|
|
- DestroyOp(p, Pai386(p)^.oper[2]);
|
|
|
+ ReadOp(CurProp, Paicpu(p)^.oper[2]);
|
|
|
+ DestroyOp(p, Paicpu(p)^.oper[2]);
|
|
|
End;
|
|
|
{$ifdef arithopt}
|
|
|
C_Mop3:
|
|
|
AddInstr2OpContents({$ifdef statedebug} asml, {$endif}
|
|
|
- Pai386(p), Pai386(p)^.oper[2]);
|
|
|
+ Paicpu(p), Paicpu(p)^.oper[2]);
|
|
|
{$endif arithopt}
|
|
|
C_WMemEDI:
|
|
|
Begin
|
|
@@ -2276,20 +2276,20 @@ Begin
|
|
|
End;
|
|
|
ait_instruction:
|
|
|
begin
|
|
|
- if pai386(p)^.is_jmp then
|
|
|
+ if paicpu(p)^.is_jmp then
|
|
|
begin
|
|
|
- If (pasmlabel(pai386(P)^.oper[0].sym)^.labelnr >= LoLab) And
|
|
|
- (pasmlabel(pai386(P)^.oper[0].sym)^.labelnr <= HiLab) Then
|
|
|
- Inc(LTable^[pasmlabel(pai386(P)^.oper[0].sym)^.labelnr-LoLab].RefsFound);
|
|
|
+ If (pasmlabel(paicpu(P)^.oper[0].sym)^.labelnr >= LoLab) And
|
|
|
+ (pasmlabel(paicpu(P)^.oper[0].sym)^.labelnr <= HiLab) Then
|
|
|
+ Inc(LTable^[pasmlabel(paicpu(P)^.oper[0].sym)^.labelnr-LoLab].RefsFound);
|
|
|
end;
|
|
|
end;
|
|
|
{ ait_instruction:
|
|
|
Begin
|
|
|
- If (Pai386(p)^.opcode = A_PUSH) And
|
|
|
- (Pai386(p)^.oper[0].typ = top_symbol) And
|
|
|
- (PCSymbol(Pai386(p)^.oper[0])^.offset = 0) Then
|
|
|
+ If (Paicpu(p)^.opcode = A_PUSH) And
|
|
|
+ (Paicpu(p)^.oper[0].typ = top_symbol) And
|
|
|
+ (PCSymbol(Paicpu(p)^.oper[0])^.offset = 0) Then
|
|
|
Begin
|
|
|
- TmpStr := StrPas(PCSymbol(Pai386(p)^.oper[0])^.symbol);
|
|
|
+ TmpStr := StrPas(PCSymbol(Paicpu(p)^.oper[0])^.symbol);
|
|
|
If}
|
|
|
End;
|
|
|
{$EndIf JumpAnal}
|
|
@@ -2350,7 +2350,10 @@ End.
|
|
|
|
|
|
{
|
|
|
$Log$
|
|
|
- Revision 1.56 1999-08-18 13:25:54 jonas
|
|
|
+ Revision 1.57 1999-08-25 12:00:00 jonas
|
|
|
+ * changed pai386, paippc and paiapha (same for tai*) to paicpu (taicpu)
|
|
|
+
|
|
|
+ Revision 1.56 1999/08/18 13:25:54 jonas
|
|
|
* minor fixes regarding the reading of operands
|
|
|
|
|
|
Revision 1.55 1999/08/12 14:36:03 peter
|