* powerpc compiles again

compiler/aggas.pas

@@ -80,14 +80,14 @@ implementation
   {$endif}
       ,gdb
 {$endif GDB}
-{$ifdef i386}
+{$ifdef x86}
       ,itx86att
 {$endif}
+{$ifdef powerpc}
+      ,itppcgas
+{$endif}
 {$ifdef arm}
       ,agarmgas
-{$endif}
-{$ifdef powerpc}
-      ,agppcgas
 {$endif}
       ;
 
@@ -828,7 +828,10 @@ var
 end.
 {
   $Log$
-  Revision 1.31  2003-09-03 15:55:00  peter
+  Revision 1.32  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.31  2003/09/03 15:55:00  peter
     * NEWRA branch merged
 
   Revision 1.30  2003/09/03 11:18:36  florian

compiler/powerpc/aasmcpu.pas

@@ -29,7 +29,7 @@ interface
 uses
   cclasses,aasmtai,
   aasmbase,globals,verbose,
-  cpubase,cpuinfo;
+  cginfo,cpubase,cpuinfo;
 
     const
       { "mov reg,reg" source operand number }
@@ -82,14 +82,12 @@ uses
 
          function is_nop: boolean; override;
          function is_move:boolean; override;
-         function spill_registers(list:Taasmoutput;
-                                  rgget:Trggetproc;
-                                  rgunget:Trgungetproc;
-                                  r:Tsupregset;
-                                  var unusedregsint:Tsupregset;
-                                  const spilltemplist:Tspill_temp_list):boolean; override;
-
 
+         { register spilling code }
+         function spilling_decode_loadstore(op: tasmop; var counterpart: tasmop; var wasload: boolean): boolean;override;
+         function spilling_create_loadstore(op: tasmop; r:tregister; const ref:treference): tai;override;
+         function spilling_create_load(const ref:treference;r:tregister): tai;override;
+         function spilling_create_store(r:tregister; const ref:treference): tai;override;
       end;
 
       tai_align = class(tai_align_abstract)
@@ -131,8 +129,6 @@ uses cutils,rgobj;
     constructor taicpu.op_reg(op : tasmop;_op1 : tregister);
       begin
          inherited create(op);
-         if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
-           internalerror(2003031207);
          ops:=1;
          loadreg(0,_op1);
       end;
@@ -149,10 +145,6 @@ uses cutils,rgobj;
     constructor taicpu.op_reg_reg(op : tasmop;_op1,_op2 : tregister);
       begin
          inherited create(op);
-         if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
-           internalerror(2003031205);
-         if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
-           internalerror(2003031206);
          ops:=2;
          loadreg(0,_op1);
          loadreg(1,_op2);
@@ -161,8 +153,6 @@ uses cutils,rgobj;
     constructor taicpu.op_reg_const(op:tasmop; _op1: tregister; _op2: longint);
       begin
          inherited create(op);
-         if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
-           internalerror(2003031208);
          ops:=2;
          loadreg(0,_op1);
          loadconst(1,aword(_op2));
@@ -171,8 +161,6 @@ uses cutils,rgobj;
      constructor taicpu.op_const_reg(op:tasmop; _op1: longint; _op2: tregister);
       begin
          inherited create(op);
-         if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
-           internalerror(2003031209);
          ops:=2;
          loadconst(0,aword(_op1));
          loadreg(1,_op2);
@@ -182,8 +170,6 @@ uses cutils,rgobj;
     constructor taicpu.op_reg_ref(op : tasmop;_op1 : tregister;const _op2 : treference);
       begin
          inherited create(op);
-         if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
-           internalerror(2003031210);
          ops:=2;
          loadreg(0,_op1);
          loadref(1,_op2);
@@ -202,12 +188,6 @@ uses cutils,rgobj;
     constructor taicpu.op_reg_reg_reg(op : tasmop;_op1,_op2,_op3 : tregister);
       begin
          inherited create(op);
-         if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
-           internalerror(2003031211);
-         if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
-           internalerror(2003031212);
-         if (_op3.enum = R_INTREGISTER) and (_op3.number = NR_NO) then
-           internalerror(2003031213);
          ops:=3;
          loadreg(0,_op1);
          loadreg(1,_op2);
@@ -217,10 +197,6 @@ uses cutils,rgobj;
      constructor taicpu.op_reg_reg_const(op : tasmop;_op1,_op2 : tregister; _op3: Longint);
        begin
          inherited create(op);
-         if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
-           internalerror(2003031214);
-         if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
-           internalerror(2003031215);
          ops:=3;
          loadreg(0,_op1);
          loadreg(1,_op2);
@@ -230,10 +206,6 @@ uses cutils,rgobj;
      constructor taicpu.op_reg_reg_sym_ofs(op : tasmop;_op1,_op2 : tregister; _op3: tasmsymbol;_op3ofs: longint);
        begin
          inherited create(op);
-         if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
-           internalerror(2003031216);
-         if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
-           internalerror(2003031217);
          ops:=3;
          loadreg(0,_op1);
          loadreg(1,_op2);
@@ -243,10 +215,6 @@ uses cutils,rgobj;
      constructor taicpu.op_reg_reg_ref(op : tasmop;_op1,_op2 : tregister; const _op3: treference);
        begin
          inherited create(op);
-         if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
-           internalerror(2003031218);
-         if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
-           internalerror(2003031219);
          ops:=3;
          loadreg(0,_op1);
          loadreg(1,_op2);
@@ -256,10 +224,6 @@ uses cutils,rgobj;
     constructor taicpu.op_const_reg_reg(op : tasmop;_op1 : longint;_op2, _op3 : tregister);
       begin
          inherited create(op);
-         if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
-           internalerror(2003031221);
-         if (_op3.enum = R_INTREGISTER) and (_op3.number = NR_NO) then
-           internalerror(2003031220);
          ops:=3;
          loadconst(0,aword(_op1));
          loadreg(1,_op2);
@@ -269,8 +233,6 @@ uses cutils,rgobj;
      constructor taicpu.op_const_reg_const(op : tasmop;_op1 : longint;_op2 : tregister;_op3 : longint);
       begin
          inherited create(op);
-         if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
-           internalerror(2003031222);
          ops:=3;
          loadconst(0,aword(_op1));
          loadreg(1,_op2);
@@ -281,14 +243,6 @@ uses cutils,rgobj;
      constructor taicpu.op_reg_reg_reg_reg(op : tasmop;_op1,_op2,_op3,_op4 : tregister);
       begin
          inherited create(op);
-         if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
-           internalerror(2003031223);
-         if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
-           internalerror(2003031224);
-         if (_op3.enum = R_INTREGISTER) and (_op3.number = NR_NO) then
-           internalerror(2003031225);
-         if (_op4.enum = R_INTREGISTER) and (_op4.number = NR_NO) then
-           internalerror(2003031226);
          ops:=4;
          loadreg(0,_op1);
          loadreg(1,_op2);
@@ -299,12 +253,6 @@ uses cutils,rgobj;
      constructor taicpu.op_reg_bool_reg_reg(op : tasmop;_op1: tregister;_op2:boolean;_op3,_op4:tregister);
       begin
          inherited create(op);
-         if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
-           internalerror(2003031227);
-         if (_op3.enum = R_INTREGISTER) and (_op3.number = NR_NO) then
-           internalerror(2003031228);
-         if (_op4.enum = R_INTREGISTER) and (_op4.number = NR_NO) then
-           internalerror(2003031229);
          ops:=4;
          loadreg(0,_op1);
          loadbool(1,_op2);
@@ -315,10 +263,6 @@ uses cutils,rgobj;
      constructor taicpu.op_reg_bool_reg_const(op : tasmop;_op1: tregister;_op2:boolean;_op3:tregister;_op4: longint);
       begin
          inherited create(op);
-         if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
-           internalerror(2003031230);
-         if (_op3.enum = R_INTREGISTER) and (_op3.number = NR_NO) then
-           internalerror(2003031231);
          ops:=4;
          loadreg(0,_op1);
          loadbool(0,_op2);
@@ -330,12 +274,6 @@ uses cutils,rgobj;
      constructor taicpu.op_reg_reg_reg_const_const(op : tasmop;_op1,_op2,_op3 : tregister;_op4,_op5 : Longint);
       begin
          inherited create(op);
-         if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
-           internalerror(2003031232);
-         if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
-           internalerror(2003031233);
-         if (_op3.enum = R_INTREGISTER) and (_op3.number = NR_NO) then
-           internalerror(2003031233);
          ops:=5;
          loadreg(0,_op1);
          loadreg(1,_op2);
@@ -347,10 +285,6 @@ uses cutils,rgobj;
      constructor taicpu.op_reg_reg_const_const_const(op : tasmop;_op1,_op2 : tregister;_op3,_op4,_op5 : Longint);
       begin
          inherited create(op);
-         if (_op1.enum = R_INTREGISTER) and (_op1.number = NR_NO) then
-           internalerror(2003031232);
-         if (_op2.enum = R_INTREGISTER) and (_op2.number = NR_NO) then
-           internalerror(2003031233);
          ops:=5;
          loadreg(0,_op1);
          loadreg(1,_op2);
@@ -417,7 +351,7 @@ uses cutils,rgobj;
       begin
         { we don't insert any more nops than necessary }
         is_nop :=
-          ((opcode=A_MR) and (oper[0].typ=top_reg) and (oper[1].typ=top_reg) and (oper[0].reg.number=oper[1].reg.number));
+          ((opcode=A_MR) and (oper[0].typ=top_reg) and (oper[1].typ=top_reg) and (oper[0].reg=oper[1].reg));
       end;
 
 
@@ -427,282 +361,96 @@ uses cutils,rgobj;
                    (opcode = A_EXTSB) or
                    (opcode = A_EXTSH) or
                    ((opcode = A_RLWINM) and
-                    (oper[3].val = 0) and
-                    (oper[5].val = 31) and
-                    (oper[4].val in [31-8+1,31-16+1]));
-      end;
-
-
-    function taicpu.spill_registers(list:Taasmoutput;
-                             rgget:Trggetproc;
-                             rgunget:Trgungetproc;
-                             r:Tsupregset;
-                             var unusedregsint:Tsupregset;
-                              const spilltemplist:Tspill_temp_list): boolean;
-
-      function decode_loadstore(op: tasmop; var counterpart: tasmop; var wasload: boolean): boolean;
-
-        begin
-          result := true;
-          wasload := true;
-          case op of
-            A_LBZ:
-              begin
-                counterpart := A_STB;
-              end;
-            A_LBZX:
-              begin
-                counterpart := A_STBX;
-              end;
-            A_LHZ,A_LHA:
-              begin
-                counterpart := A_STH;
-              end;
-            A_LHZX,A_LHAX:
-              begin
-                counterpart := A_STHX;
-              end;
-            A_LWZ:
-              begin
-                counterpart := A_STW;
-              end;
-            A_LWZX:
-              begin
-                counterpart := A_STWX;
-              end;
-            A_STB:
-              begin
-                counterpart := A_LBZ;
-                wasload := false;
-              end;
-            A_STBX:
-              begin
-                counterpart := A_LBZX;
-                wasload := false;
-              end;
-            A_STH:
-              begin
-                counterpart := A_LHZ;
-                wasload := false;
-              end;
-            A_STHX:
-              begin
-                counterpart := A_LHZX;
-                wasload := false;
-              end;
-            A_STW:
-              begin
-                counterpart := A_LWZ;
-                wasload := false;
-              end;
-            A_STWX:
-              begin
-                counterpart := A_LWZX;
-                wasload := false;
-              end;
-            A_LBZU,A_LBZUX,A_LHZU,A_LHZUX,A_LHAU,A_LHAUX,
-            A_LWZU,A_LWZUX,A_STBU,A_STBUX,A_STHU,A_STHUX,
-            A_STWU,A_STWUX:
-              internalerror(2003070602);
-            else
-              result := false;
-          end;
-       end;
-
-
-    var i:byte;
-        supreg, reg1, reg2, reg3: Tsuperregister;
-        helpreg:Tregister;
-        helpins:Taicpu;
-        op:Tasmop;
-        pos:Tai;
-        wasload: boolean;
+                    (oper[2].val = 0) and
+                    (oper[4].val = 31) and
+                    (oper[3].val in [31-8+1,31-16+1]));
+      end;
 
-      begin
-        spill_registers:=false;
-        if (ops = 2) and
-           (oper[1].typ=top_ref) and
-           { oper[1] can also be ref in case of "lis r3,symbol@ha" or so }
-           decode_loadstore(opcode,op,wasload) then
-          begin
-            { the register that's being stored/loaded }
-            supreg:=oper[0].reg.number shr 8;
-            if supreg in r then
-              begin
-                // Example:
-                //   l?? r20d, 8(r1)   ; r20d must be spilled into -60(r1)
-                //
-                //   Change into:
-                //
-                //   l?? r21d, 8(r1)
-                //   st? r21d, -60(r1)
-                //
-                // And:
-                //
-                //   st? r20d, 8(r1)   ; r20d must be spilled into -60(r1)
-                //
-                //   Change into:
-                //
-                //   l?? r21d, -60(r1)
-                //   st? r21d, 8(r1)
-
-                pos := get_insert_pos(Tai(previous),oper[0].reg.number shr 8,
-                                      oper[1].ref^.base.number shr 8,oper[1].ref^.index.number shr 8,unusedregsint);
-                rgget(list,pos,0,helpreg);
-                spill_registers := true;
-                if wasload then
-                  begin
-                    helpins := taicpu.op_reg_ref(opcode,helpreg,oper[1].ref^);
-                    loadref(1,spilltemplist[supreg]);
-                    opcode := op;
-                  end
-                else
-                  helpins := taicpu.op_reg_ref(op,helpreg,spilltemplist[supreg]);
-                if pos=nil then
-                  list.insertafter(helpins,list.first)
-                else
-                  list.insertafter(helpins,pos.next);
-                loadreg(0,helpreg);
-                rgunget(list,helpins,helpreg);
-                forward_allocation(tai(helpins.next),unusedregsint);
-{
-                writeln('spilling!');
-                list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
-}
-              end;
-
-            { now the registers used in the reference }
-            { a) base                                 }
-            supreg := oper[1].ref^.base.number shr 8;
-            if supreg in r then
-              begin
-                if wasload then
-                  pos:=get_insert_pos(Tai(previous),oper[1].ref^.index.number shr 8,oper[0].reg.number shr 8,0,unusedregsint)
-                else
-                  pos:=get_insert_pos(Tai(previous),oper[1].ref^.index.number shr 8,0,0,unusedregsint);
-                rgget(list,pos,0,helpreg);
-                spill_registers:=true;
-                helpins:=Taicpu.op_reg_ref(A_LWZ,helpreg,spilltemplist[supreg]);
-                if pos=nil then
-                  list.insertafter(helpins,list.first)
-                else
-                  list.insertafter(helpins,pos.next);
-                oper[1].ref^.base:=helpreg;
-                rgunget(list,helpins,helpreg);
-                forward_allocation(Tai(helpins.next),unusedregsint);
-{
-                writeln('spilling!');
-                list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
-}
-              end;
-
-            { b) index }
-            supreg := oper[1].ref^.index.number shr 8;
-            if supreg in r then
-              begin
-                if wasload then
-                  pos:=get_insert_pos(Tai(previous),oper[1].ref^.base.number shr 8,oper[0].reg.number shr 8,0,unusedregsint)
-                else
-                  pos:=get_insert_pos(Tai(previous),oper[1].ref^.base.number shr 8,0,0,unusedregsint);
-                rgget(list,pos,0,helpreg);
-                spill_registers:=true;
-                helpins:=Taicpu.op_reg_ref(A_LWZ,helpreg,spilltemplist[supreg]);
-                if pos=nil then
-                  list.insertafter(helpins,list.first)
-                else
-                  list.insertafter(helpins,pos.next);
-                oper[1].ref^.index:=helpreg;
-                rgunget(list,helpins,helpreg);
-                forward_allocation(Tai(helpins.next),unusedregsint);
-{
-                writeln('spilling!');
-                list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
-}
-              end;
-            { load/store is done }
-            exit;
-          end;
-
-        { all other instructions the compiler generates are the same (I hope):   }
-        { operand 0 is a register and is the destination, the others are sources }
-        { and can be either registers or constants                               }
-        { exception: branches (is_jmp isn't always set for them)                 }
-        if oper[0].typ <> top_reg then
-          exit;
-        reg1 := oper[0].reg.number shr 8;
-        if oper[1].typ = top_reg then
-          reg2 := oper[1].reg.number shr 8
-        else
-          reg2 := 0;
-        if (ops >= 3) and
-           (oper[2].typ = top_reg) then
-          reg3 := oper[2].reg.number shr 8
-        else
-          reg3 := 0;
-
-        supreg:=reg1;
-        if supreg in r then
-          begin
-            // Example:
-            //   add r20d, r21d, r22d   ; r20d must be spilled into -60(r1)
-            //
-            //   Change into:
-            //
-            //   lwz r23d, -60(r1)
-            //   add r23d, r21d, r22d
-            //   stw r23d, -60(r1)
-
-            pos := get_insert_pos(Tai(previous),reg1,reg2,reg3,unusedregsint);
-            rgget(list,pos,0,helpreg);
-            spill_registers := true;
-            helpins := taicpu.op_reg_ref(A_STW,helpreg,spilltemplist[supreg]);
-            list.insertafter(helpins,self);
-            helpins := taicpu.op_reg_ref(A_LWZ,helpreg,spilltemplist[supreg]);
-            if pos=nil then
-              list.insertafter(helpins,list.first)
-            else
-              list.insertafter(helpins,pos.next);
-            loadreg(0,helpreg);
-            rgunget(list,helpins,helpreg);
-            forward_allocation(tai(helpins.next),unusedregsint);
-{
-            writeln('spilling!');
-            list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
-}
-          end;
 
-        for i := 1 to 2 do
-          if (oper[i].typ = top_reg) then
+    function taicpu.spilling_decode_loadstore(op: tasmop; var counterpart: tasmop; var wasload: boolean): boolean;
+      begin
+        result := true;
+        wasload := true;
+        case op of
+          A_LBZ:
             begin
-              supreg:=oper[i].reg.number shr 8;
-              if supreg in r then
-                begin
-                  // Example:
-                  //   add r20d, r21d, r22d   ; r20d must be spilled into -60(r1)
-                  //
-                  //   Change into:
-                  //
-                  //   lwz r23d, -60(r1)
-                  //   add r23d, r21d, r22d
-                  //   stw r23d, -60(r1)
-
-                  pos := get_insert_pos(Tai(previous),reg1,reg2,reg3,unusedregsint);
-                  rgget(list,pos,0,helpreg);
-                  spill_registers := true;
-                  helpins := taicpu.op_reg_ref(A_LWZ,helpreg,spilltemplist[supreg]);
-                  if pos=nil then
-                    list.insertafter(helpins,list.first)
-                  else
-                    list.insertafter(helpins,pos.next);
-                  loadreg(i,helpreg);
-                  rgunget(list,helpins,helpreg);
-                  forward_allocation(tai(helpins.next),unusedregsint);
-{
-                  writeln('spilling!');
-                  list.insertafter(tai_comment.Create(strpnew('Spilling!')),helpins);
-}
-                end;
+              counterpart := A_STB;
+            end;
+          A_LBZX:
+            begin
+              counterpart := A_STBX;
+            end;
+          A_LHZ,A_LHA:
+            begin
+              counterpart := A_STH;
+            end;
+          A_LHZX,A_LHAX:
+            begin
+              counterpart := A_STHX;
+            end;
+          A_LWZ:
+            begin
+              counterpart := A_STW;
             end;
+          A_LWZX:
+            begin
+              counterpart := A_STWX;
+            end;
+          A_STB:
+            begin
+              counterpart := A_LBZ;
+              wasload := false;
+            end;
+          A_STBX:
+            begin
+              counterpart := A_LBZX;
+              wasload := false;
+            end;
+          A_STH:
+            begin
+              counterpart := A_LHZ;
+              wasload := false;
+            end;
+          A_STHX:
+            begin
+              counterpart := A_LHZX;
+              wasload := false;
+            end;
+          A_STW:
+            begin
+              counterpart := A_LWZ;
+              wasload := false;
+            end;
+          A_STWX:
+            begin
+              counterpart := A_LWZX;
+              wasload := false;
+            end;
+          A_LBZU,A_LBZUX,A_LHZU,A_LHZUX,A_LHAU,A_LHAUX,
+          A_LWZU,A_LWZUX,A_STBU,A_STBUX,A_STHU,A_STHUX,
+          A_STWU,A_STWUX:
+            internalerror(2003070602);
+          else
+            result := false;
+        end;
+      end;
+
+
+    function taicpu.spilling_create_loadstore(op: tasmop; r:tregister; const ref:treference): tai;
+      begin
+        result:=taicpu.op_reg_ref(opcode,r,ref);
+      end;
+
+
+    function taicpu.spilling_create_load(const ref:treference;r:tregister): tai;
+      begin
+        result:=taicpu.op_reg_ref(A_LWZ,r,ref);
+      end;
+
+
+    function taicpu.spilling_create_store(r:tregister; const ref:treference): tai;
+      begin
+        result:=taicpu.op_reg_ref(A_STW,r,ref);
       end;
 
 
@@ -718,7 +466,10 @@ uses cutils,rgobj;
 end.
 {
   $Log$
-  Revision 1.16  2003-09-03 15:55:01  peter
+  Revision 1.17  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.16  2003/09/03 15:55:01  peter
     * NEWRA branch merged
 
   Revision 1.15.2.1  2003/08/31 21:08:16  peter

compiler/powerpc/agppcgas.pas

@@ -41,75 +41,14 @@ unit agppcgas;
         procedure WriteInstruction(hp : tai);override;
       end;
 
-    const
-      gas_reg2str : treg2strtable = ('',
-        'r0','r1','r2','r3','r4','r5','r6','r7','r8','r9','r10','r11','r12','r13','r14','r15','r16',
-        'r17','r18','r19','r20','r21','r22','r23','r24','r25','r26','r27','r28','r29','r30','r31',
-        'f0','f1','f2','f3','f4','f5','f6','f7', 'f8','f9','f10','f11','f12',
-        'f13','f14','f15','f16','f17', 'f18','f19','f20','f21','f22', 'f23','f24',
-        'f25','f26','f27','f28','f29','f30','f31',
-        'v0','v1','v2','v3','v4','v5','v6','v7','v8','v9','v10','v11','v12',
-        'v13','v14','v15','v16','v17','v18','v19','v20','v21','v22', 'v23','v24',
-        'v25','v26','v27','v28','v29','v30','v31',
-        'cR','cr0','cr1','cr2','cr3','cr4','cr5','cr6','cr7',
-        'xer','lr','ctr','fpscr'
-      );
-
-      op2str : array[tasmop] of string[14] = ('<none>',
-        'add','add.','addo','addo.','addc','addc.','addco','addco.',
-        'adde','adde.','addeo','addeo.','addi','addic','addic.','addis',
-        'addme','addme.','addmeo','addmeo.','addze','addze.','addzeo',
-        'addzeo.','and','and.','andc','andc.','andi.','andis.','b',
-        'ba','bl','bla','bc','bca','bcl','bcla','bcctr','bcctrl','bclr',
-        'bclrl','cmp','cmpi','cmpl','cmpli','cntlzw','cntlzw.','crand',
-        'crandc','creqv','crnand','crnor','cror','crorc','crxor','dcba',
-        'dcbf','dcbi','dcbst','dcbt','divw','divw.','divwo','divwo.',
-        'divwu','divwu.','divwuo','divwuo.','eciwx','ecowx','eieio','eqv',
-        'eqv.','extsb','extsb.','extsh','extsh.','fabs','fabs.','fadd',
-        'fadd.','fadds','fadds.','fcmpo','fcmpu','fctiw','fctw.','fctwz',
-        'fctwz.','fdiv','fdiv.','fdivs','fdivs.','fmadd','fmadd.','fmadds',
-        'fmadds.','fmr','fmsub','fmsub.','fmsubs','fmsubs.','fmul','fmul.',
-        'fmuls','fmuls.','fnabs','fnabs.','fneg','fneg.','fnmadd',
-        'fnmadd.','fnmadds','fnmadds.','fnmsub','fnmsub.','fnmsubs',
-        'fnmsubs.','fres','fres.','frsp','frsp.','frsqrte','frsqrte.',
-        'fsel','fsel.','fsqrt','fsqrt.','fsqrts','fsqrts.','fsub','fsub.',
-        'fsubs','fsubs.','icbi','isync','lbz','lbzu','lbzux','lbzx',
-        'lfd','lfdu','lfdux','lfdx','lfs','lfsu','lfsux','lfsx','lha',
-        'lhau','lhaux','lhax','hbrx','lhz','lhzu','lhzux','lhzx','lmw',
-        'lswi','lswx','lwarx','lwbrx','lwz','lwzu','lwzux','lwzx','mcrf',
-        'mcrfs','mcrxr','lcrxe','mfcr','mffs','maffs.','mfmsr','mfspr','mfsr',
-        'mfsrin','mftb','mtfcrf','mtfd0','mtfsb1','mtfsf','mtfsf.',
-        'mtfsfi','mtfsfi.','mtmsr','mtspr','mtsr','mtsrin','mulhw',
-        'mulhw.','mulhwu','mulhwu.','mulli','mullw','mullw.','mullwo',
-        'mullwo.','nand','nand.','neg','neg.','nego','nego.','nor','nor.',
-        'or','or.','orc','orc.','ori','oris', 'rfi', 'rlwimi', 'rlwimi.',
-        'rlwinm', 'rlwinm.','rlwnm','sc','slw', 'slw.', 'sraw', 'sraw.',
-        'srawi', 'srawi.','srw', 'srw.', 'stb', 'stbu', 'stbux','stbx','stfd',
-        'stfdu', 'stfdux', 'stfdx', 'stfiwx', 'stfs', 'stfsu', 'stfsux', 'stfsx',
-        'sth', 'sthbrx', 'sthu', 'sthux', 'sthx', 'stmw', 'stswi', 'stswx', 'stw',
-        'stwbrx', 'stwx.', 'stwu', 'stwux', 'stwx', 'subf', 'subf.', 'subfo',
-        'subfo.', 'subfc', 'subc.', 'subfco', 'subfco.', 'subfe', 'subfe.',
-        'subfeo', 'subfeo.', 'subfic', 'subfme', 'subfme.', 'subfmeo', 'subfmeo.',
-        'subfze', 'subfze.', 'subfzeo', 'subfzeo.', 'sync', 'tlbia', 'tlbie',
-        'tlbsync', 'tw', 'twi', 'xor', 'xor.', 'xori', 'xoris',
-        { some simplified mnemonics }
-        'subi', 'subis', 'subic', 'subic.', 'sub', 'sub.', 'subo', 'subo.',
-        'subc', 'subc.', 'subco', 'subco.', 'cmpwi', 'cmpw', 'cmplwi', 'cmplw',
-        'extlwi', 'extlwi.', 'extrwi', 'extrwi.', 'inslwi', 'inslwi.', 'insrwi',
-        'insrwi.', 'rotlwi', 'rotlwi.', 'rotlw', 'rotlw.', 'slwi', 'slwi.',
-        'srwi', 'srwi.', 'clrlwi', 'clrlwi.', 'clrrwi', 'clrrwi.', 'clrslwi',
-        'clrslwi.', 'blr', 'bctr', 'blrl', 'bctrl', 'crset', 'crclr', 'crmove',
-        'crnot', 'mt', 'mf','nop', 'li', 'lis', 'la', 'mr','mr.','not', 'mtcr', 'mtlr', 'mflr',
-        'mtctr', 'mfctr');
-
-    function gas_regname(r:Tnewregister):string;
 
   implementation
 
     uses
        cutils,globals,verbose,
-       systems,
+       cginfo,systems,
        assemble,
+       itppcgas,
        aasmcpu;
 
     procedure TPPCGNUAssembler.WriteExtraHeader;
@@ -145,25 +84,10 @@ unit agppcgas;
 
      symaddr2str: array[trefsymaddr] of string[3] = ('','@ha','@l');
 
-    function gas_regname(r:Tnewregister):string;
-
-    var s:Tsuperregister;
-
-    begin
-      s:=r shr 8;
-      if s in [RS_R0..RS_R31] then
-        gas_regname:='r'+tostr(s-RS_R0)
-      else
-        begin
-          {Generate a systematic name.}
-          gas_regname:='reg'+tostr(s)+'d';
-        end;
-    end;
 
     function getreferencestring(var ref : treference) : string;
     var
       s : string;
-      i,b:boolean;
     begin
        with ref do
         begin
@@ -191,9 +115,7 @@ unit agppcgas;
            if (symaddr <> refs_full) then
              s := s+')'+symaddr2str[symaddr];
 
-           b:=(base.enum=R_NO) or ((base.enum=R_INTREGISTER) and (base.number=NR_NO));
-           i:=(index.enum=R_NO) or ((index.enum=R_INTREGISTER) and (index.number=NR_NO));
-           if i and not b then
+           if (index=NR_NO) and (base<>NR_NO) then
              begin
                 if offset=0 then
                   begin
@@ -202,18 +124,15 @@ unit agppcgas;
                      else
                        s:=s+'0';
                   end;
-                if base.enum=R_INTREGISTER then
-                  s:=s+'('+gas_regname(base.number)+')'
-                else
-                  s:=s+'('+gas_reg2str[base.enum]+')';
+                s:=s+'('+gas_regname(base)+')';
              end
-           else if (not i) and (not b) and (offset=0) then
-             if base.enum=R_INTREGISTER then
-               s:=s+gas_regname(base.number)+','+gas_regname(index.number)
-             else
-               s:=s+gas_reg2str[base.enum]+','+gas_reg2str[index.enum]
-           else if (not i) or (not b) then
-             internalerror(19992);
+           else if (index<>NR_NO) and (base<>NR_NO) then
+             begin
+               if (offset=0) then
+                 s:=s+gas_regname(base)+','+gas_regname(index)
+               else
+                 internalerror(19992);
+             end;
         end;
       getreferencestring:=s;
     end;
@@ -225,12 +144,7 @@ unit agppcgas;
     begin
       case o.typ of
         top_reg :
-          begin
-            if o.reg.enum=R_INTREGISTER then
-              getopstr_jmp:=gas_regname(o.reg.number)
-            else
-              getopstr_jmp:=gas_reg2str[o.reg.enum];
-          end;
+          getopstr_jmp:=gas_regname(o.reg);
         { no top_ref jumping for powerpc }
         top_const :
           getopstr_jmp:=tostr(o.val);
@@ -257,12 +171,7 @@ unit agppcgas;
     begin
       case o.typ of
         top_reg:
-          begin
-            if  o.reg.enum=R_INTREGISTER then
-              getopstr:=gas_regname(o.reg.number)
-            else
-              getopstr:=gas_reg2str[o.reg.enum];
-          end;
+          getopstr:=gas_regname(o.reg);
         top_const:
           getopstr:=tostr(longint(o.val));
         top_ref:
@@ -306,14 +215,14 @@ unit agppcgas;
     begin
       tempstr:=#9;
       case c.simple of
-        false: cond2str := tempstr+op2str[op]+#9+tostr(c.bo)+','+
+        false: cond2str := tempstr+gas_op2str[op]+#9+tostr(c.bo)+','+
                            tostr(c.bi);
         true:
           if (op >= A_B) and (op <= A_BCLRL) then
             case c.cond of
               { unconditional branch }
               C_NONE:
-                cond2str := tempstr+op2str[op];
+                cond2str := tempstr+gas_op2str[op];
               { bdnzt etc }
               else
                 begin
@@ -321,7 +230,7 @@ unit agppcgas;
                               branchmode(op)+#9;
                   case c.cond of
                     C_LT..C_NU:
-                      cond2str := tempstr+gas_reg2str[c.cr];
+                      cond2str := tempstr+gas_regname(newreg(R_SPECIALREGISTER,c.cr,R_SUBWHOLE));
                     C_T..C_DZF:
                       cond2str := tempstr+tostr(c.crbit);
                   end;
@@ -349,9 +258,9 @@ unit agppcgas;
           { direct BO/BI in op[0] and op[1] not supported, put them in condition! }
           case op of
              A_B,A_BA,A_BL,A_BLA:
-               s:=#9+op2str[op]+#9;
+               s:=#9+gas_op2str[op]+#9;
              A_BCTR,A_BCTRL,A_BLR,A_BLRL:
-               s:=#9+op2str[op]
+               s:=#9+gas_op2str[op]
              else
                s:=cond2str(op,taicpu(hp).condition)+',';
           end;
@@ -362,7 +271,7 @@ unit agppcgas;
       else
         { process operands }
         begin
-          s:=#9+op2str[op];
+          s:=#9+gas_op2str[op];
           if taicpu(hp).ops<>0 then
             begin
             {
@@ -389,7 +298,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.29  2003-08-20 14:28:52  daniel
+  Revision 1.30  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.29  2003/08/20 14:28:52  daniel
     * Fixed PowerPC compilation
 
   Revision 1.28  2003/08/19 11:53:03  daniel

compiler/powerpc/agppcmpw.pas

@@ -34,19 +34,6 @@ interface
        globals,aasmbase,aasmcpu,assemble,
        cpubase;
 
-    const
-      mpw_reg2str : treg2strtable = ('',
-        'r0','r1','r2','r3','r4','r5','r6','r7','r8','r9','r10','r11','r12','r13','r14','r15','r16',
-        'r17','r18','r19','r20','r21','r22','r23','r24','r25','r26','r27','r28','r29','r30','r31',
-        'f0','f1','f2','f3','f4','f5','f6','f7', 'f8','f9','f10','f11','f12',
-        'f13','f14','f15','f16','f17', 'f18','f19','f20','f21','f22', 'f23','f24',
-        'f25','f26','f27','f28','f29','f30','f31',
-        'v0','v1','v2','v3','v4','v5','v6','v7','v8','v9','v10','v11','v12',
-        'v13','v14','v15','v16','v17','v18','v19','v20','v21','v22', 'v23','v24',
-        'v25','v26','v27','v28','v29','v30','v31',
-        'cR','cr0','cr1','cr2','cr3','cr4','cr5','cr6','cr7',
-        'xer','lr','ctr','fpscr'
-      );
     type
       TPPCMPWAssembler = class(TExternalAssembler)
         procedure WriteTree(p:TAAsmoutput);override;
@@ -70,7 +57,9 @@ interface
       sysutils,
 {$endif}
       cutils,globtype,systems,cclasses,
-      verbose,finput,fmodule,script,cpuinfo
+      verbose,finput,fmodule,script,cpuinfo,
+      cginfo,
+      itppcgas
       ;
 
     const
@@ -112,73 +101,10 @@ var
           end;
     end;
 
-    const
 
 {*** From here is copyed from agppcgas.pp, except where marked with CHANGED.
      Perhaps put in a third common file. ***}
 
-       op2str : array[tasmop] of string[14] = ('<none>',
-         'add','add.','addo','addo.','addc','addc.','addco','addco.',
-         'adde','adde.','addeo','addeo.','addi','addic','addic.','addis',
-         'addme','addme.','addmeo','addmeo.','addze','addze.','addzeo',
-         'addzeo.','and','and.','andc','andc.','andi.','andis.','b',
-         'ba','bl','bla','bc','bca','bcl','bcla','bcctr','bcctrl','bclr',
-         'bclrl','cmp','cmpi','cmpl','cmpli','cntlzw','cntlzw.','crand',
-         'crandc','creqv','crnand','crnor','cror','crorc','crxor','dcba',
-         'dcbf','dcbi','dcbst','dcbt','divw','divw.','divwo','divwo.',
-         'divwu','divwu.','divwuo','divwuo.','eciwx','ecowx','eieio','eqv',
-         'eqv.','extsb','extsb.','extsh','extsh.','fabs','fabs.','fadd',
-         'fadd.','fadds','fadds.','fcmpo','fcmpu','fctiw','fctw.','fctwz',
-         'fctwz.','fdiv','fdiv.','fdivs','fdivs.','fmadd','fmadd.','fmadds',
-         'fmadds.','fmr','fmsub','fmsub.','fmsubs','fmsubs.','fmul','fmul.',
-         'fmuls','fmuls.','fnabs','fnabs.','fneg','fneg.','fnmadd',
-         'fnmadd.','fnmadds','fnmadds.','fnmsub','fnmsub.','fnmsubs',
-         'fnmsubs.','fres','fres.','frsp','frsp.','frsqrte','frsqrte.',
-         'fsel','fsel.','fsqrt','fsqrt.','fsqrts','fsqrts.','fsub','fsub.',
-         'fsubs','fsubs.','icbi','isync','lbz','lbzu','lbzux','lbzx',
-         'lfd','lfdu','lfdux','lfdx','lfs','lfsu','lfsux','lfsx','lha',
-         'lhau','lhaux','lhax','hbrx','lhz','lhzu','lhzux','lhzx','lmw',
-         'lswi','lswx','lwarx','lwbrx','lwz','lwzu','lwzux','lwzx','mcrf',
-         'mcrfs','mcrxr','lcrxe','mfcr','mffs','maffs.','mfmsr','mfspr','mfsr',
-         'mfsrin','mftb','mtfcrf','mtfd0','mtfsb1','mtfsf','mtfsf.',
-         'mtfsfi','mtfsfi.','mtmsr','mtspr','mtsr','mtsrin','mulhw',
-         'mulhw.','mulhwu','mulhwu.','mulli','mullw','mullw.','mullwo',
-         'mullwo.','nand','nand.','neg','neg.','nego','nego.','nor','nor.',
-         'or','or.','orc','orc.','ori','oris', 'rfi', 'rlwimi', 'rlwimi.',
-         'rlwinm', 'rlwinm.','rlwnm','sc','slw', 'slw.', 'sraw', 'sraw.',
-         'srawi', 'srawi.','srw', 'srw.', 'stb', 'stbu', 'stbux','stbx','stfd',
-         'stfdu', 'stfdux', 'stfdx', 'stfiwx', 'stfs', 'stfsu', 'stfsux', 'stfsx',
-         'sth', 'sthbrx', 'sthu', 'sthux', 'sthx', 'stmw', 'stswi', 'stswx', 'stw',
-         'stwbrx', 'stwx.', 'stwu', 'stwux', 'stwx', 'subf', 'subf.', 'subfo',
-         'subfo.', 'subfc', 'subc.', 'subfco', 'subfco.', 'subfe', 'subfe.',
-         'subfeo', 'subfeo.', 'subfic', 'subfme', 'subfme.', 'subfmeo', 'subfmeo.',
-         'subfze', 'subfze.', 'subfzeo', 'subfzeo.', 'sync', 'tlbia', 'tlbie',
-         'tlbsync', 'tw', 'twi', 'xor', 'xor.', 'xori', 'xoris',
-         { some simplified mnemonics }
-         'subi', 'subis', 'subic', 'subic.', 'sub', 'sub.', 'subo', 'subo.',
-         'subc', 'subc.', 'subco', 'subco.', 'cmpwi', 'cmpw', 'cmplwi', 'cmplw',
-         'extlwi', 'extlwi.', 'extrwi', 'extrwi.', 'inslwi', 'inslwi.', 'insrwi',
-         'insrwi.', 'rotlwi', 'rotlwi.', 'rotlw', 'rotlw.', 'slwi', 'slwi.',
-         'srwi', 'srwi.', 'clrlwi', 'clrlwi.', 'clrrwi', 'clrrwi.', 'clrslwi',
-         'clrslwi.', 'blr', 'bctr', 'blrl', 'bctrl', 'crset', 'crclr', 'crmove',
-         'crnot', 'mt', 'mf','nop', 'li', 'lis', 'la', 'mr','mr.','not', 'mtcr', 'mtlr', 'mflr',
-         'mtctr', 'mfctr');
-
-    function mpw_regname(r:Tnewregister):string;
-
-    var s:Tsuperregister;
-
-    begin
-      s:=r shr 8;
-      if s in [RS_R0..RS_R31] then
-        mpw_regname:='r'+tostr(s-RS_R0)
-      else
-        begin
-          {Generate a systematic name.}
-          mpw_regname:='reg'+tostr(s)+'d';
-        end;
-    end;
-
 
     function getreferencestring(var ref : treference) : string;
 
@@ -220,25 +146,20 @@ var
                s:=s+tostr(offset);
             end;
 
-          b:=(base.enum=R_NO) or ((base.enum=R_INTREGISTER) and (base.number=NR_NO));
-          i:=(index.enum=R_NO) or ((index.enum=R_INTREGISTER) and (index.number=NR_NO));
-          if i and not b then
+          if (index=NR_NO) and (base<>NR_NO) then
             begin
               if offset=0 then
                 if not assigned(symbol) then
                   s:=s+'0';
-              if base.enum=R_INTREGISTER then
-                s:=s+'('+mpw_regname(base.number)+')'
-              else
-                s:=s+'('+mpw_reg2str[base.enum]+')';
+              s:=s+'('+gas_regname(base)+')';
             end
-          else if (not i) and (not b) and (offset=0) then
-            if base.enum=R_INTREGISTER then
-              s:=s+mpw_regname(base.number)+','+mpw_regname(index.number)
-            else
-              s:=s+mpw_reg2str[base.enum]+','+mpw_reg2str[index.enum]
-          else if (not i) or (not b) then
-            internalerror(19992);
+          else if (index<>NR_NO) and (base<>NR_NO) and (offset=0) then
+            begin
+              if (offset=0) then
+                s:=s+gas_regname(base)+','+gas_regname(index)
+              else
+                internalerror(19992);
+            end;
         end;
       getreferencestring:=s;
     end;
@@ -249,12 +170,7 @@ var
     begin
       case o.typ of
         top_reg :
-          begin
-            if o.reg.enum=R_INTREGISTER then
-              getopstr_jmp:=mpw_regname(o.reg.number)
-            else
-              getopstr_jmp:=mpw_reg2str[o.reg.enum];
-          end;
+          getopstr_jmp:=gas_regname(o.reg);
         { no top_ref jumping for powerpc }
         top_const :
           getopstr_jmp:=tostr(o.val);
@@ -282,12 +198,7 @@ var
     begin
       case o.typ of
         top_reg:
-          begin
-            if  o.reg.enum=R_INTREGISTER then
-              getopstr:=mpw_regname(o.reg.number)
-            else
-              getopstr:=mpw_reg2str[o.reg.enum];
-          end;
+          getopstr:=gas_regname(o.reg);
         top_const:
           getopstr:=tostr(longint(o.val));
         top_ref:
@@ -332,14 +243,14 @@ var
     begin
       tempstr:=#9;
       case c.simple of
-        false: cond2str := tempstr+op2str[op]+#9+tostr(c.bo)+','+
+        false: cond2str := tempstr+gas_op2str[op]+#9+tostr(c.bo)+','+
                            tostr(c.bi);
         true:
           if (op >= A_B) and (op <= A_BCLRL) then
             case c.cond of
               { unconditional branch }
               C_NONE:
-                cond2str := tempstr+op2str[op];
+                cond2str := tempstr+gas_op2str[op];
               { bdnzt etc }
               else
                 begin
@@ -347,7 +258,7 @@ var
                               branchmode(op)+#9;
                   case c.cond of
                     C_LT..C_NU:
-                      cond2str := tempstr+mpw_reg2str[c.cr];
+                      cond2str := tempstr+gas_regname(newreg(R_SPECIALREGISTER,c.cr,R_SUBNONE));
                     C_T..C_DZF:
                       cond2str := tempstr+tostr(c.crbit);
                   end;
@@ -375,11 +286,11 @@ var
           { direct BO/BI in op[0] and op[1] not supported, put them in condition! }
           case op of
              A_B,A_BA:
-               s:=#9+op2str[op]+#9;
+               s:=#9+gas_op2str[op]+#9;
              A_BCTR,A_BCTRL,A_BLR,A_BLRL:
-               s:=#9+op2str[op];
+               s:=#9+gas_op2str[op];
              A_BL,A_BLA:
-               s:=#9+op2str[op]+#9'.';
+               s:=#9+gas_op2str[op]+#9'.';
              else
                s:=cond2str(op,taicpu(hp).condition)+',';
           end;
@@ -394,13 +305,13 @@ var
         begin
           case op of
              A_MFSPR:
-               case taicpu(hp).oper[1].reg.enum of
-                  R_CR:
+               case taicpu(hp).oper[1].reg of
+                  NR_CR:
                     begin
                        op:=A_MFCR;
                        taicpu(hp).ops:=1;
                     end;
-                  R_LR:
+                  NR_LR:
                     begin
                        op:=A_MFLR;
                        taicpu(hp).ops:=1;
@@ -409,13 +320,13 @@ var
                     internalerror(2002100701);
                end;
              A_MTSPR:
-               case taicpu(hp).oper[1].reg.enum of
-                  R_CR:
+               case taicpu(hp).oper[1].reg of
+                  NR_CR:
                     begin
                        op:=A_MTCR;
                        taicpu(hp).ops:=1;
                     end;
-                  R_LR:
+                  NR_LR:
                     begin
                        op:=A_MTLR;
                        taicpu(hp).ops:=1;
@@ -424,7 +335,7 @@ var
                     internalerror(2002100701);
                end;
           end;
-          s:=#9+op2str[op];
+          s:=#9+gas_op2str[op];
           if taicpu(hp).ops<>0 then
             begin
                sep:=#9;
@@ -1351,7 +1262,10 @@ initialization
 end.
 {
   $Log$
-  Revision 1.23  2003-08-24 21:40:12  olle
+  Revision 1.24  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.23  2003/08/24 21:40:12  olle
     * minor adjustment
 
   Revision 1.21  2003/08/18 11:47:15  olle

compiler/powerpc/cgcpu.pas

@@ -28,9 +28,9 @@ unit cgcpu;
 
     uses
        symtype,
-       cgbase,cgobj,
+       cginfo,cgbase,cgobj,
        aasmbase,aasmcpu,aasmtai,
-       cpubase,cpuinfo,node,cg64f32,cginfo;
+       cpubase,cpuinfo,node,cg64f32;
 
     type
       tcgppc = class(tcg)
@@ -91,8 +91,8 @@ unit cgcpu;
         { that's the case, we can use rlwinm to do an AND operation        }
         function get_rlwi_const(a: aword; var l1, l2: longint): boolean;
 
-        procedure g_save_standard_registers(list : taasmoutput; usedinproc : Tsupregset);override;
-        procedure g_restore_standard_registers(list : taasmoutput; usedinproc : Tsupregset);override;
+        procedure g_save_standard_registers(list : taasmoutput; usedinproc : Tsuperregisterset);override;
+        procedure g_restore_standard_registers(list : taasmoutput; usedinproc : Tsuperregisterset);override;
         procedure g_save_all_registers(list : taasmoutput);override;
         procedure g_restore_all_registers(list : taasmoutput;accused,acchiused:boolean);override;
 
@@ -533,8 +533,6 @@ const
           end;
 
       begin
-         if src.enum<>R_INTREGISTER then
-           internalerror(200303102);
         if op = OP_SUB then
           begin
 {$ifopt q+}
@@ -726,7 +724,6 @@ const
           p: taicpu;
           scratch_register: TRegister;
           signed: boolean;
-          r:Tregister;
 
         begin
           signed := cmp_op in [OC_GT,OC_LT,OC_GTE,OC_LTE];
@@ -735,25 +732,24 @@ const
           if (cmp_op in [OC_EQ,OC_NE]) and
              (a > $ffff) then
             signed := true;
-          r.enum:=R_CR0;
           if signed then
             if (longint(a) >= low(smallint)) and (longint(a) <= high(smallint)) Then
-              list.concat(taicpu.op_reg_reg_const(A_CMPWI,r,reg,longint(a)))
+              list.concat(taicpu.op_reg_reg_const(A_CMPWI,NR_CR0,reg,longint(a)))
             else
               begin
                 scratch_register := rg.getregisterint(list,OS_INT);
                 a_load_const_reg(list,OS_32,a,scratch_register);
-                list.concat(taicpu.op_reg_reg_reg(A_CMPW,r,reg,scratch_register));
+                list.concat(taicpu.op_reg_reg_reg(A_CMPW,NR_CR0,reg,scratch_register));
                 rg.ungetregisterint(list,scratch_register);
               end
           else
             if (a <= $ffff) then
-              list.concat(taicpu.op_reg_reg_const(A_CMPLWI,r,reg,a))
+              list.concat(taicpu.op_reg_reg_const(A_CMPLWI,NR_CR0,reg,a))
             else
               begin
                 scratch_register := rg.getregisterint(list,OS_INT);
                 a_load_const_reg(list,OS_32,a,scratch_register);
-                list.concat(taicpu.op_reg_reg_reg(A_CMPLW,r,reg,scratch_register));
+                list.concat(taicpu.op_reg_reg_reg(A_CMPLW,NR_CR0,reg,scratch_register));
                 rg.ungetregisterint(list,scratch_register);
               end;
           a_jmp(list,A_BC,TOpCmp2AsmCond[cmp_op],0,l);
@@ -765,25 +761,24 @@ const
 
         var
           p: taicpu;
-            op: tasmop;
-          r:Tregister;
+          op: tasmop;
 
         begin
           if cmp_op in [OC_GT,OC_LT,OC_GTE,OC_LTE] then
             op := A_CMPW
-          else op := A_CMPLW;
-          r.enum:=R_CR0;
-          list.concat(taicpu.op_reg_reg_reg(op,r,reg2,reg1));
+          else
+            op := A_CMPLW;
+          list.concat(taicpu.op_reg_reg_reg(op,NR_CR0,reg2,reg1));
           a_jmp(list,A_BC,TOpCmp2AsmCond[cmp_op],0,l);
         end;
 
 
-     procedure tcgppc.g_save_standard_registers(list : taasmoutput; usedinproc : Tsupregset);
+     procedure tcgppc.g_save_standard_registers(list : taasmoutput; usedinproc : Tsuperregisterset);
        begin
          {$warning FIX ME}
        end;
 
-     procedure tcgppc.g_restore_standard_registers(list : taasmoutput; usedinproc : Tsupregset);
+     procedure tcgppc.g_restore_standard_registers(list : taasmoutput; usedinproc : Tsuperregisterset);
        begin
          {$warning FIX ME}
        end;
@@ -814,11 +809,9 @@ const
 
        var
          c: tasmcond;
-         r:Tregister;
        begin
          c := flags_to_cond(f);
-         r.enum:=R_CR0;
-         a_jmp(list,A_BC,c.cond,ord(c.cr)-ord(r.enum),l);
+         a_jmp(list,A_BC,c.cond,c.cr-RS_CR0,l);
        end;
 
      procedure tcgppc.g_flags2reg(list: taasmoutput; size: TCgSize; const f: TResFlags; reg: TRegister);
@@ -830,7 +823,7 @@ const
        begin
          { get the bit to extract from the conditional register + its }
          { requested value (0 or 1)                                   }
-         testbit := ((ord(f.cr)-ord(R_CR0)) * 4);
+         testbit := ((f.cr-RS_CR0) * 4);
          case f.flag of
            F_EQ,F_NE:
              begin
@@ -925,13 +918,14 @@ const
        g_return_from_proc is called.}
 
 
-     var regcounter,firstregfpu,firstreggpr: TRegister;
+     var regcounter,firstregfpu,firstreggpr: TSuperRegister;
          href,href2 : treference;
          usesfpr,usesgpr,gotgot : boolean;
          parastart : aword;
          offset : aword;
-         r,r2,rsp:Tregister;
+//         r,r2,rsp:Tregister;
          regcounter2: Tsuperregister;
+         regidx : tregisterindex;
          hp: tparaitem;
 
       begin
@@ -949,13 +943,16 @@ const
         if not (po_assembler in current_procinfo.procdef.procoptions) then
 {$warning FIXME!!}
           { FIXME: has to be R_F8 instad of R_F14 for SYSV abi }
-          for regcounter.enum:=R_F14 to R_F31 do
-            if regcounter.enum in rg.used_in_proc_other then
+          for regcounter:=RS_F14 to RS_F31 do
+           begin
+             regidx:=findreg_by_number(newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE));
+            if regidx in rg.used_in_proc_other then
               begin
                 usesfpr:= true;
                 firstregfpu:=regcounter;
                 break;
               end;
+           end;
 
         usesgpr:=false;
         if not (po_assembler in current_procinfo.procdef.procoptions) then
@@ -964,7 +961,7 @@ const
               if regcounter2 in rg.used_in_proc_int then
                 begin
                    usesgpr:=true;
-                   firstreggpr:=newreg(R_INTREGISTER,regcounter2,R_SUBNONE);
+                   firstreggpr:=regcounter2;
                    break;
                 end;
             end;
@@ -978,11 +975,11 @@ const
                { ... in caller's frame }
                case target_info.abi of
                  abi_powerpc_aix:
-                   reference_reset_base(href,rsp,LA_LR_AIX);
+                   reference_reset_base(href,NR_STACK_POINTER_REG,LA_LR_AIX);
                  abi_powerpc_sysv:
-                   reference_reset_base(href,rsp,LA_LR_SYSV);
+                   reference_reset_base(href,NR_STACK_POINTER_REG,LA_LR_SYSV);
                end;
-               list.concat(taicpu.op_reg_ref(A_STW,r,href));
+               list.concat(taicpu.op_reg_ref(A_STW,NR_R0,href));
                a_reg_dealloc(list,NR_R0);
             end;
 
@@ -993,8 +990,8 @@ const
               begin
                 a_reg_alloc(list,NR_R0);
                 list.concat(taicpu.op_reg_reg(A_MFSPR,NR_R0,NR_CR));
-                reference_reset_base(href,rsp,LA_CR_AIX);
-                list.concat(taicpu.op_reg_ref(A_STW,r,href));
+                reference_reset_base(href,NR_STACK_POINTER_REG,LA_CR_AIX);
+                list.concat(taicpu.op_reg_ref(A_STW,NR_R0,href));
                 a_reg_dealloc(list,NR_R0);
               end;
 
@@ -1030,7 +1027,6 @@ const
 
         { no GOT pointer loaded yet }
         gotgot:=false;
-        r := NR_R12;
         if usesfpr then
           begin
              { save floating-point registers
@@ -1042,16 +1038,19 @@ const
              else
                a_call_name(objectlibrary.newasmsymbol('_savefpr_'+tostr(ord(firstregfpu)-ord(R_F14)+14));
              }
-             reference_reset_base(href,r,-8);
-             for regcounter.enum:=firstregfpu.enum to R_F31 do
-               if regcounter.enum in rg.used_in_proc_other then
+             reference_reset_base(href,NR_R12,-8);
+             for regcounter:=firstregfpu to RS_F31 do
+              begin
+                regidx:=findreg_by_number(newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE));
+                if regidx in rg.used_in_proc_other then
                  begin
-                    a_loadfpu_reg_ref(list,OS_F64,regcounter,href);
+                    a_loadfpu_reg_ref(list,OS_F64,newreg(R_FPUREGISTER,regcounter,R_SUBNONE),href);
                     dec(href.offset,8);
                  end;
+               end;
 
              { compute end of gpr save area }
-             a_op_const_reg(list,OP_ADD,OS_ADDR,aword(href.offset+8),r);
+             a_op_const_reg(list,OP_ADD,OS_ADDR,aword(href.offset+8),NR_R12);
           end;
 
         { save gprs and fetch GOT pointer }
@@ -1066,21 +1065,20 @@ const
              else
                a_call_name(objectlibrary.newasmsymbol('_savegpr_'+tostr(ord(firstreggpr)-ord(R_14)+14))
              }
-            reference_reset_base(href,r,-4);
+            reference_reset_base(href,NR_R12,-4);
             for regcounter2:=firstsaveintreg to RS_R31 do
               begin
                 if regcounter2 in rg.used_in_proc_int then
                   begin
                      usesgpr:=true;
-                     r:=newreg(R_INTREGISTER,regcounter2,R_SUBNONE);
-                     a_load_reg_ref(list,OS_INT,OS_INT,r,href);
+                     a_load_reg_ref(list,OS_INT,OS_INT,newreg(R_INTREGISTER,regcounter2,R_SUBNONE),href);
                      dec(href.offset,4);
                   end;
               end;
 {
             r.enum:=R_INTREGISTER;
-            r.number:=NR_R12;
-            reference_reset_base(href,r,-((NR_R31-firstreggpr.number) shr 8+1)*4);
+            r.:=;
+            reference_reset_base(href,NR_R12,-((NR_R31-firstreggpr) shr 8+1)*4);
             list.concat(taicpu.op_reg_ref(A_STMW,firstreggpr,href));
 }
           end;
@@ -1090,22 +1088,21 @@ const
             if not (po_assembler in current_procinfo.procdef.procoptions) then
               begin
                 { copy memory parameters to local parast }
-                r:=NR_R12;
                 hp:=tparaitem(current_procinfo.procdef.para.first);
                 while assigned(hp) do
                   begin
                     if (hp.paraloc[calleeside].loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
                       begin
                         reference_reset_base(href,current_procinfo.framepointer,tvarsym(hp.parasym).adjusted_address);
-                        reference_reset_base(href2,r,hp.paraloc[callerside].reference.offset);
+                        reference_reset_base(href2,NR_R12,hp.paraloc[callerside].reference.offset);
                         cg.a_load_ref_ref(list,hp.paraloc[calleeside].size,hp.paraloc[calleeside].size,href2,href);
                       end
-{$ifdef newra2}
+{$ifdef dummy}
                     else if (hp.calleeparaloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
                       begin
                         rg.getexplicitregisterint(list,hp.calleeparaloc.register);
                       end
-{$endif newra}
+{$endif dummy}
                       ;
                     hp := tparaitem(hp.next);
                   end;
@@ -1139,7 +1136,7 @@ const
         { if we're in a nested procedure, we've to save R11 }
         if current_procinfo.procdef.parast.symtablelevel>2 then
           begin
-             reference_reset_base(href,rsp,PARENT_FRAMEPOINTER_OFFSET);
+             reference_reset_base(href,NR_STACK_POINTER_REG,PARENT_FRAMEPOINTER_OFFSET);
              list.concat(taicpu.op_reg_ref(A_STW,NR_R11,href));
           end;
 
@@ -1150,25 +1147,27 @@ const
        g_stackframe_entry is called.}
 
       var
-         regcounter,firstregfpu,firstreggpr: TRegister;
+         regcounter,firstregfpu,firstreggpr: TsuperRegister;
          href : treference;
          usesfpr,usesgpr,genret : boolean;
-         r,r2:Tregister;
          regcounter2:Tsuperregister;
          localsize: aword;
-
+         regidx : tregisterindex;
       begin
         { AltiVec context restore, not yet implemented !!! }
 
         usesfpr:=false;
         if not (po_assembler in current_procinfo.procdef.procoptions) then
-          for regcounter.enum:=R_F14 to R_F31 do
-            if regcounter.enum in rg.used_in_proc_other then
+          for regcounter:=RS_F14 to RS_F31 do
+           begin
+             regidx:=findreg_by_number(newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE));
+             if regidx in rg.used_in_proc_other then
               begin
                  usesfpr:=true;
                  firstregfpu:=regcounter;
                  break;
               end;
+           end;
 
         usesgpr:=false;
         if not (po_assembler in current_procinfo.procdef.procoptions) then
@@ -1177,7 +1176,7 @@ const
               if regcounter2 in rg.used_in_proc_int then
                 begin
                   usesgpr:=true;
-                  firstreggpr:=newreg(R_INTREGISTER,regcounter2,R_SUBNONE);
+                  firstreggpr:=regcounter2;
                   break;
                 end;
             end;
@@ -1193,12 +1192,15 @@ const
              if usesfpr then
                begin
                  reference_reset_base(href,NR_R12,-8);
-                 for regcounter.enum := firstregfpu.enum to R_F31 do
-                   if (regcounter.enum in rg.used_in_proc_other) then
+                 for regcounter := firstregfpu to RS_F31 do
+                  begin
+                    regidx:=findreg_by_number(newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE));
+                    if regidx in rg.used_in_proc_other then
                      begin
-                       a_loadfpu_ref_reg(list,OS_F64,href,regcounter);
+                       a_loadfpu_ref_reg(list,OS_F64,href,newreg(R_FPUREGISTER,regcounter,R_SUBNONE));
                        dec(href.offset,8);
                      end;
+                  end;
                  inc(href.offset,4);
                end
              else
@@ -1209,14 +1211,13 @@ const
                 if regcounter2 in rg.used_in_proc_int then
                   begin
                      usesgpr:=true;
-                     r:=newreg(R_INTREGISTER,regcounter2,R_SUBNONE);
-                     a_load_ref_reg(list,OS_INT,OS_INT,href,r);
+                     a_load_ref_reg(list,OS_INT,OS_INT,href,newreg(R_INTREGISTER,regcounter2,R_SUBNONE));
                      dec(href.offset,4);
                   end;
               end;
 
 (*
-             reference_reset_base(href,r2,-((NR_R31-ord(firstreggpr.number)) shr 8+1)*4);
+             reference_reset_base(href,r2,-((NR_R31-ord(firstreggpr)) shr 8+1)*4);
              list.concat(taicpu.op_reg_ref(A_LMW,firstreggpr,href));
 *)
           end;
@@ -1226,8 +1227,7 @@ const
         if usesfpr then
           begin
              { address of fpr save area to r11 }
-             r.enum:=R_INTREGISTER;
-             r.number:=NR_R12;
+             r:=NR_R12;
              list.concat(taicpu.op_reg_reg_const(A_ADDI,r,r,(ord(R_F31)-ord(firstregfpu.enum)+1)*8));
              {
              if (pi_do_call in current_procinfo.flags) then
@@ -1283,24 +1283,25 @@ const
      the save area right below the address the stackpointer point to.
      Returns the actual used save area size.}
 
-     var regcounter,firstregfpu,firstreggpr: TRegister;
+     var regcounter,firstregfpu,firstreggpr: TSuperRegister;
          usesfpr,usesgpr: boolean;
          href : treference;
          offset: integer;
-         r,r2:Tregister;
          regcounter2: Tsuperregister;
-
+         regidx : tregisterindex;
     begin
       usesfpr:=false;
       if not (po_assembler in current_procinfo.procdef.procoptions) then
-        for regcounter.enum:=R_F14 to R_F31 do
-          if regcounter.enum in rg.used_in_proc_other then
+        for regcounter:=RS_F14 to RS_F31 do
+         begin
+             regidx:=findreg_by_number(newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE));
+            if regidx in rg.used_in_proc_other then
             begin
                usesfpr:=true;
                firstregfpu:=regcounter;
                break;
             end;
-
+         end;
       usesgpr:=false;
       if not (po_assembler in current_procinfo.procdef.procoptions) then
         for regcounter2:=firstsaveintreg to RS_R31 do
@@ -1308,7 +1309,7 @@ const
             if regcounter2 in rg.used_in_proc_int then
               begin
                  usesgpr:=true;
-                 firstreggpr:=newreg(R_INTREGISTER,regcounter2,R_SUBNONE);
+                 firstreggpr:=regcounter2;
                  break;
               end;
           end;
@@ -1316,35 +1317,30 @@ const
 
       { save floating-point registers }
       if usesfpr then
-        for regcounter.enum := firstregfpu.enum to R_F31 do
+        for regcounter := firstregfpu to RS_F31 do
           begin
             offset:= offset - 8;
-            r.enum:=R_INTREGISTER;
-            r.number:=NR_STACK_POINTER_REG;
-            reference_reset_base(href, r, offset);
+            reference_reset_base(href, NR_STACK_POINTER_REG, offset);
             list.concat(taicpu.op_reg_ref(A_STFD, regcounter, href));
           end;
         (* Optimiztion in the future:  a_call_name(list,'_savefXX'); *)
 
       { save gprs in gpr save area }
       if usesgpr then
-        if firstreggpr.enum < R_30 then
+        if firstreggpr < RS_R30 then
           begin
-            offset:= offset - 4 * (ord(R_31) - ord(firstreggpr.enum) + 1);
+            offset:= offset - 4 * (RS_R31 - firstreggpr + 1);
             reference_reset_base(href,NR_STACK_POINTER_REG,offset);
             list.concat(taicpu.op_reg_ref(A_STMW,firstreggpr,href));
               {STMW stores multiple registers}
           end
         else
           begin
-            r2 := firstreggpr;
-            convert_register_to_enum(firstreggpr);
-            for regcounter.enum := firstreggpr.enum to R_31 do
+            for regcounter := firstreggpr to RS_R31 do
               begin
                 offset:= offset - 4;
                 reference_reset_base(href, NR_STACK_POINTER_REG, offset);
-                list.concat(taicpu.op_reg_ref(A_STW, r2, href));
-                inc(r2.number,NR_R1-NR_R0);
+                list.concat(taicpu.op_reg_ref(A_STW, newreg(R_INTREGISTER,regcounter,R_SUBWHOLE), href));
               end;
           end;
 
@@ -1357,23 +1353,26 @@ const
     {Generates code which restores used non-volatile registers from
     the save area right below the address the stackpointer point to.}
 
-     var regcounter,firstregfpu,firstreggpr: TRegister;
+     var regcounter,firstregfpu,firstreggpr: TSuperRegister;
          usesfpr,usesgpr: boolean;
          href : treference;
          offset: integer;
-         r,r2:Tregister;
          regcounter2: Tsuperregister;
+         regidx : tregisterindex;
 
     begin
       usesfpr:=false;
       if not (po_assembler in current_procinfo.procdef.procoptions) then
-        for regcounter.enum:=R_F14 to R_F31 do
-          if regcounter.enum in rg.used_in_proc_other then
+        for regcounter:=RS_F14 to RS_F31 do
+         begin
+           regidx:=findreg_by_number(newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE));
+            if regidx in rg.used_in_proc_other then
             begin
                usesfpr:=true;
                firstregfpu:=regcounter;
                break;
             end;
+         end;
 
       usesgpr:=false;
       if not (po_assembler in current_procinfo.procdef.procoptions) then
@@ -1382,8 +1381,7 @@ const
             if regcounter2 in rg.used_in_proc_int then
               begin
                  usesgpr:=true;
-                 firstreggpr.enum:=R_INTREGISTER;
-                 firstreggpr.number:=regcounter2 shl 8;
+                 firstreggpr:=regcounter2;
                  break;
               end;
           end;
@@ -1392,39 +1390,30 @@ const
 
       { restore fp registers }
       if usesfpr then
-        for regcounter.enum := firstregfpu.enum to R_F31 do
+        for regcounter := firstregfpu to RS_F31 do
           begin
             offset:= offset - 8;
-            r.enum:=R_INTREGISTER;
-            r.number:=NR_STACK_POINTER_REG;
-            reference_reset_base(href, r, offset);
-            list.concat(taicpu.op_reg_ref(A_LFD, regcounter, href));
+            reference_reset_base(href, NR_STACK_POINTER_REG, offset);
+            list.concat(taicpu.op_reg_ref(A_LFD, newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE), href));
           end;
         (* Optimiztion in the future: a_call_name(list,'_restfXX'); *)
 
       { restore gprs }
       if usesgpr then
-        if firstreggpr.enum < R_30 then
+        if firstreggpr < RS_R30 then
           begin
-            offset:= offset - 4 * (ord(R_31) - ord(firstreggpr.enum) + 1);
-            r.enum:=R_INTREGISTER;
-            r.number:=NR_STACK_POINTER_REG;
-            reference_reset_base(href,r,offset); //-220
+            offset:= offset - 4 * (RS_R31 - firstreggpr + 1);
+            reference_reset_base(href,NR_STACK_POINTER_REG,offset); //-220
             list.concat(taicpu.op_reg_ref(A_LMW,firstreggpr,href));
               {LMW loads multiple registers}
           end
         else
           begin
-            r.enum:=R_INTREGISTER;
-            r.number:=NR_STACK_POINTER_REG;
-            r2 := firstreggpr;
-            convert_register_to_enum(firstreggpr);
-            for regcounter.enum := firstreggpr.enum to R_31 do
+            for regcounter := firstreggpr to RS_R31 do
               begin
                 offset:= offset - 4;
-                reference_reset_base(href, r, offset);
-                list.concat(taicpu.op_reg_ref(A_LWZ, r2, href));
-                inc(r2.number,NR_R1-NR_R0);
+                reference_reset_base(href, NR_STACK_POINTER_REG, offset);
+                list.concat(taicpu.op_reg_ref(A_LWZ, newreg(R_INTREGISTER,regcounter,R_SUBWHOLE), href));
               end;
           end;
 
@@ -1446,40 +1435,33 @@ const
      var regcounter: TRegister;
          href : treference;
          registerSaveAreaSize : longint;
-         r,r2,rsp:Tregister;
-         regcounter2: Tsuperregister;
 
       begin
-        if (localsize mod 8) <> 0 then internalerror(58991);
+        if (localsize mod 8) <> 0 then
+          internalerror(58991);
         { CR and LR only have to be saved in case they are modified by the current }
         { procedure, but currently this isn't checked, so save them always         }
         { following is the entry code as described in "Altivec Programming }
         { Interface Manual", bar the saving of AltiVec registers           }
-        r.enum:=R_INTREGISTER;
-        r.number:=NR_R0;
-        rsp.enum:=R_INTREGISTER;
-        rsp.number:=NR_STACK_POINTER_REG;
-        a_reg_alloc(list,rsp);
-        a_reg_alloc(list,r);
+        a_reg_alloc(list,NR_STACK_POINTER_REG);
+        a_reg_alloc(list,NR_R0);
 
         { save return address in callers frame}
-        r2.enum:=R_LR;
-        list.concat(taicpu.op_reg_reg(A_MFSPR,r,r2));
+        list.concat(taicpu.op_reg_reg(A_MFSPR,NR_R0,NR_LR));
         { ... in caller's frame }
-        reference_reset_base(href,rsp,8);
-        list.concat(taicpu.op_reg_ref(A_STW,r,href));
-        a_reg_dealloc(list,r);
+        reference_reset_base(href,NR_STACK_POINTER_REG,8);
+        list.concat(taicpu.op_reg_ref(A_STW,NR_R0,href));
+        a_reg_dealloc(list,NR_R0);
 
         { save non-volatile registers in callers frame}
         registerSaveAreaSize:= save_regs(list);
 
         { save the CR if necessary in callers frame ( !!! always done currently ) }
-        a_reg_alloc(list,r);
-        r2.enum:=R_CR;
-        list.concat(taicpu.op_reg_reg(A_MFSPR,r,r2));
-        reference_reset_base(href,rsp,LA_CR_AIX);
-        list.concat(taicpu.op_reg_ref(A_STW,r,href));
-        a_reg_dealloc(list,r);
+        a_reg_alloc(list,NR_R0);
+        list.concat(taicpu.op_reg_reg(A_MFSPR,NR_R0,NR_CR));
+        reference_reset_base(href,NR_STACK_POINTER_REG,LA_CR_AIX);
+        list.concat(taicpu.op_reg_ref(A_STW,NR_R0,href));
+        a_reg_dealloc(list,NR_R0);
 
         (*
         { save pointer to incoming arguments }
@@ -1509,21 +1491,18 @@ const
 
         if (localsize <> 0) then
           begin
-            r.enum:=R_INTREGISTER;
-            r.number:=NR_STACK_POINTER_REG;
             if (localsize <= high(smallint)) then
               begin
-                reference_reset_base(href,r,-localsize);
-                a_load_store(list,A_STWU,r,href);
+                reference_reset_base(href,NR_STACK_POINTER_REG,-localsize);
+                a_load_store(list,A_STWU,NR_STACK_POINTER_REG,href);
               end
             else
               begin
-                reference_reset_base(href,r,0);
-                href.index.enum := R_INTREGISTER;
-                href.index.number := NR_R11;
+                reference_reset_base(href,NR_STACK_POINTER_REG,0);
+                href.index := NR_R11;
                 a_reg_alloc(list,href.index);
                 a_load_const_reg(list,OS_S32,-localsize,href.index);
-                a_load_store(list,A_STWUX,r,href);
+                a_load_store(list,A_STWUX,NR_STACK_POINTER_REG,href);
                 a_reg_dealloc(list,href.index);
               end;
           end;
@@ -1533,33 +1512,23 @@ const
  (* NOT IN USE *)
 
       var
-        regcounter: TRegister;
         href : treference;
-        r,r2,rsp:Tregister;
-        regcounter2: Tsuperregister;
       begin
-        r.enum:=R_INTREGISTER;
-        r.number:=NR_R0;
-        rsp.enum:=R_INTREGISTER;
-        rsp.number:=NR_STACK_POINTER_REG;
-        a_reg_alloc(list,r);
+        a_reg_alloc(list,NR_R0);
 
         { restore stack pointer }
-        reference_reset_base(href,rsp,LA_SP);
-        list.concat(taicpu.op_reg_ref(A_LWZ,rsp,href));
+        reference_reset_base(href,NR_STACK_POINTER_REG,LA_SP);
+        list.concat(taicpu.op_reg_ref(A_LWZ,NR_STACK_POINTER_REG,href));
         (*
-        list.concat(taicpu.op_reg_reg_const(A_ORI,rsp,R_31,0));
+        list.concat(taicpu.op_reg_reg_const(A_ORI,NR_STACK_POINTER_REG,R_31,0));
         *)
 
         { restore the CR if necessary from callers frame
             ( !!! always done currently ) }
-        reference_reset_base(href,rsp,LA_CR_AIX);
-        r.enum:=R_INTREGISTER;
-        r.number:=NR_R0;
-        list.concat(taicpu.op_reg_ref(A_LWZ,r,href));
-        r2.enum:=R_CR;
-        list.concat(taicpu.op_reg_reg(A_MTSPR,r,r2));
-        a_reg_dealloc(list,r);
+        reference_reset_base(href,NR_STACK_POINTER_REG,LA_CR_AIX);
+        list.concat(taicpu.op_reg_ref(A_LWZ,NR_R0,href));
+        list.concat(taicpu.op_reg_reg(A_MTSPR,NR_R0,NR_CR));
+        a_reg_dealloc(list,NR_R0);
 
         (*
         { restore return address from callers frame }
@@ -1577,14 +1546,11 @@ const
         *)
 
         { restore return address from callers frame }
-        r.enum:=R_INTREGISTER;
-        r.number:=NR_R0;
-        r2.enum:=R_LR;
-        reference_reset_base(href,rsp,8);
-        list.concat(taicpu.op_reg_ref(A_LWZ,r,href));
+        reference_reset_base(href,NR_STACK_POINTER_REG,8);
+        list.concat(taicpu.op_reg_ref(A_LWZ,NR_R0,href));
 
         { return to caller }
-        list.concat(taicpu.op_reg_reg(A_MTSPR,r,r2));
+        list.concat(taicpu.op_reg_reg(A_MTSPR,NR_R0,NR_LR));
         list.concat(taicpu.op_none(A_BLR));
       end;
 
@@ -1601,7 +1567,7 @@ const
        var
          ref2, tmpref: treference;
          freereg: boolean;
-         r2,tmpreg:Tregister;
+         tmpreg:Tregister;
 
        begin
          ref2 := ref;
@@ -1615,18 +1581,15 @@ const
                      reference_reset(tmpref);
                      tmpref.offset := ref2.offset;
                      tmpref.symbol := ref2.symbol;
-                     tmpref.base.number := NR_NO;
-                     r2.enum:=R_INTREGISTER;
-                     r2.number:=NR_RTOC;
-                     list.concat(taicpu.op_reg_reg_ref(A_ADDI,r,r2,tmpref));
+                     tmpref.base := NR_NO;
+                     list.concat(taicpu.op_reg_reg_ref(A_ADDI,r,NR_RTOC,tmpref));
                    end
                  else
                    begin
                      reference_reset(tmpref);
                      tmpref.symbol := ref2.symbol;
                      tmpref.offset := 0;
-                     tmpref.base.enum := R_INTREGISTER;
-                     tmpref.base.number := NR_RTOC;
+                     tmpref.base := NR_RTOC;
                      list.concat(taicpu.op_reg_ref(A_LWZ,r,tmpref));
 
                      if ref2.offset <> 0 then
@@ -1638,7 +1601,7 @@ const
                        end;
                    end;
 
-                 if ref2.base.number <> NR_NO then
+                 if ref2.base <> NR_NO then
                    list.concat(taicpu.op_reg_reg_reg(A_ADD,r,r,ref2.base));
 
                  //list.concat(tai_comment.create(strpnew('*** a_loadaddr_ref_reg')));
@@ -1652,7 +1615,7 @@ const
                  tmpref.offset := ref2.offset;
                  tmpref.symbol := ref2.symbol;
                  tmpref.symaddr := refs_ha;
-                 if ref2.base.number<> NR_NO then
+                 if ref2.base<> NR_NO then
                    begin
                      list.concat(taicpu.op_reg_reg_ref(A_ADDIS,r,
                        ref2.base,tmpref));
@@ -1664,7 +1627,7 @@ const
                    end
                  else
                    list.concat(taicpu.op_reg_ref(A_LIS,r,tmpref));
-                 tmpref.base.number := NR_NO;
+                 tmpref.base := NR_NO;
                  tmpref.symaddr := refs_l;
                  { can be folded with one of the next instructions by the }
                  { optimizer probably                                     }
@@ -1672,16 +1635,16 @@ const
                end
            end
          else if ref2.offset <> 0 Then
-           if ref2.base.number <> NR_NO then
+           if ref2.base <> NR_NO then
              a_op_const_reg_reg(list,OP_ADD,OS_32,aword(ref2.offset),ref2.base,r)
            { FixRef makes sure that "(ref.index <> R_NO) and (ref.offset <> 0)" never}
            { occurs, so now only ref.offset has to be loaded                         }
            else
              a_load_const_reg(list,OS_32,ref2.offset,r)
-         else if ref.index.number <> NR_NO Then
+         else if ref.index <> NR_NO Then
            list.concat(taicpu.op_reg_reg_reg(A_ADD,r,ref2.base,ref2.index))
-         else if (ref2.base.number <> NR_NO) and
-                 (r.number <> ref2.base.number) then
+         else if (ref2.base <> NR_NO) and
+                 (r <> ref2.base) then
            list.concat(taicpu.op_reg_reg(A_MR,r,ref2.base));
          if freereg then
            rg.ungetregisterint(list,ref2.base);
@@ -1731,8 +1694,7 @@ const
                 end
               else
                 begin
-                  r.enum:=R_F0;
-                  a_reg_alloc(list,r);
+                  a_reg_alloc(list,NR_F0);
                   a_loadfpu_ref_reg(list,OS_F64,source,r);
                   if delsource then
                     begin
@@ -1804,17 +1766,15 @@ const
             a_load_const_reg(list,OS_32,count,countreg);
             { explicitely allocate R_0 since it can be used safely here }
             { (for holding date that's being copied)                    }
-            r.enum:=R_F0;
-            a_reg_alloc(list,r);
+            a_reg_alloc(list,NR_F0);
             objectlibrary.getlabel(lab);
             a_label(list, lab);
             list.concat(taicpu.op_reg_reg_const(A_SUBIC_,countreg,countreg,1));
-            r.enum:=R_F0;
-            list.concat(taicpu.op_reg_ref(A_LFDU,r,src));
-            list.concat(taicpu.op_reg_ref(A_STFDU,r,dst));
+            list.concat(taicpu.op_reg_ref(A_LFDU,NR_F0,src));
+            list.concat(taicpu.op_reg_ref(A_STFDU,NR_F0,dst));
             a_jmp(list,A_BC,C_NE,0,lab);
             rg.ungetregisterint(list,countreg);
-            a_reg_dealloc(list,r);
+            a_reg_dealloc(list,NR_F0);
             len := len mod 8;
           end;
 
@@ -1822,16 +1782,15 @@ const
         if count > 0 then
           { unrolled loop }
           begin
-            r.enum:=R_F0;
-            a_reg_alloc(list,r);
+            a_reg_alloc(list,NR_F0);
             for count2 := 1 to count do
               begin
-                a_loadfpu_ref_reg(list,OS_F64,src,r);
-                a_loadfpu_reg_ref(list,OS_F64,r,dst);
+                a_loadfpu_ref_reg(list,OS_F64,src,NR_F0);
+                a_loadfpu_reg_ref(list,OS_F64,NR_F0,dst);
                 inc(src.offset,8);
                 inc(dst.offset,8);
               end;
-            a_reg_dealloc(list,r);
+            a_reg_dealloc(list,NR_F0);
             len := len mod 8;
           end;
 
@@ -1924,7 +1883,7 @@ const
 {$ifndef __NOWINPECOFF__}
         again,ok : tasmlabel;
 {$endif}
-        r,r2,rsp:Tregister;
+//        r,r2,rsp:Tregister;
       begin
          {$warning !!!! FIX ME !!!!}
          internalerror(200305231);
@@ -2045,7 +2004,6 @@ const
 
       var
          hl : tasmlabel;
-         r:Tregister;
       begin
          if not(cs_check_overflow in aktlocalswitches) then
           exit;
@@ -2055,8 +2013,7 @@ const
                  (torddef(def).typ in [u64bit,u16bit,u32bit,u8bit,uchar,
                                                   bool8bit,bool16bit,bool32bit]))) then
            begin
-             r.enum:=R_CR7;
-             list.concat(taicpu.op_reg(A_MCRXR,r));
+             list.concat(taicpu.op_reg(A_MCRXR,NR_CR7));
              a_jmp(list,A_BC,C_OV,7,hl)
            end
          else
@@ -2107,7 +2064,7 @@ const
                  { a register here, we must first reallocate the index register, since }
                  { otherwise it may be overwritten (and it's still used afterwards)    }
                  freeindex := false;
-                 if (getsupreg(ref.index) >= first_supreg) and
+                 if (getsupreg(ref.index) >= first_int_supreg) and
                     (getsupreg(ref.index) in rg.unusedregsint) then
                    begin
                      rg.getexplicitregisterint(list,ref.index);
@@ -2115,7 +2072,6 @@ const
                      freeindex := true;
                    end;
                  tmpreg := rg.getregisterint(list,OS_ADDR);
-{$endif newra}
                  if not assigned(ref.symbol) and
                     (cardinal(ref.offset-low(smallint)) <=
                       high(smallint)-low(smallint)) then
@@ -2358,7 +2314,6 @@ const
       var
         tmpreg: tregister;
         tmpreg64: tregister64;
-        newop: TOpCG;
         issub: boolean;
       begin
         case op of
@@ -2428,7 +2383,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.123  2003-09-03 15:55:01  peter
+  Revision 1.124  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.123  2003/09/03 15:55:01  peter
     * NEWRA branch merged
 
   Revision 1.122.2.1  2003/08/31 21:08:16  peter
@@ -2538,7 +2496,7 @@ end.
     * also free temps in g_concatcopy if delsource is true
 
   Revision 1.98  2003/05/28 23:58:18  jonas
-    * added missing initialization of rg.usedint{in,by}proc
+    * added missing initialization of rg.usedintin,byproc
     * ppc now also saves/restores used fpu registers
     * ncgcal doesn't add used registers to usedby/inproc anymore, except for
       i386

compiler/powerpc/cpubase.pas

@@ -95,161 +95,64 @@ uses
       {# Last value of opcode enumeration  }
       lastop  = high(tasmop);
 
+
 {*****************************************************************************
                                   Registers
 *****************************************************************************}
 
     type
-      Toldregister = (R_NO,
-        R_0,R_1,R_2,R_3,R_4,R_5,R_6,R_7,R_8,R_9,R_10,R_11,R_12,R_13,R_14,R_15,R_16,
-        R_17,R_18,R_19,R_20,R_21,R_22,R_23,R_24,R_25,R_26,R_27,R_28,R_29,R_30,R_31,
-        R_F0,R_F1,R_F2,R_F3,R_F4,R_F5,R_F6,R_F7,R_F8,R_F9,R_F10,R_F11,R_F12,
-        R_F13,R_F14,R_F15,R_F16,R_F17, R_F18,R_F19,R_F20,R_F21,R_F22, R_F23,R_F24,
-        R_F25,R_F26,R_F27,R_F28,R_F29,R_F30,R_F31,
-        R_M0,R_M1,R_M2,R_M3,R_M4,R_M5,R_M6,R_M7,R_M8,R_M9,R_M10,R_M11,R_M12,
-        R_M13,R_M14,R_M15,R_M16,R_M17,R_M18,R_M19,R_M20,R_M21,R_M22, R_M23,R_M24,
-        R_M25,R_M26,R_M27,R_M28,R_M29,R_M30,R_M31,
-        R_CR,R_CR0,R_CR1,R_CR2,R_CR3,R_CR4,R_CR5,R_CR6,R_CR7,
-        R_XER,R_LR,R_CTR,R_FPSCR,
-
-        R_INTREGISTER {Only for use by the register allocator.}
-      );
+      { Number of registers used for indexing in tables }
+      tregisterindex=0..{$i rppcnor.inc}-1;
+      totherregisterset = set of tregisterindex;
 
-      Tnewregister=word;
-      Tsuperregister=byte;
-      Tsubregister=byte;
+    const
+      { Available Superregisters }
+      {$i rppcsup.inc}
 
-      Tregister=record
-        enum:Toldregister;
-        number:Tnewregister;
-      end;
+      { No Subregisters }
+      R_SUBWHOLE=R_SUBNONE;
 
-      {# Set type definition for registers }
-      tregisterset = set of Toldregister;
-      Tsupregset=set of Tsuperregister;
+      { Available Registers }
+      {$i rppccon.inc}
 
-      { A type to store register locations for 64 Bit values. }
-      tregister64 = packed record
-        reglo,reghi : tregister;
-      end;
+      { Integer Super registers first and last }
+{$warning Supreg shall be $00-$1f}
+      first_int_supreg = RS_R3;
+      last_int_supreg = RS_R31;
 
-      { alias for compact code }
-      treg64 = tregister64;
+      first_int_imreg = $20;
+      last_int_imreg = $fe;
 
+      { Float Super register first and last }
+      first_fpu_supreg    = $00;
+      last_fpu_supreg     = $1f;
 
-    Const
-      {# First register in the tregister enumeration }
-      firstreg = low(Toldregister);
-      {# Last register in the tregister enumeration }
-      lastreg  = R_FPSCR;
-    type
-      {# Type definition for the array of string of register nnames }
-      treg2strtable = array[firstreg..lastreg] of string[5];
+      first_fpu_imreg     = $20;
+      last_fpu_imreg      = $fe;
 
-    const
+      { MM Super register first and last }
+      first_mmx_supreg    = RS_INVALID;
+      last_mmx_supreg     = RS_INVALID;
+      first_mmx_imreg     = RS_INVALID;
+      last_mmx_imreg      = RS_INVALID;
 
-      R_SPR1 = R_XER;
-      R_SPR8 = R_LR;
-      R_SPR9 = R_CTR;
-      R_TOC = R_2;
-   {   CR0 = 0;
-      CR1 = 4;
-      CR2 = 8;
-      CR3 = 12;
-      CR4 = 16;
-      CR5 = 20;
-      CR6 = 24;
-      CR7 = 28;
-      LT = 0;
-      GT = 1;
-      EQ = 2;
-      SO = 3;
-      FX = 4;
-      FEX = 5;
-      VX = 6;
-      OX = 7;}
-
-      mot_reg2str : treg2strtable = ('',
-        'r0','r1','r2','r3','r4','r5','r6','r7','r8','r9','r10','r11','r12','r13',
-        'r14','r15','r16','r17','r18','r19','r20','r21','r22','r23','r24','r25',
-        'r26','r27','r28','r29','r30','r31',
-        'F0','F1','F2','F3','F4','F5','F6','F7', 'F8','F9','F10','F11','F12',
-        'F13','F14','F15','F16','F17', 'F18','F19','F20','F21','F22', 'F23','F24',
-        'F25','F26','F27','F28','F29','F30','F31',
-        'M0','M1','M2','M3','M4','M5','M6','M7','M8','M9','M10','M11','M12',
-        'M13','M14','M15','M16','M17','M18','M19','M20','M21','M22', 'M23','M24',
-        'M25','M26','M27','M28','M29','M30','M31',
-        'CR','CR0','CR1','CR2','CR3','CR4','CR5','CR6','CR7',
-        'XER','LR','CTR','FPSCR'
-      );
+{$warning TODO Calculate bsstart}
+      regnumber_count_bsstart = 64;
 
-      std_reg2str : treg2strtable = ('',
-        'r0','r1','r2','r3','r4','r5','r6','r7','r8','r9','r10','r11','r12','r13',
-        'r14','r15','r16','r17','r18','r19','r20','r21','r22','r23','r24','r25',
-        'r26','r27','r28','r29','r30','r31',
-        'F0','F1','F2','F3','F4','F5','F6','F7', 'F8','F9','F10','F11','F12',
-        'F13','F14','F15','F16','F17', 'F18','F19','F20','F21','F22', 'F23','F24',
-        'F25','F26','F27','F28','F29','F30','F31',
-        'M0','M1','M2','M3','M4','M5','M6','M7','M8','M9','M10','M11','M12',
-        'M13','M14','M15','M16','M17','M18','M19','M20','M21','M22', 'M23','M24',
-        'M25','M26','M27','M28','M29','M30','M31',
-        'CR','CR0','CR1','CR2','CR3','CR4','CR5','CR6','CR7',
-        'XER','LR','CTR','FPSCR'
+      regnumber_table : array[tregisterindex] of tregister = (
+        {$i rppcnum.inc}
       );
 
-    {New register coding:}
-
-    {Special registers:}
-    const
-      NR_NO = $0000;  {Invalid register}
-
-    {Normal registers:}
-
-    {General purpose registers:}
-      NR_R0 = $0100; NR_R1 = $0200; NR_R2 = $0300;
-      NR_R3 = $0400; NR_R4 = $0500; NR_R5 = $0600;
-      NR_R6 = $0700; NR_R7 = $0800; NR_R8 = $0900;
-      NR_R9 = $0A00; NR_R10 = $0B00; NR_R11 = $0C00;
-      NR_R12 = $0D00; NR_R13 = $0E00; NR_R14 = $0F00;
-      NR_R15 = $1000; NR_R16 = $1100; NR_R17 = $1200;
-      NR_R18 = $1300; NR_R19 = $1400; NR_R20 = $1500;
-      NR_R21 = $1600; NR_R22 = $1700; NR_R23 = $1800;
-      NR_R24 = $1900; NR_R25 = $1A00; NR_R26 = $1B00;
-      NR_R27 = $1C00; NR_R28 = $1D00; NR_R29 = $1E00;
-      NR_R30 = $1F00; NR_R31 = $2000;
-
-      NR_RTOC = NR_R2;
-
-    {Super registers:}
-      RS_NONE=$00;
-      RS_R0 = $01; RS_R1 = $02; RS_R2 = $03;
-      RS_R3 = $04; RS_R4 = $05; RS_R5 = $06;
-      RS_R6 = $07; RS_R7 = $08; RS_R8 = $09;
-      RS_R9 = $0A; RS_R10 = $0B; RS_R11 = $0C;
-      RS_R12 = $0D; RS_R13 = $0E; RS_R14 = $0F;
-      RS_R15 = $10; RS_R16 = $11; RS_R17 = $12;
-      RS_R18 = $13; RS_R19 = $14; RS_R20 = $15;
-      RS_R21 = $16; RS_R22 = $17; RS_R23 = $18;
-      RS_R24 = $19; RS_R25 = $1A; RS_R26 = $1B;
-      RS_R27 = $1C; RS_R28 = $1D; RS_R29 = $1E;
-      RS_R30 = $1F; RS_R31 = $20;
-
-      first_supreg = RS_R3;
-      last_supreg = RS_R31;
+      regstabs_table : array[tregisterindex] of tregister = (
+        {$i rppcstab.inc}
+      );
 
       { registers which may be destroyed by calls }
       VOLATILE_INTREGISTERS = [RS_R3..RS_R12];
 {$warning FIXME!!}
       { FIXME: only R_F1..R_F8 under the SYSV ABI -> has to become a }
-      {   typed const (JM) 																					 }
-      VOLATILE_FPUREGISTERS = [R_F3..R_F13];
-      {Number of first and last imaginary register.}
-      first_imreg     = $21;
-      last_imreg      = $ff;
-
-    {Subregisters, situation unknown!!.}
-      R_SUBWHOLE=$00;
-      R_SUBL=$00;
+      {   typed const (JM)                                                                                                                                                                       }
+      VOLATILE_FPUREGISTERS = [RS_F3..RS_F13];
 
 
 {*****************************************************************************
@@ -279,7 +182,7 @@ uses
                          0: ();
                          { specifies in which part of the cr the bit has to be }
                          { tested for blt,bgt,beq,..,bnu                       }
-                         1: (cr: R_CR0..R_CR7);
+                         1: (cr: RS_CR0..RS_CR7);
                          { specifies the bit to test for bt,bf,bdz,..,bdzf }
                          2: (crbit: byte)
                        );
@@ -314,7 +217,7 @@ uses
     type
       TResFlagsEnum = (F_EQ,F_NE,F_LT,F_LE,F_GT,F_GE,F_SO,F_FX,F_FEX,F_VX,F_OX);
       TResFlags = record
-        cr: R_CR0..R_CR7;
+        cr: RS_CR0..RS_CR7;
         flag: TResFlagsEnum;
       end;
 
@@ -481,23 +384,8 @@ uses
     const
       max_operands = 5;
 
-      {# Constant defining possibly all registers which might require saving }
-{$warning FIX ME !!!!!!!!! }
-      ALL_REGISTERS = [R_0..R_FPSCR];
-
-      general_registers = [R_0..R_31];
       general_superregisters = [RS_R0..RS_R31];
 
-      {# low and high of the available maximum width integer general purpose }
-      { registers                                                            }
-      LoGPReg = R_0;
-      HiGPReg = R_31;
-
-      {# low and high of every possible width general purpose register (same as }
-      { above on most architctures apart from the 80x86)                        }
-      LoReg = R_0;
-      HiReg = R_31;
-
       {# Table of registers which can be allocated by the code generator
          internally, when generating the code.
       }
@@ -513,17 +401,14 @@ uses
       maxintregs = 18;
       { to determine how many registers to use for regvars }
       maxintscratchregs = 3;
-      intregs    = [R_0..R_31];
       usableregsint = [RS_R13..RS_R27];
       c_countusableregsint = 18;
 
       maxfpuregs = 31-14+1;
-      fpuregs    = [R_F0..R_F31];
-      usableregsfpu = [R_F14..R_F31];
+      usableregsfpu = [RS_F14..RS_F31];
       c_countusableregsfpu = 31-14+1;
 
-      mmregs     = [R_M0..R_M31];
-      usableregsmm  = [R_M14..R_M31];
+      usableregsmm  = [RS_M14..RS_M31];
       c_countusableregsmm  = 31-14+1;
 
       { no distinction on this platform }
@@ -532,48 +417,38 @@ uses
       usableregsaddr = [];
       c_countusableregsaddr = 0;
 
-
       firstsaveintreg = RS_R13;
-{$ifndef newra}
-      lastsaveintreg  = RS_R27;
-{$else newra}
       lastsaveintreg  = RS_R31;
-{$endif newra}
-      firstsavefpureg = R_F14;
-      lastsavefpureg  = R_F31;
+      firstsavefpureg = RS_F14;
+      lastsavefpureg  = RS_F31;
       { no altivec support yet. Need to override tcgobj.a_loadmm_* first in tcgppc }
-      firstsavemmreg  = R_NO;
-      lastsavemmreg   = R_NO;
+      firstsavemmreg  = RS_INVALID;
+      lastsavemmreg   = RS_INVALID;
 
       maxvarregs = 15;
-      varregs : Array [1..maxvarregs] of Tnewregister =
+      varregs : Array [1..maxvarregs] of Tsuperregister =
                 (RS_R14,RS_R15,RS_R16,RS_R17,RS_R18,RS_R19,RS_R20,RS_R21,
                  RS_R22,RS_R23,RS_R24,RS_R25,RS_R26,RS_R27,RS_R28);
 
       maxfpuvarregs = 31-14+1;
-      fpuvarregs : Array [1..maxfpuvarregs] of Toldregister =
-                (R_F14,R_F15,R_F16,R_F17,R_F18,R_F19,R_F20,R_F21,R_F22,R_F23,
-                 R_F24,R_F25,R_F26,R_F27,R_F28,R_F29,R_F30,R_F31);
+      fpuvarregs : Array [1..maxfpuvarregs] of Tsuperregister =
+                (RS_F14,RS_F15,RS_F16,RS_F17,RS_F18,RS_F19,RS_F20,RS_F21,RS_F22,RS_F23,
+                 RS_F24,RS_F25,RS_F26,RS_F27,RS_F28,RS_F29,RS_F30,RS_F31);
 
-      max_param_regs_int = 8;
-      param_regs_int: Array[1..max_param_regs_int] of Toldregister =
-        (R_3,R_4,R_5,R_6,R_7,R_8,R_9,R_10);
+{
+//      max_param_regs_int = 8;
+//      param_regs_int: Array[1..max_param_regs_int] of Tsuperregister =
+//        (R_3,R_4,R_5,R_6,R_7,R_8,R_9,R_10);
 
-      max_param_regs_fpu = 13;
-      param_regs_fpu: Array[1..max_param_regs_fpu] of Toldregister =
-        (R_F1,R_F2,R_F3,R_F4,R_F5,R_F6,R_F7,R_F8,R_F9,R_F10,R_F11,R_F12,R_F13);
+//      max_param_regs_fpu = 13;
+//      param_regs_fpu: Array[1..max_param_regs_fpu] of Toldregister =
+//        (RS_F1,RS_F2,RS_F3,RS_F4,RS_F5,RS_F6,RS_F7,RS_F8,RS_F9,RS_F10,RS_F11,RS_F12,RS_F13);
 
       max_param_regs_mm = 13;
       param_regs_mm: Array[1..max_param_regs_mm] of Toldregister =
         (R_M1,R_M2,R_M3,R_M4,R_M5,R_M6,R_M7,R_M8,R_M9,R_M10,R_M11,R_M12,R_M13);
+}
 
-{$ifndef newra}
-      {# Registers which are defined as scratch and no need to save across
-         routine calls or in assembler blocks.
-      }
-      max_scratch_regs = 3;
-      scratch_regs: Array[1..max_scratch_regs] of Tsuperregister = (RS_R29,RS_R30,RS_R31);
-{$endif newra}
 
 {*****************************************************************************
                           Default generic sizes
@@ -602,46 +477,8 @@ uses
 
       }
 
-      stab_regindex : array[firstreg..lastreg] of shortint =
-      (
-        { R_NO }
-        -1,
-        { R0..R7 }
-        0,1,2,3,4,5,6,7,
-        { R8..R15 }
-        8,9,10,11,12,13,14,15,
-        { R16..R23 }
-        16,17,18,19,20,21,22,23,
-        { R24..R32 }
-        24,25,26,27,28,29,30,31,
-        { F0..F7 }
-        32,33,34,35,36,37,38,39,
-        { F8..F15 }
-        40,41,42,43,44,45,46,47,
-        { F16..F23 }
-        48,49,50,51,52,53,54,55,
-        { F24..F31 }
-        56,57,58,59,60,61,62,63,
-        { M0..M7 Multimedia registers are not supported by GCC }
-        -1,-1,-1,-1,-1,-1,-1,-1,
-        { M8..M15 }
-        -1,-1,-1,-1,-1,-1,-1,-1,
-        { M16..M23 }
-        -1,-1,-1,-1,-1,-1,-1,-1,
-        { M24..M31 }
-        -1,-1,-1,-1,-1,-1,-1,-1,
-        { CR }
-        -1,
-        { CR0..CR7 }
-        68,69,70,71,72,73,74,75,
-        { XER }
-        76,
-        { LR }
-        65,
-        { CTR }
-        66,
-        { FPSCR }
-        -1
+      stab_regindex : array[tregisterindex] of shortint = (
+        {$i rppcstab.inc}
       );
 
 
@@ -682,10 +519,8 @@ uses
       NR_FUNCTION_RESULT64_HIGH_REG = NR_FUNCTION_RETURN64_HIGH_REG;
       RS_FUNCTION_RESULT64_HIGH_REG = RS_FUNCTION_RETURN64_HIGH_REG;
 
-      { WARNING: don't change to R_ST0!! See comments above implementation of }
-      { a_loadfpu* methods in rgcpu (JM)                                      }
-      FPU_RESULT_REG = R_F1;
-      mmresultreg = R_M0;
+      NR_FPU_RESULT_REG = RS_F1;
+      NR_MM_RESULT_REG = RS_M0;
 
 {*****************************************************************************
                        GCC /ABI linking information
@@ -726,12 +561,12 @@ uses
 
       PARENT_FRAMEPOINTER_OFFSET = 12;
 
+      NR_RTOC = NR_R2;
+
 {*****************************************************************************
                                   Helpers
 *****************************************************************************}
 
-    function supreg_name(r:Tsuperregister):string;
-
     function  is_calljmp(o:tasmop):boolean;
 
     procedure inverse_flags(var r : TResFlags);
@@ -739,8 +574,11 @@ uses
     function  flags_to_cond(const f: TResFlags) : TAsmCond;
     procedure create_cond_imm(BO,BI:byte;var r : TAsmCond);
     procedure create_cond_norm(cond: TAsmCondFlag; cr: byte;var r : TasmCond);
-    procedure convert_register_to_enum(var r:Tregister);
     function cgsize2subreg(s:Tcgsize):Tsubregister;
+    function findreg_by_number(r:Tregister):tregisterindex;
+    function std_regnum_search(const s:string):Tregister;
+    function std_regname(r:Tregister):string;
+    function gas_regname(r:Tregister):string;
 
 
 implementation
@@ -748,31 +586,27 @@ implementation
     uses
       verbose;
 
-{*****************************************************************************
-                                  Helpers
-*****************************************************************************}
+    const
+      std_regname_table : array[tregisterindex] of string[7] = (
+        {$i rppcstd.inc}
+      );
 
-   function supreg_name(r:Tsuperregister):string;
+      gas_regname_table : array[tregisterindex] of string[7] = (
+        {$i rppcgas.inc}
+      );
 
-    var s:string[4];
+      regnumber_index : array[tregisterindex] of tregisterindex = (
+        {$i rppcrni.inc}
+      );
 
-    const supreg_names:array[0..last_supreg] of string[3]=
-          ('INV',
-           'r0','r1','r2','r3','r4','r5','r6','r7','r8','r9',
-           'r10','r11','r12','r13','r14','r15','r16','r17','r18','r19',
-           'r20','r21','r22','r23','r24','r25','r26','r27','r28','r29',
-           'r30' ,'r31');
+      std_regname_index : array[tregisterindex] of tregisterindex = (
+        {$i rppcsri.inc}
+      );
 
-    begin
-      if r in [0..last_supreg] then
-        supreg_name:=supreg_names[r]
-      else
-        begin
-          str(r,s);
-          supreg_name:='invalid_reg'+s;
-        end;
-    end;
 
+{*****************************************************************************
+                                  Helpers
+*****************************************************************************}
 
     function is_calljmp(o:tasmop):boolean;
       begin
@@ -832,35 +666,91 @@ implementation
         case cond of
           C_NONE:;
           C_T..C_DZF: r.crbit := cr
-          else r.cr := Toldregister(ord(R_CR0)+cr);
+          else r.cr := RS_CR0+cr;
         end;
       end;
 
 
-    procedure convert_register_to_enum(var r:Tregister);
+    function cgsize2subreg(s:Tcgsize):Tsubregister;
       begin
-        if r.enum = R_INTREGISTER then
-{$ifndef notranslation}
-         if (r.number >= NR_NO) and
-            (r.number <= NR_R31) then
-{$endif not notranslation}
-           r.enum := toldregister(r.number shr 8)
-{$ifndef notranslation}
-         else
-           internalerror(200301082);
-{$endif notranslation}
+        cgsize2subreg:=R_SUBWHOLE;
       end;
 
 
-    function cgsize2subreg(s:Tcgsize):Tsubregister;
+    function findreg_by_stdname(const s:string):byte;
+      var
+        i,p : tregisterindex;
       begin
-        cgsize2subreg:=R_SUBWHOLE;
+        {Binary search.}
+        p:=0;
+        i:=regnumber_count_bsstart;
+        repeat
+          if (p+i<=high(tregisterindex)) and (std_regname_table[std_regname_index[p+i]]<=s) then
+            p:=p+i;
+          i:=i shr 1;
+        until i=0;
+        if std_regname_table[std_regname_index[p]]=s then
+          result:=std_regname_index[p]
+        else
+          result:=0;
+      end;
+
+
+    function findreg_by_number(r:Tregister):tregisterindex;
+      var
+        i,p : tregisterindex;
+      begin
+        {Binary search.}
+        p:=0;
+        i:=regnumber_count_bsstart;
+        repeat
+          if (p+i<=high(tregisterindex)) and (regnumber_table[regnumber_index[p+i]]<=r) then
+            p:=p+i;
+          i:=i shr 1;
+        until i=0;
+        if regnumber_table[regnumber_index[p]]=r then
+          result:=regnumber_index[p]
+        else
+          result:=0;
+      end;
+
+
+    function std_regnum_search(const s:string):Tregister;
+      begin
+        result:=regnumber_table[findreg_by_stdname(s)];
+      end;
+
+
+    function std_regname(r:Tregister):string;
+      var
+        p : tregisterindex;
+      begin
+        p:=findreg_by_number(r);
+        if p<>0 then
+          result:=std_regname_table[p]
+        else
+          result:=generic_regname(r);
+      end;
+
+
+    function gas_regname(r:Tregister):string;
+      var
+        p : tregisterindex;
+      begin
+        p:=findreg_by_number(r);
+        if p<>0 then
+          result:=gas_regname_table[p]
+        else
+          result:=generic_regname(r);
       end;
 
 end.
 {
   $Log$
-  Revision 1.65  2003-09-03 11:18:37  florian
+  Revision 1.66  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.65  2003/09/03 11:18:37  florian
     * fixed arm concatcopy
     + arm support in the common compiler sources added
     * moved some generic cg code around

compiler/powerpc/cpupara.pas

@@ -58,15 +58,13 @@ unit cpupara;
          else if nr<=8 then
            begin
               result.loc:=LOC_REGISTER;
-              result.register.enum:=R_INTREGISTER;
-              result.register.number:=NR_R2+nr*(NR_R1-NR_R0);
-              rg.getexplicitregisterint(list,result.register.number);
+              result.register:=newreg(R_INTREGISTER,RS_R2+nr,R_SUBWHOLE);
+              rg.getexplicitregisterint(list,result.register);
            end
          else
            begin
               result.loc:=LOC_REFERENCE;
-              result.reference.index.enum:=R_INTREGISTER;
-              result.reference.index.number:=NR_STACK_POINTER_REG;
+              result.reference.index:=NR_STACK_POINTER_REG;
               result.reference.offset:=(nr-8)*4;
            end;
          result.size := OS_INT;
@@ -83,8 +81,7 @@ unit cpupara;
            internalerror(2003060401)
          else if nr<=8 then
            begin
-             r.enum := R_INTREGISTER;
-             r.number := NR_R2+nr*(NR_R1-NR_R0);
+             r:=newreg(R_INTREGISTER,RS_R2+nr,R_SUBWHOLE);
              rg.ungetregisterint(list,r);
            end;
       end;
@@ -169,7 +166,7 @@ unit cpupara;
     procedure tppcparamanager.create_paraloc_info(p : tabstractprocdef; side: tcallercallee);
 
       var
-         nextintreg,nextfloatreg,nextmmreg : tregister;
+         nextintreg,nextfloatreg,nextmmreg : tsuperregister;
          paradef : tdef;
          paraloc : tparalocation;
          stack_offset : aword;
@@ -180,33 +177,27 @@ unit cpupara;
       procedure assignintreg;
 
         begin
-           if nextintreg.number<=NR_R10 then
+           if nextintreg<=NR_R10 then
              begin
                 paraloc.loc:=LOC_REGISTER;
                 paraloc.register:=nextintreg;
-                inc(nextintreg.number,NR_R1-NR_R0);
+                inc(nextintreg,NR_R1-NR_R0);
                 if target_info.abi=abi_powerpc_aix then
                   inc(stack_offset,4);
              end
            else
               begin
                  paraloc.loc:=LOC_REFERENCE;
-                 paraloc.reference.index.enum:=R_INTREGISTER;
-                 paraloc.reference.index.number:=NR_STACK_POINTER_REG;
+                 paraloc.reference.index:=NR_STACK_POINTER_REG;
                  paraloc.reference.offset:=stack_offset;
                  inc(stack_offset,4);
              end;
         end;
 
       begin
-         { zero alignment bytes }
-         fillchar(nextintreg,sizeof(nextintreg),0);
-         fillchar(nextfloatreg,sizeof(nextfloatreg),0);
-         fillchar(nextmmreg,sizeof(nextmmreg),0);
-         nextintreg.enum:=R_INTREGISTER;
-         nextintreg.number:=NR_R3;
-         nextfloatreg.enum:=R_F1;
-         nextmmreg.enum:=R_M1;
+         nextintreg:=RS_R3;
+         nextfloatreg:=RS_F1;
+         nextmmreg:=RS_M1;
          case target_info.abi of
            abi_powerpc_aix:
              stack_offset:=24;
@@ -243,30 +234,29 @@ unit cpupara;
                       if paraloc.size = OS_NO then
                         paraloc.size := OS_ADDR;
                       is_64bit := paraloc.size in [OS_64,OS_S64];
-                      if nextintreg.number<=(NR_R10-ord(is_64bit)*(NR_R1-NR_R0))  then
+                      if nextintreg<=(RS_R10-ord(is_64bit))  then
                         begin
                            paraloc.loc:=LOC_REGISTER;
                            if is_64bit then
                              begin
-                               if odd((nextintreg.number-NR_R3) shr 8) and (target_info.abi=abi_powerpc_sysv) Then
-                                inc(nextintreg.number,NR_R1-NR_R0);
+                               if odd(nextintreg-RS_R3) and (target_info.abi=abi_powerpc_sysv) Then
+                                 inc(nextintreg);
                                paraloc.registerhigh:=nextintreg;
-                               inc(nextintreg.number,NR_R1-NR_R0);
+                               inc(nextintreg);
                                if target_info.abi=abi_powerpc_aix then
                                  inc(stack_offset,4);
                              end;
                            paraloc.registerlow:=nextintreg;
-                           inc(nextintreg.number,NR_R1-NR_R0);
+                           inc(nextintreg);
                            if target_info.abi=abi_powerpc_aix then
                              inc(stack_offset,4);
 
                         end
                       else
                          begin
-                            nextintreg.number := NR_R11;
+                            nextintreg:=RS_R11;
                             paraloc.loc:=LOC_REFERENCE;
-                            paraloc.reference.index.enum:=R_INTREGISTER;
-                            paraloc.reference.index.number:=NR_STACK_POINTER_REG;
+                            paraloc.reference.index:=NR_STACK_POINTER_REG;
                             paraloc.reference.offset:=stack_offset;
                             if not is_64bit then
                               inc(stack_offset,4)
@@ -277,11 +267,11 @@ unit cpupara;
                  LOC_FPUREGISTER:
                    begin
                       paraloc.size:=def_cgsize(paradef);
-                      if nextfloatreg.enum<=R_F10 then
+                      if nextfloatreg<=RS_F10 then
                         begin
                            paraloc.loc:=LOC_FPUREGISTER;
-                           paraloc.register:=nextfloatreg;
-                           inc(nextfloatreg.enum);
+                           paraloc.register:=newreg(R_FPUREGISTER,nextfloatreg,R_SUBWHOLE);
+                           inc(nextfloatreg);
                            if target_info.abi=abi_powerpc_aix then
                              inc(stack_offset,8);
                         end
@@ -302,8 +292,7 @@ unit cpupara;
                       else
                         begin
                            paraloc.loc:=LOC_REFERENCE;
-                           paraloc.reference.index.enum:=R_INTREGISTER;
-                           paraloc.reference.index.number:=NR_STACK_POINTER_REG;
+                           paraloc.reference.index:=NR_STACK_POINTER_REG;
                            paraloc.reference.offset:=stack_offset;
                            inc(stack_offset,hp.paratype.def.size);
                         end;
@@ -327,7 +316,7 @@ unit cpupara;
         if p.rettype.def.deftype=floatdef then
           begin
             paraloc.loc:=LOC_FPUREGISTER;
-            paraloc.register.enum:=FPU_RESULT_REG;
+            paraloc.register:=NR_FPU_RESULT_REG;
           end
         else
          { Return in register? }
@@ -337,17 +326,12 @@ unit cpupara;
 {$ifndef cpu64bit}
             if paraloc.size in [OS_64,OS_S64] then
              begin
-               paraloc.register64.reglo.enum:=R_INTREGISTER;
-               paraloc.register64.reglo.number:=NR_FUNCTION_RETURN64_LOW_REG;
-               paraloc.register64.reghi.enum:=R_INTREGISTER;
-               paraloc.register64.reghi.number:=NR_FUNCTION_RETURN64_HIGH_REG;
+               paraloc.register64.reglo:=NR_FUNCTION_RETURN64_LOW_REG;
+               paraloc.register64.reghi:=NR_FUNCTION_RETURN64_HIGH_REG;
              end
             else
 {$endif cpu64bit}
-             begin
-               paraloc.register.enum:=R_INTREGISTER;
-               paraloc.register.number:=NR_FUNCTION_RETURN_REG;
-             end;
+             paraloc.register:=NR_FUNCTION_RETURN_REG;
           end
         else
           begin
@@ -361,7 +345,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.42  2003-08-11 21:18:20  peter
+  Revision 1.43  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.42  2003/08/11 21:18:20  peter
     * start of sparc support for newra
 
   Revision 1.41  2003/07/05 20:11:41  jonas

compiler/powerpc/itppcgas.pas

@@ -0,0 +1,141 @@
+{
+    $Id$
+    Copyright (c) 1998-2002 by Florian Klaempfl
+
+    This unit contains the PowerPC GAS instruction tables
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+unit itppcgas;
+
+{$i fpcdefs.inc}
+
+interface
+
+    uses
+      cginfo,cpubase;
+
+    const
+      gas_op2str : array[tasmop] of string[14] = ('<none>',
+        'add','add.','addo','addo.','addc','addc.','addco','addco.',
+        'adde','adde.','addeo','addeo.','addi','addic','addic.','addis',
+        'addme','addme.','addmeo','addmeo.','addze','addze.','addzeo',
+        'addzeo.','and','and.','andc','andc.','andi.','andis.','b',
+        'ba','bl','bla','bc','bca','bcl','bcla','bcctr','bcctrl','bclr',
+        'bclrl','cmp','cmpi','cmpl','cmpli','cntlzw','cntlzw.','crand',
+        'crandc','creqv','crnand','crnor','cror','crorc','crxor','dcba',
+        'dcbf','dcbi','dcbst','dcbt','divw','divw.','divwo','divwo.',
+        'divwu','divwu.','divwuo','divwuo.','eciwx','ecowx','eieio','eqv',
+        'eqv.','extsb','extsb.','extsh','extsh.','fabs','fabs.','fadd',
+        'fadd.','fadds','fadds.','fcmpo','fcmpu','fctiw','fctw.','fctwz',
+        'fctwz.','fdiv','fdiv.','fdivs','fdivs.','fmadd','fmadd.','fmadds',
+        'fmadds.','fmr','fmsub','fmsub.','fmsubs','fmsubs.','fmul','fmul.',
+        'fmuls','fmuls.','fnabs','fnabs.','fneg','fneg.','fnmadd',
+        'fnmadd.','fnmadds','fnmadds.','fnmsub','fnmsub.','fnmsubs',
+        'fnmsubs.','fres','fres.','frsp','frsp.','frsqrte','frsqrte.',
+        'fsel','fsel.','fsqrt','fsqrt.','fsqrts','fsqrts.','fsub','fsub.',
+        'fsubs','fsubs.','icbi','isync','lbz','lbzu','lbzux','lbzx',
+        'lfd','lfdu','lfdux','lfdx','lfs','lfsu','lfsux','lfsx','lha',
+        'lhau','lhaux','lhax','hbrx','lhz','lhzu','lhzux','lhzx','lmw',
+        'lswi','lswx','lwarx','lwbrx','lwz','lwzu','lwzux','lwzx','mcrf',
+        'mcrfs','mcrxr','lcrxe','mfcr','mffs','maffs.','mfmsr','mfspr','mfsr',
+        'mfsrin','mftb','mtfcrf','mtfd0','mtfsb1','mtfsf','mtfsf.',
+        'mtfsfi','mtfsfi.','mtmsr','mtspr','mtsr','mtsrin','mulhw',
+        'mulhw.','mulhwu','mulhwu.','mulli','mullw','mullw.','mullwo',
+        'mullwo.','nand','nand.','neg','neg.','nego','nego.','nor','nor.',
+        'or','or.','orc','orc.','ori','oris', 'rfi', 'rlwimi', 'rlwimi.',
+        'rlwinm', 'rlwinm.','rlwnm','sc','slw', 'slw.', 'sraw', 'sraw.',
+        'srawi', 'srawi.','srw', 'srw.', 'stb', 'stbu', 'stbux','stbx','stfd',
+        'stfdu', 'stfdux', 'stfdx', 'stfiwx', 'stfs', 'stfsu', 'stfsux', 'stfsx',
+        'sth', 'sthbrx', 'sthu', 'sthux', 'sthx', 'stmw', 'stswi', 'stswx', 'stw',
+        'stwbrx', 'stwx.', 'stwu', 'stwux', 'stwx', 'subf', 'subf.', 'subfo',
+        'subfo.', 'subfc', 'subc.', 'subfco', 'subfco.', 'subfe', 'subfe.',
+        'subfeo', 'subfeo.', 'subfic', 'subfme', 'subfme.', 'subfmeo', 'subfmeo.',
+        'subfze', 'subfze.', 'subfzeo', 'subfzeo.', 'sync', 'tlbia', 'tlbie',
+        'tlbsync', 'tw', 'twi', 'xor', 'xor.', 'xori', 'xoris',
+        { some simplified mnemonics }
+        'subi', 'subis', 'subic', 'subic.', 'sub', 'sub.', 'subo', 'subo.',
+        'subc', 'subc.', 'subco', 'subco.', 'cmpwi', 'cmpw', 'cmplwi', 'cmplw',
+        'extlwi', 'extlwi.', 'extrwi', 'extrwi.', 'inslwi', 'inslwi.', 'insrwi',
+        'insrwi.', 'rotlwi', 'rotlwi.', 'rotlw', 'rotlw.', 'slwi', 'slwi.',
+        'srwi', 'srwi.', 'clrlwi', 'clrlwi.', 'clrrwi', 'clrrwi.', 'clrslwi',
+        'clrslwi.', 'blr', 'bctr', 'blrl', 'bctrl', 'crset', 'crclr', 'crmove',
+        'crnot', 'mt', 'mf','nop', 'li', 'lis', 'la', 'mr','mr.','not', 'mtcr', 'mtlr', 'mflr',
+        'mtctr', 'mfctr');
+
+    function gas_regnum_search(const s:string):Tregister;
+    function gas_regname(r:Tregister):string;
+
+
+implementation
+
+    uses
+      cutils,verbose;
+
+    const
+      gas_regname_table : array[tregisterindex] of string[7] = (
+        {$i rppcgas.inc}
+      );
+
+      gas_regname_index : array[tregisterindex] of tregisterindex = (
+        {$i rppcgri.inc}
+      );
+
+
+    function findreg_by_gasname(const s:string):tregisterindex;
+      var
+        i,p : tregisterindex;
+      begin
+        {Binary search.}
+        p:=0;
+        i:=regnumber_count_bsstart;
+        repeat
+          if (p+i<=high(tregisterindex)) and (gas_regname_table[gas_regname_index[p+i]]<=s) then
+            p:=p+i;
+          i:=i shr 1;
+        until i=0;
+        if gas_regname_table[gas_regname_index[p]]=s then
+          findreg_by_gasname:=gas_regname_index[p]
+        else
+          findreg_by_gasname:=0;
+      end;
+
+
+    function gas_regnum_search(const s:string):Tregister;
+      begin
+        result:=regnumber_table[findreg_by_gasname(s)];
+      end;
+
+
+    function gas_regname(r:Tregister):string;
+      var
+        p : tregisterindex;
+      begin
+        p:=findreg_by_number(r);
+        if p<>0 then
+          result:=gas_regname_table[p]
+        else
+          result:=generic_regname(r);
+      end;
+
+end.
+{
+  $Log$
+  Revision 1.1  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+}

compiler/powerpc/nppcadd.pas

@@ -27,25 +27,24 @@ unit nppcadd;
 interface
 
     uses
-       node,nadd,cpubase,cginfo;
+       node,nadd,ncgadd,cpubase,cginfo;
 
     type
-       tppcaddnode = class(taddnode)
+       tppcaddnode = class(tcgaddnode)
           function pass_1: tnode; override;
           procedure pass_2;override;
          private
           procedure pass_left_and_right;
           procedure load_left_right(cmpop, load_constants: boolean);
-          procedure clear_left_right(cmpop: boolean);
           function  getresflags : tresflags;
           procedure emit_compare(unsigned : boolean);
-          procedure second_addfloat;
-          procedure second_addboolean;
-          procedure second_addsmallset;
+          procedure second_addfloat;override;
+          procedure second_addboolean;override;
+          procedure second_addsmallset;override;
 {$ifdef SUPPORT_MMX}
-          procedure second_addmmx;
+          procedure second_addmmx;override;
 {$endif SUPPORT_MMX}
-          procedure second_add64bit;
+          procedure second_add64bit;override;
        end;
 
   implementation
@@ -87,7 +86,6 @@ interface
 
     procedure tppcaddnode.pass_left_and_right;
       var
-        pushedregs : tmaybesave;
         tmpreg     : tregister;
         pushedfpu  : boolean;
       begin
@@ -101,17 +99,11 @@ interface
         secondpass(left);
 
         { are too few registers free? }
-{$ifndef newra}
-        maybe_save(exprasmlist,right.registers32,left.location,pushedregs);
-{$endif newra}
         if location.loc=LOC_FPUREGISTER then
           pushedfpu:=maybe_pushfpu(exprasmlist,right.registersfpu,left.location)
         else
           pushedfpu:=false;
         secondpass(right);
-{$ifndef newra}
-        maybe_restore(exprasmlist,left.location,pushedregs);
-{$endif newra}
         if pushedfpu then
           begin
             tmpreg := rg.getregisterfpu(exprasmlist,left.location.size);
@@ -162,7 +154,7 @@ interface
         load_node(left);
         load_node(right);
         if not(cmpop) and
-           (location.register.number = NR_NO) then
+           (location.register = NR_NO) then
          begin
            location.register := rg.getregisterint(exprasmlist,OS_INT);
            if is_64bit(resulttype.def) then
@@ -171,43 +163,12 @@ interface
       end;
 
 
-    procedure tppcaddnode.clear_left_right(cmpop: boolean);
-      begin
-        if (right.location.loc in [LOC_REGISTER,LOC_FPUREGISTER]) and
-           (cmpop or
-            ((location.register.enum = R_INTREGISTER) and
-             (location.register.number <> right.location.register.number)) or
-              (location.register.enum <> right.location.register.enum)) then
-          begin
-            if (right.location.register.enum = R_INTREGISTER) then
-              rg.ungetregisterint(exprasmlist,right.location.register)
-            else
-              rg.ungetregister(exprasmlist,right.location.register);
-            if is_64bit(right.resulttype.def) then
-              rg.ungetregisterint(exprasmlist,right.location.registerhigh)
-          end;
-        if (left.location.loc in [LOC_REGISTER,LOC_FPUREGISTER]) and
-           (cmpop or
-            ((location.register.enum = R_INTREGISTER) and
-             (location.register.number <> left.location.register.number)) or
-              (location.register.enum <> left.location.register.enum)) then
-          begin
-            if (left.location.register.enum = R_INTREGISTER) then
-              rg.ungetregisterint(exprasmlist,left.location.register)
-            else
-              rg.ungetregister(exprasmlist,left.location.register);
-            if is_64bit(left.resulttype.def) then
-              rg.ungetregisterint(exprasmlist,left.location.registerhigh)
-          end;
-      end;
-
-
     function tppcaddnode.getresflags : tresflags;
       begin
         if (left.resulttype.def.deftype <> floatdef) then
-          result.cr := R_CR0
+          result.cr := RS_CR0
         else
-          result.cr := R_CR1;
+          result.cr := RS_CR1;
         case nodetype of
           equaln : result.flag:=F_EQ;
           unequaln : result.flag:=F_NE;
@@ -266,11 +227,7 @@ interface
             else
               begin
                 useconst := false;
-{$ifndef newra}
-                tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
-{$else newra}
                 tmpreg := rg.getregisterint(exprasmlist,OS_INT);
-{$endif newra}
                 cg.a_load_const_reg(exprasmlist,OS_INT,
                   aword(right.location.value),tmpreg);
                end
@@ -298,11 +255,7 @@ interface
             begin
               exprasmlist.concat(taicpu.op_reg_reg(op,
                 left.location.register,tmpreg));
-{$ifndef newra}
-              cg.free_scratch_reg(exprasmlist,tmpreg);
-{$else newra}
               rg.ungetregisterint(exprasmlist,tmpreg);
-{$endif newra}
             end
         else
           exprasmlist.concat(taicpu.op_reg_reg(op,
@@ -321,7 +274,6 @@ interface
         cmpop,
         isjump  : boolean;
         otl,ofl : tasmlabel;
-        pushedregs : tmaybesave;
       begin
         { calculate the operator which is more difficult }
         firstcomplex(self);
@@ -360,9 +312,6 @@ interface
                falselabel:=ofl;
              end;
 
-{$ifndef newra}
-            maybe_save(exprasmlist,right.registers32,left.location,pushedregs);
-{$endif newra}
             isjump:=(right.location.loc=LOC_JUMP);
             if isjump then
               begin
@@ -372,9 +321,6 @@ interface
                  objectlibrary.getlabel(falselabel);
               end;
             secondpass(right);
-{$ifndef newra}
-            maybe_restore(exprasmlist,left.location,pushedregs);
-{$endif newra}
             if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
              location_force_reg(exprasmlist,right.location,cgsize,false);
             if isjump then
@@ -469,7 +415,8 @@ interface
                end;
            end;
          end;
-        clear_left_right(cmpop);
+
+        release_reg_left_right;
       end;
 
 
@@ -479,10 +426,8 @@ interface
 
     procedure tppcaddnode.second_addfloat;
       var
-        reg   : tregister;
         op    : TAsmOp;
         cmpop : boolean;
-        r     : Tregister;
       begin
         pass_left_and_right;
 
@@ -541,12 +486,11 @@ interface
           end
         else
           begin
-            r.enum:=location.resflags.cr;
             exprasmlist.concat(taicpu.op_reg_reg_reg(op,
-              r,left.location.register,right.location.register))
+              newreg(R_SPECIALREGISTER,location.resflags.cr,R_SUBNONE),left.location.register,right.location.register))
           end;
 
-        clear_left_right(cmpop);
+        release_reg_left_right;
       end;
 
 {*****************************************************************************
@@ -581,7 +525,7 @@ interface
         load_left_right(cmpop,false);
 
         if not(cmpop) and
-           (location.register.number = NR_NO) then
+           (location.register = NR_NO) then
           location.register := rg.getregisterint(exprasmlist,OS_INT);
 
         case nodetype of
@@ -601,11 +545,7 @@ interface
                       left.location.register,location.register)
                   else
                     begin
-{$ifndef newra}
-                      tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
-{$else newra}
                       tmpreg := rg.getregisterint(exprasmlist,OS_INT);
-{$endif newra}
                       cg.a_load_const_reg(exprasmlist,OS_INT,1,tmpreg);
                       cg.a_op_reg_reg(exprasmlist,OP_SHL,OS_INT,
                         right.location.register,tmpreg);
@@ -615,11 +555,7 @@ interface
                       else
                         cg.a_op_const_reg_reg(exprasmlist,OP_OR,OS_INT,
                           aword(left.location.value),tmpreg,location.register);
-{$ifndef newra}
-                      cg.free_scratch_reg(exprasmlist,tmpreg);
-{$else newra}
                       rg.ungetregisterint(exprasmlist,tmpreg);
-{$endif newra}
                     end;
                   opdone := true;
                 end
@@ -649,20 +585,12 @@ interface
                 begin
                   if left.location.loc = LOC_CONSTANT then
                     begin
-{$ifndef newra}
-                      tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
-{$else newra}
                       tmpreg := rg.getregisterint(exprasmlist,OS_INT);
-{$endif newra}
                       cg.a_load_const_reg(exprasmlist,OS_INT,
                         aword(left.location.value),tmpreg);
                       exprasmlist.concat(taicpu.op_reg_reg_reg(A_ANDC,
                         location.register,tmpreg,right.location.register));
-{$ifndef newra}
-                      cg.free_scratch_reg(exprasmlist,tmpreg);
-{$else newra}
                       rg.ungetregisterint(exprasmlist,tmpreg);
-{$endif newra}
                     end
                   else
                     exprasmlist.concat(taicpu.op_reg_reg_reg(A_ANDC,
@@ -684,11 +612,7 @@ interface
                   (nodetype = gten)) then
                 swapleftright;
               // now we have to check whether left >= right
-{$ifndef newra}
-              tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
-{$else newra}
               tmpreg := rg.getregisterint(exprasmlist,OS_INT);
-{$endif newra}
               if left.location.loc = LOC_CONSTANT then
                 begin
                   cg.a_op_const_reg_reg(exprasmlist,OP_AND,OS_INT,
@@ -710,12 +634,8 @@ interface
                     exprasmlist.concat(taicpu.op_reg_reg_reg(A_ANDC_,tmpreg,
                       right.location.register,left.location.register));
                 end;
-{$ifndef newra}
-              cg.free_scratch_reg(exprasmlist,tmpreg);
-{$else newra}
               rg.ungetregisterint(exprasmlist,tmpreg);
-{$endif newra}
-              location.resflags.cr := R_CR0;
+              location.resflags.cr := RS_CR0;
               location.resflags.flag := F_EQ;
               opdone := true;
             end;
@@ -738,7 +658,7 @@ interface
                 location.register);
           end;
 
-        clear_left_right(cmpop);
+        release_reg_left_right;
       end;
 
 {*****************************************************************************
@@ -940,19 +860,11 @@ interface
                       else
                         begin
                           if (aword(right.location.valueqword) <> 0) then
-{$ifndef newra}
-                            tempreg64.reglo := cg.get_scratch_reg_int(exprasmlist,OS_32)
-{$else newra}
                             tempreg64.reglo := rg.getregisterint(exprasmlist,OS_32)
-{$endif newra}
                           else
                             tempreg64.reglo := left.location.registerlow;
                           if ((right.location.valueqword shr 32) <> 0) then
-{$ifndef newra}
-                            tempreg64.reghi := cg.get_scratch_reg_int(exprasmlist,OS_32)
-{$else newra}
                             tempreg64.reghi := rg.getregisterint(exprasmlist,OS_32)
-{$endif newra}
                           else
                             tempreg64.reghi := left.location.registerhigh;
                         end;
@@ -983,43 +895,28 @@ interface
                     end
                   else
                     begin
-{$ifndef newra}
-                       tempreg64.reglo := cg.get_scratch_reg_int(exprasmlist,OS_32);
-                       tempreg64.reghi := cg.get_scratch_reg_int(exprasmlist,OS_32);
-{$else newra}
                        tempreg64.reglo := rg.getregisterint(exprasmlist,OS_INT);
                        tempreg64.reghi := rg.getregisterint(exprasmlist,OS_INT);
-{$endif newra}
                        cg64.a_op64_reg_reg_reg(exprasmlist,OP_XOR,
                          left.location.register64,right.location.register64,
                          tempreg64);
                     end;
 
-                  r.enum:=R_INTREGISTER;
-                  r.number:=NR_R0;
-                  cg.a_reg_alloc(exprasmlist,r);
-                  exprasmlist.concat(taicpu.op_reg_reg_reg(A_OR_,r,
+                  cg.a_reg_alloc(exprasmlist,NR_R0);
+                  exprasmlist.concat(taicpu.op_reg_reg_reg(A_OR_,NR_R0,
                     tempreg64.reglo,tempreg64.reghi));
-                  cg.a_reg_dealloc(exprasmlist,r);
-                  if (tempreg64.reglo.number <> left.location.registerlow.number) then
-{$ifndef newra}
-                    cg.free_scratch_reg(exprasmlist,tempreg64.reglo);
-{$else newra}
-                    rg.ungetregisterint(exprasmlist,tempreg64.reglo);                                          
-{$endif newra}
-                  if (tempreg64.reghi.number <> left.location.registerhigh.number) then
-{$ifndef newra}
-                    cg.free_scratch_reg(exprasmlist,tempreg64.reghi);
-{$else newra}
+                  cg.a_reg_dealloc(exprasmlist,NR_R0);
+                  if (tempreg64.reglo <> left.location.registerlow) then
+                    rg.ungetregisterint(exprasmlist,tempreg64.reglo);
+                  if (tempreg64.reghi <> left.location.registerhigh) then
                     rg.ungetregisterint(exprasmlist,tempreg64.reghi);
-{$endif newra}
 
                   location_reset(location,LOC_FLAGS,OS_NO);
                   location.resflags := getresflags;
                 end;
               xorn,orn,andn,addn:
                 begin
-                  if (location.registerlow.number = NR_NO) then
+                  if (location.registerlow = NR_NO) then
                     begin
                       location.registerlow := rg.getregisterint(exprasmlist,OS_INT);
                       location.registerhigh := rg.getregisterint(exprasmlist,OS_INT);
@@ -1041,7 +938,7 @@ interface
 
                   if left.location.loc <> LOC_CONSTANT then
                     begin
-                      if (location.registerlow.number = NR_NO) then
+                      if (location.registerlow = NR_NO) then
                         begin
                          location.registerlow := rg.getregisterint(exprasmlist,OS_INT);
                          location.registerhigh := rg.getregisterint(exprasmlist,OS_INT);
@@ -1059,7 +956,7 @@ interface
                     end
                   else if ((left.location.valueqword shr 32) = 0) then
                     begin
-                      if (location.registerlow.number = NR_NO) then
+                      if (location.registerlow = NR_NO) then
                         begin
                          location.registerlow := rg.getregisterint(exprasmlist,OS_INT);
                          location.registerhigh := rg.getregisterint(exprasmlist,OS_INT);
@@ -1087,7 +984,7 @@ interface
                   else if (aword(left.location.valueqword) = 0) then
                     begin
                       // (const32 shl 32) - reg64
-                      if (location.registerlow.number = NR_NO) then
+                      if (location.registerlow = NR_NO) then
                         begin
                          location.registerlow := rg.getregisterint(exprasmlist,OS_INT);
                          location.registerhigh := rg.getregisterint(exprasmlist,OS_INT);
@@ -1107,7 +1004,7 @@ interface
                         def_cgsize(left.resulttype.def),false);
                       if (left.location.loc = LOC_REGISTER) then
                         location.register64 := left.location.register64
-                      else if (location.registerlow.number = NR_NO) then
+                      else if (location.registerlow = NR_NO) then
                         begin
                          location.registerlow := rg.getregisterint(exprasmlist,OS_INT);
                          location.registerhigh := rg.getregisterint(exprasmlist,OS_INT);
@@ -1151,7 +1048,7 @@ interface
            not(nodetype in [equaln,unequaln]) then
           location_reset(location,LOC_JUMP,OS_NO);
 
-        clear_left_right(cmpop);
+        release_reg_left_right;
 
       end;
 
@@ -1358,8 +1255,6 @@ interface
          { true, if unsigned types are compared }
          unsigned : boolean;
 
-         regstopush: tregisterset;
-
       begin
          { to make it more readable, string and set (not smallset!) have their
            own procedures }
@@ -1433,7 +1328,7 @@ interface
          load_left_right(cmpop, (cs_check_overflow in aktlocalswitches) and
             (nodetype in [addn,subn,muln]));
 
-         if (location.register.number = NR_NO) and
+         if (location.register = NR_NO) and
             not(cmpop) then
            location.register := rg.getregisterint(exprasmlist,OS_INT);
 
@@ -1493,20 +1388,12 @@ interface
                        end
                      else
                        begin
-{$ifndef newra}
-                         tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
-{$else newra}
-                         tmpreg := rg.getregisterint(exprasmlist,OS_INT);               
-{$endif newra}
+                         tmpreg := rg.getregisterint(exprasmlist,OS_INT);
                          cg.a_load_const_reg(exprasmlist,OS_INT,
                            aword(left.location.value),tmpreg);
                          cg.a_op_reg_reg_reg(exprasmlist,OP_SUB,OS_INT,
                            right.location.register,tmpreg,location.register);
-{$ifndef newra}
-                         cg.free_scratch_reg(exprasmlist,tmpreg);
-{$else newra}
                          rg.ungetregisterint(exprasmlist,tmpreg);
-{$endif newra}
                        end;
                  end;
                ltn,lten,gtn,gten,equaln,unequaln :
@@ -1533,7 +1420,7 @@ interface
              cg.g_overflowcheck(exprasmlist,location,resulttype.def);
            end;
 
-         clear_left_right(cmpop);
+         release_reg_left_right;
       end;
 
 begin
@@ -1541,7 +1428,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.33  2003-06-14 22:32:43  jonas
+  Revision 1.34  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.33  2003/06/14 22:32:43  jonas
     * ppc compiles with -dnewra, haven't tried to compile anything with it
       yet though
 

compiler/powerpc/nppccal.pas

@@ -75,16 +75,14 @@ implementation
   procedure tppccallnode.push_framepointer;
     var
        href : treference;
-       hregister1,hregister2 : tregister;
+       hregister1 : tregister;
        i : longint;
     begin
        if current_procinfo.procdef.parast.symtablelevel=(tprocdef(procdefinition).parast.symtablelevel) then
          begin
             { pass the same framepointer as the current procedure got }
-            hregister2.enum:=R_INTREGISTER;
-            hregister2.number:=NR_R11;
             reference_reset_base(href,current_procinfo.framepointer,PARENT_FRAMEPOINTER_OFFSET);
-            cg.a_load_ref_reg(exprasmlist,OS_ADDR,OS_ADDR,href,hregister2);
+            cg.a_load_ref_reg(exprasmlist,OS_ADDR,OS_ADDR,href,NR_R11);
             { it must be adjusted! }
          end
          { this is only true if the difference is one !!
@@ -92,11 +90,7 @@ implementation
        else if (current_procinfo.procdef.parast.symtablelevel=(tprocdef(procdefinition).parast.symtablelevel)-1) then
          begin
             { pass the same framepointer as the current procedure got }
-            hregister1.enum:=R_INTREGISTER;
-            hregister1.number:=NR_R1;
-            hregister2.enum:=R_INTREGISTER;
-            hregister2.number:=NR_R11;
-            cg.a_load_reg_reg(exprasmlist,OS_32,OS_32,hregister1,hregister2);
+            cg.a_load_reg_reg(exprasmlist,OS_32,OS_32,NR_R1,NR_R11);
          end
        else if (current_procinfo.procdef.parast.symtablelevel>(tprocdef(procdefinition).parast.symtablelevel)) then
          begin
@@ -112,9 +106,7 @@ implementation
                  cg.a_load_ref_reg(exprasmlist,OS_ADDR,OS_ADDR,href,hregister1);
                  dec(i);
               end;
-            hregister2.enum:=R_INTREGISTER;
-            hregister2.number:=NR_R11;
-            cg.a_load_reg_reg(exprasmlist,OS_ADDR,OS_ADDR,hregister1,hregister2);
+            cg.a_load_reg_reg(exprasmlist,OS_ADDR,OS_ADDR,hregister1,NR_R11);
             rg.ungetregisterint(exprasmlist,hregister1);
          end
        else
@@ -131,7 +123,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.20  2003-07-08 21:24:59  peter
+  Revision 1.21  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.20  2003/07/08 21:24:59  peter
     * sparc fixes
 
   Revision 1.19  2003/07/06 20:25:03  jonas

compiler/powerpc/nppccnv.pas

@@ -188,11 +188,7 @@ implementation
               leftreg := left.location.register;
               if signed then
                 begin
-{$ifndef newra}
-                  valuereg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
-{$else newra}
-                  valuereg := rg.getregisterint(exprasmlist,OS_INT);               
-{$endif newra}
+                  valuereg := rg.getregisterint(exprasmlist,OS_INT);
                   valuereg_is_scratch := true;
                 end
               else
@@ -200,11 +196,7 @@ implementation
             end;
           LOC_REFERENCE,LOC_CREFERENCE:
             begin
-{$ifndef newra}
-              leftreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
-{$else newra}
-              leftreg := rg.getregisterint(exprasmlist,OS_INT);               
-{$endif newra}
+              leftreg := rg.getregisterint(exprasmlist,OS_INT);
               valuereg := leftreg;
               valuereg_is_scratch := true;
               if signed then
@@ -217,18 +209,10 @@ implementation
           else
             internalerror(200110012);
          end;
-{$ifndef newra}
-         tempreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
-{$else newra}
-         tempreg := rg.getregisterint(exprasmlist,OS_INT);               
-{$endif newra}
+         tempreg := rg.getregisterint(exprasmlist,OS_INT);
          exprasmlist.concat(taicpu.op_reg_const(A_LIS,tempreg,$4330));
          cg.a_load_reg_ref(exprasmlist,OS_32,OS_32,tempreg,ref);
-{$ifndef newra}
-         cg.free_scratch_reg(exprasmlist,tempreg);
-{$else newra}
-         rg.ungetregisterint(exprasmlist,tempreg);               
-{$endif newra}
+         rg.ungetregisterint(exprasmlist,tempreg);
          if signed then
            exprasmlist.concat(taicpu.op_reg_reg_const(A_XORIS,valuereg,
              { xoris expects a unsigned 16 bit int (FK) }
@@ -237,23 +221,15 @@ implementation
          cg.a_load_reg_ref(exprasmlist,OS_32,OS_32,valuereg,ref);
          dec(ref.offset,4);
          if (valuereg_is_scratch) then
-{$ifndef newra}
-           cg.free_scratch_reg(exprasmlist,valuereg);
-{$else newra}         
            rg.ungetregisterint(exprasmlist,valuereg);
-{$endif newra}         
- 
+
          if (left.location.loc = LOC_REGISTER) or
             ((left.location.loc = LOC_CREGISTER) and
              not signed) then
            rg.ungetregisterint(exprasmlist,leftreg)
          else
-{$ifndef newra}
-           cg.free_scratch_reg(exprasmlist,valuereg);
-{$else newra}         
-           rg.ungetregisterint(exprasmlist,valuereg);                                         
-{$endif newra}         
- 
+           rg.ungetregisterint(exprasmlist,valuereg);
+
          tmpfpureg := rg.getregisterfpu(exprasmlist,OS_F64);
          cg.a_loadfpu_ref_reg(exprasmlist,OS_F64,tempconst.location.reference,
            tmpfpureg);
@@ -455,7 +431,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.41  2003-08-09 15:28:29  jonas
+  Revision 1.42  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.41  2003/08/09 15:28:29  jonas
     * fixed conversion from signed value to floats if the compiler is
       compiled with a 1.0.x compiler
 

compiler/powerpc/nppcmat.pas

@@ -71,24 +71,16 @@ implementation
         divops: array[boolean, boolean] of tasmop =
           ((A_DIVWU,A_DIVWUO_),(A_DIVW,A_DIVWO_));
       var
-         power,
-         l1, l2     : longint;
+         power  : longint;
          op         : tasmop;
          numerator,
          divider,
          resultreg  : tregister;
-         saved      : tmaybesave;
          size       : Tcgsize;
 
       begin
          secondpass(left);
-{$ifndef newra}
-         maybe_save(exprasmlist,right.registers32,left.location,saved);
-{$endif newra}
          secondpass(right);
-{$ifndef newra}
-         maybe_restore(exprasmlist,left.location,saved);
-{$endif newra}
          location_copy(location,left.location);
 
          { put numerator in register }
@@ -106,12 +98,8 @@ implementation
            end;
          if (nodetype = modn) then
            begin
-{$ifndef newra}
-             resultreg := cg.get_scratch_reg_int(exprasmlist,size);
-{$else newra}         
-             resultreg := rg.getregisterint(exprasmlist,size);                                         
-{$endif newra}         
-            end;
+             resultreg := rg.getregisterint(exprasmlist,size);
+           end;
 
          if (nodetype = divn) and
             (right.nodetype = ordconstn) and
@@ -153,18 +141,14 @@ implementation
                rg.ungetregisterint(exprasmlist,divider);
                exprasmlist.concat(taicpu.op_reg_reg_reg(A_SUB,location.register,
                  numerator,resultreg));
-{$ifndef newra}
-               cg.free_scratch_reg(exprasmlist,resultreg);
-{$else newra}         
                rg.ungetregisterint(exprasmlist,resultreg);
-{$endif newra}         
                resultreg := location.register;
              end
            else
              rg.ungetregisterint(exprasmlist,divider);
            end;
        { free used registers }
-        if numerator.number <> resultreg.number then
+        if numerator <> resultreg then
           rg.ungetregisterint(exprasmlist,numerator);
         { set result location }
         location.loc:=LOC_REGISTER;
@@ -190,18 +174,11 @@ implementation
          op : topcg;
          asmop1, asmop2: tasmop;
          shiftval: aword;
-         saved : tmaybesave;
          r : Tregister;
 
       begin
          secondpass(left);
-{$ifndef newra}
-         maybe_save(exprasmlist,right.registers32,left.location,saved);
-{$endif newra}
          secondpass(right);
-{$ifndef newra}
-         maybe_restore(exprasmlist,left.location,saved);
-{$endif newra}
 
          if is_64bitint(left.resulttype.def) then
            begin
@@ -285,25 +262,23 @@ implementation
                    end;
 
                  rg.getexplicitregisterint(exprasmlist,NR_R0);
-                 r.enum:=R_INTREGISTER;
-                 r.number:=NR_R0;
                  exprasmlist.concat(taicpu.op_reg_reg_const(A_SUBFIC,
-                   r,hregister1,32));
+                   NR_R0,hregister1,32));
                  exprasmlist.concat(taicpu.op_reg_reg_reg(asmop1,
                    location.registerhigh,hregisterhigh,hregister1));
                  exprasmlist.concat(taicpu.op_reg_reg_reg(asmop2,
-                   r,hregisterlow,r));
+                   NR_R0,hregisterlow,NR_R0));
                  exprasmlist.concat(taicpu.op_reg_reg_reg(A_OR,
-                   location.registerhigh,location.registerhigh,r));
+                   location.registerhigh,location.registerhigh,NR_R0));
                  exprasmlist.concat(taicpu.op_reg_reg_const(A_SUBI,
-                   r,hregister1,32));
+                   NR_R0,hregister1,32));
                  exprasmlist.concat(taicpu.op_reg_reg_reg(asmop1,
-                   r,hregisterlow,r));
+                   NR_R0,hregisterlow,NR_R0));
                  exprasmlist.concat(taicpu.op_reg_reg_reg(A_OR,
-                   location.registerhigh,location.registerhigh,r));
+                   location.registerhigh,location.registerhigh,NR_R0));
                  exprasmlist.concat(taicpu.op_reg_reg_reg(asmop1,
                    location.registerlow,hregisterlow,hregister1));
-                 rg.ungetregisterint(exprasmlist,r);
+                 rg.ungetregisterint(exprasmlist,NR_R0);
 
                  if nodetype = shrn then
                    begin
@@ -312,11 +287,6 @@ implementation
                      location.registerlow := resultreg;
                    end;
 
-{$ifndef newra}
-                 if right.location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
-                   cg.free_scratch_reg(exprasmlist,hregister1)
-                  else
-{$endif newra}
                    rg.ungetregisterint(exprasmlist,hregister1);
                end
            end
@@ -498,7 +468,7 @@ implementation
                       exprasmlist.concat(taicpu.op_reg_const(A_CMPWI,left.location.register,0));
                       location_release(exprasmlist,left.location);
                       location_reset(location,LOC_FLAGS,OS_NO);
-                      location.resflags.cr:=r_cr0;
+                      location.resflags.cr:=RS_CR0;
                       location.resflags.flag:=F_EQ;
                    end;
                   else
@@ -538,7 +508,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.31  2003-06-14 22:32:43  jonas
+  Revision 1.32  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.31  2003/06/14 22:32:43  jonas
     * ppc compiles with -dnewra, haven't tried to compile anything with it
       yet though
 

compiler/powerpc/nppcset.pas

@@ -78,19 +78,11 @@ implementation
                 hregister,value))
             else
               begin
-{$ifndef newra}
-                tmpreg := cg.get_scratch_reg_int(exprasmlist,OS_INT);
-{$else newra}         
                 tmpreg := rg.getregisterint(exprasmlist,OS_INT);
-{$endif newra}         
                  cg.a_load_const_reg(exprasmlist,OS_INT,aword(value),tmpreg);
                 exprasmlist.concat(taicpu.op_reg_reg_reg(A_ADD_,hregister,
                   hregister,tmpreg));
-{$ifndef newra}
-                cg.free_scratch_reg(exprasmlist,tmpreg);
-{$else newra}         
-                rg.ungetregisterint(exprasmlist,tmpreg);                                         
-{$endif newra}         
+                rg.ungetregisterint(exprasmlist,tmpreg);
                end;
           end;
 
@@ -105,14 +97,13 @@ implementation
              end;
            if t^._low=t^._high then
              begin
-                r.enum:=R_CR0;
                 if t^._low-last=0 then
-                  exprasmlist.concat(taicpu.op_reg_reg_const(A_CMPWI,r,
+                  exprasmlist.concat(taicpu.op_reg_reg_const(A_CMPWI,NR_CR0,
                     hregister,0))
                 else
                   gensub(longint(t^._low-last));
                 last:=t^._low;
-                resflags.cr := R_CR0;
+                resflags.cr := RS_CR0;
                 resflags.flag := F_EQ;
                 cg.a_jmp_flags(exprasmlist,resflags,t^.statement);
              end
@@ -167,7 +158,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.8  2003-06-14 22:32:43  jonas
+  Revision 1.9  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.8  2003/06/14 22:32:43  jonas
     * ppc compiles with -dnewra, haven't tried to compile anything with it
       yet though
 

compiler/powerpc/ppcreg.dat

@@ -4,126 +4,129 @@
 ; PowerPC registers
 ;
 ; layout
-; <name>,<value>,<stdname>,<motname>,<stabidx>
+; <name>,<value>,<stdname>,<gasname>,<motname>,<stabidx>
 ;
-NR_NO,$00000000,INVALID,INVALID,-1
+NO,$00,$00,INVALID,INVALID,INVALID,-1
 
-NR_R0,$01000000,r0,r0,0
-NR_R1,$01000001,r1,r1,1
-NR_R2,$01000002,r2,r2,2
-NR_R3,$01000003,r3,r3,3
-NR_R4,$01000004,r4,r4,4
-NR_R5,$01000005,r5,r5,5
-NR_R6,$01000006,r6,r6,6
-NR_R7,$01000007,r7,r7,7
-NR_R8,$01000008,r8,r8,8
-NR_R9,$01000009,r9,r9,9
-NR_R10,$0100000a,r10,r10,10
-NR_R11,$0100000b,r11,r11,11
-NR_R12,$0100000c,r12,r12,12
-NR_R13,$0100000d,r13,r13,13
-NR_R14,$0100000e,r14,r14,14
-NR_R15,$0100000f,r15,r15,15
-NR_R16,$01000010,r16,r16,16
-NR_R17,$01000011,r17,r17,17
-NR_R18,$01000012,r18,r18,18
-NR_R19,$01000013,r19,r19,19
-NR_R20,$01000014,r20,r20,20
-NR_R21,$01000015,r21,r21,21
-NR_R22,$01000016,r22,r22,22
-NR_R23,$01000017,r23,r23,23
-NR_R24,$01000018,r24,r24,24
-NR_R25,$01000019,r25,r25,25
-NR_R26,$0100001a,r26,r26,26
-NR_R27,$0100001b,r27,r27,27
-NR_R28,$0100001c,r28,r28,28
-NR_R29,$0100001d,r29,r29,29
-NR_R30,$0100001e,r30,r30,30
-NR_R31,$0100001f,r31,r31,31
+R0,$01,$00,r0,r0,r0,0
+R1,$01,$01,r1,r1,r1,1
+R2,$01,$02,r2,r2,r2,2
+R3,$01,$03,r3,r3,r3,3
+R4,$01,$04,r4,r4,r4,4
+R5,$01,$05,r5,r5,r5,5
+R6,$01,$06,r6,r6,r6,6
+R7,$01,$07,r7,r7,r7,7
+R8,$01,$08,r8,r8,r8,8
+R9,$01,$09,r9,r9,r9,9
+R10,$01,$0a,r10,r10,r10,10
+R11,$01,$0b,r11,r11,r11,11
+R12,$01,$0c,r12,r12,r12,12
+R13,$01,$0d,r13,r13,r13,13
+R14,$01,$0e,r14,r14,r14,14
+R15,$01,$0f,r15,r15,r15,15
+R16,$01,$10,r16,r16,r16,16
+R17,$01,$11,r17,r17,r17,17
+R18,$01,$12,r18,r18,r18,18
+R19,$01,$13,r19,r19,r19,19
+R20,$01,$14,r20,r20,r20,20
+R21,$01,$15,r21,r21,r21,21
+R22,$01,$16,r22,r22,r22,22
+R23,$01,$17,r23,r23,r23,23
+R24,$01,$18,r24,r24,r24,24
+R25,$01,$19,r25,r25,r25,25
+R26,$01,$1a,r26,r26,r26,26
+R27,$01,$1b,r27,r27,r27,27
+R28,$01,$1c,r28,r28,r28,28
+R29,$01,$1d,r29,r29,r29,29
+R30,$01,$1e,r30,r30,r30,30
+R31,$01,$1f,r31,r31,r31,31
 
-NR_F0,$02000000,F0,F0,32
-NR_F1,$02000001,F1,F1,33
-NR_F2,$02000002,F2,F2,34
-NR_F3,$02000003,F3,F3,35
-NR_F4,$02000004,F4,F4,36
-NR_F5,$02000005,F5,F5,37
-NR_F6,$02000006,F6,F6,38
-NR_F7,$02000007,F7,F7,39
-NR_F8,$02000008,F8,F8,40
-NR_F9,$02000009,F9,F9,41
-NR_F10,$0200000a,F10,F10,42
-NR_F11,$0200000b,F11,F11,43
-NR_F12,$0200000c,F12,F12,44
-NR_F13,$0200000d,F13,F13,45
-NR_F14,$0200000e,F14,F14,46
-NR_F15,$0200000f,F15,F15,47
-NR_F16,$02000010,F16,F16,48
-NR_F17,$02000011,F17,F17,49
-NR_F18,$02000012,F18,F18,50
-NR_F19,$02000013,F19,F19,51
-NR_F20,$02000014,F20,F20,52
-NR_F21,$02000015,F21,F21,53
-NR_F22,$02000016,F22,F22,54
-NR_F23,$02000017,F23,F23,55
-NR_F24,$02000018,F24,F24,56
-NR_F25,$02000019,F25,F25,57
-NR_F26,$0200001a,F26,F26,58
-NR_F27,$0200001b,F27,F27,59
-NR_F28,$0200001c,F28,F28,60
-NR_F29,$0200001d,F29,F29,61
-NR_F30,$0200001e,F30,F30,62
-NR_F31,$0200001f,F31,F31,63
+F0,$02,$00,F0,f0,F0,32
+F1,$02,$01,F1,f1,F1,33
+F2,$02,$02,F2,f2,F2,34
+F3,$02,$03,F3,f3,F3,35
+F4,$02,$04,F4,f4,F4,36
+F5,$02,$05,F5,f5,F5,37
+F6,$02,$06,F6,f6,F6,38
+F7,$02,$07,F7,f7,F7,39
+F8,$02,$08,F8,f8,F8,40
+F9,$02,$09,F9,f9,F9,41
+F10,$02,$0a,F10,f10,F10,42
+F11,$02,$0b,F11,f11,F11,43
+F12,$02,$0c,F12,f12,F12,44
+F13,$02,$0d,F13,f13,F13,45
+F14,$02,$0e,F14,f14,F14,46
+F15,$02,$0f,F15,f15,F15,47
+F16,$02,$10,F16,f16,F16,48
+F17,$02,$11,F17,f17,F17,49
+F18,$02,$12,F18,f18,F18,50
+F19,$02,$13,F19,f19,F19,51
+F20,$02,$14,F20,f20,F20,52
+F21,$02,$15,F21,f21,F21,53
+F22,$02,$16,F22,f22,F22,54
+F23,$02,$17,F23,f23,F23,55
+F24,$02,$18,F24,f24,F24,56
+F25,$02,$19,F25,f25,F25,57
+F26,$02,$1a,F26,f26,F26,58
+F27,$02,$1b,F27,f27,F27,59
+F28,$02,$1c,F28,f28,F28,60
+F29,$02,$1d,F29,f29,F29,61
+F30,$02,$1e,F30,f30,F30,62
+F31,$02,$1f,F31,f31,F31,63
 
-NR_M0,$03000000,M0,M0,-1
-NR_M1,$03000001,M1,M1,-1
-NR_M2,$03000002,M2,M2,-1
-NR_M3,$03000003,M3,M3,-1
-NR_M4,$03000004,M4,M4,-1
-NR_M5,$03000005,M5,M5,-1
-NR_M6,$03000006,M6,M6,-1
-NR_M7,$03000007,M7,M7,-1
-NR_M8,$03000008,M8,M8,-1
-NR_M9,$03000009,M9,M9,-1
-NR_M10,$0300000a,M10,M10,-1
-NR_M11,$0300000b,M11,M11,-1
-NR_M12,$0300000c,M12,M12,-1
-NR_M13,$0300000d,M13,M13,-1
-NR_M14,$0300000e,M14,M14,-1
-NR_M15,$0300000f,M15,M15,-1
-NR_M16,$03000010,M16,M16,-1
-NR_M17,$03000011,M17,M17,-1
-NR_M18,$03000012,M18,M18,-1
-NR_M19,$03000013,M19,M19,-1
-NR_M20,$03000014,M20,M20,-1
-NR_M21,$03000015,M21,M21,-1
-NR_M22,$03000016,M22,M22,-1
-NR_M23,$03000017,M23,M23,-1
-NR_M24,$03000018,M24,M24,-1
-NR_M25,$03000019,M25,M25,-1
-NR_M26,$0300001a,M26,M26,-1
-NR_M27,$0300001b,M27,M27,-1
-NR_M28,$0300001c,M28,M28,-1
-NR_M29,$0300001d,M29,M29,-1
-NR_M30,$0300001e,M30,M30,-1
-NR_M31,$0300001f,M31,M31,-1
+M0,$03,$00,M0,v0,M0,-1
+M1,$03,$01,M1,v1,M1,-1
+M2,$03,$02,M2,v2,M2,-1
+M3,$03,$03,M3,v3,M3,-1
+M4,$03,$04,M4,v4,M4,-1
+M5,$03,$05,M5,v5,M5,-1
+M6,$03,$06,M6,v6,M6,-1
+M7,$03,$07,M7,v7,M7,-1
+M8,$03,$08,M8,v8,M8,-1
+M9,$03,$09,M9,v9,M9,-1
+M10,$03,$0a,M10,v10,M10,-1
+M11,$03,$0b,M11,v11,M11,-1
+M12,$03,$0c,M12,v12,M12,-1
+M13,$03,$0d,M13,v13,M13,-1
+M14,$03,$0e,M14,v14,M14,-1
+M15,$03,$0f,M15,v15,M15,-1
+M16,$03,$10,M16,v16,M16,-1
+M17,$03,$11,M17,v17,M17,-1
+M18,$03,$12,M18,v18,M18,-1
+M19,$03,$13,M19,v19,M19,-1
+M20,$03,$14,M20,v20,M20,-1
+M21,$03,$15,M21,v21,M21,-1
+M22,$03,$16,M22,v22,M22,-1
+M23,$03,$17,M23,v23,M23,-1
+M24,$03,$18,M24,v24,M24,-1
+M25,$03,$19,M25,v25,M25,-1
+M26,$03,$1a,M26,v26,M26,-1
+M27,$03,$1b,M27,v27,M27,-1
+M28,$03,$1c,M28,v28,M28,-1
+M29,$03,$1d,M29,v29,M29,-1
+M30,$03,$1e,M30,v30,M30,-1
+M31,$03,$1f,M31,v31,M31,-1
 
-NR_CR,$05000000,CR,CR,-1
-NR_CR0,$05000001,CR0,CR0,68
-NR_CR1,$05000002,CR1,CR1,69
-NR_CR2,$05000003,CR2,CR2,70
-NR_CR3,$05000004,CR3,CR3,71
-NR_CR4,$05000005,CR4,CR4,72
-NR_CR5,$05000006,CR5,CR5,73
-NR_CR6,$05000007,CR6,CR6,74
-NR_CR7,$05000008,CR7,CR7,75
-NR_XER,$05000009,XER,XER,76
-NR_LR,$0500000a,LR,LR,65
-NR_CTR,$0500000b,CTR,CTR,66
-NR_FPSCR,$0500000c,FPSCR,FPSCR,-1
+CR,$05,$00,CR,cR,CR,-1
+CR0,$05,$01,CR0,cr0,CR0,68
+CR1,$05,$02,CR1,cr1,CR1,69
+CR2,$05,$03,CR2,cr2,CR2,70
+CR3,$05,$04,CR3,cr3,CR3,71
+CR4,$05,$05,CR4,cr4,CR4,72
+CR5,$05,$06,CR5,cr5,CR5,73
+CR6,$05,$07,CR6,cr6,CR6,74
+CR7,$05,$08,CR7,cr7,CR7,75
+XER,$05,$09,XER,xer,XER,76
+LR,$05,$0a,LR,lr,LR,65
+CTR,$05,$0b,CTR,ctr,CTR,66
+FPSCR,$05,$0c,FPSCR,fpscr,FPSCR,-1
 
 ;
 ; $Log$
-; Revision 1.2  2003-09-03 15:55:01  peter
+; Revision 1.3  2003-09-03 19:35:24  peter
+;   * powerpc compiles again
+;
+; Revision 1.2  2003/09/03 15:55:01  peter
 ;   * NEWRA branch merged
 ;
 ; Revision 1.1.2.1  2003/09/02 20:48:22  peter

compiler/powerpc/radirect.pas

@@ -53,26 +53,17 @@ interface
        { codegen }
        cgbase,
        { constants }
-       agppcgas,
-       cpubase
+       cginfo,cpubase,
+       itppcgas
        ;
 
-    { checks if a string identifies a register }
-    { it should be optimized                   }
-    function is_register(const s : string) : boolean;
-      var
-         r : toldregister;
-      begin
-         is_register:=false;
-         if length(s)>5 then
-           exit;
-         for r:=low(gas_reg2str) to high(gas_reg2str) do
-           if gas_reg2str[r]=s then
-              begin
-                 is_register:=true;
-                 exit;
-              end;
-      end;
+function is_register(const s:string):boolean;
+begin
+  is_register:=false;
+  if gas_regnum_search(lower(s))<>NR_NO then
+    is_register:=true;
+end;
+
 
     function assemble : tnode;
 
@@ -105,9 +96,7 @@ interface
 
      begin
        ende:=false;
-       framereg.enum:=R_INTREGISTER;
-       framereg.number:=NR_STACK_POINTER_REG;
-       convert_register_to_enum(framereg);
+       framereg:=NR_STACK_POINTER_REG;
        s:='';
        if assigned(current_procinfo.procdef.funcretsym) and
           is_fpu(current_procinfo.procdef.rettype.def) then
@@ -192,14 +181,14 @@ interface
                                                  hs:=tvarsym(sym).mangledname
                                                else
                                                  begin
-                                                    if (tvarsym(sym).reg.enum<>R_NO) then
+                                                    if (tvarsym(sym).reg<>NR_NO) then
 // until new regallocator stuff settles down
 //                                                      hs:=gas_reg2str[procinfo.framepointer.enum]
-                                                      hs:=gas_reg2str[framereg.enum]
+                                                      hs:=gas_regname(framereg)
                                                     else
                                                       hs:=tostr(tvarsym(sym).address)+
 //                                                        '('+gas_reg2str[procinfo.framepointer.enum]+')';
-                                                        '('+gas_reg2str[framereg.enum]+')';
+                                                        '('+gas_regname(framereg)+')';
                                                  end;
                                             end
                                           else
@@ -221,7 +210,7 @@ interface
                                                     { set offset }
                                                     inc(l,current_procinfo.procdef.parast.address_fixup);
 //                                                    hs:=tostr(l)+'('+gas_reg2str[procinfo.framepointer.enum]+')';
-                                                    hs:=tostr(l)+'('+gas_reg2str[framereg.enum]+')';
+                                                    hs:=tostr(l)+'('+gas_regname(framereg)+')';
                                                     if pos(',',s) > 0 then
                                                       tvarsym(sym).varstate:=vs_used;
                                                  end;
@@ -291,7 +280,7 @@ interface
                                                       Message(asmr_e_void_function);
                                                  end
                                                { implement old stack/frame pointer access for nested procedures }
-                                               {!!!!
+                                               (* !!!!
                                                else if upper(hs)='__OLDSP' then
                                                  begin
                                                     { complicate to check there }
@@ -302,7 +291,7 @@ interface
                                                     else
                                                       Message(asmr_e_cannot_use_OLDEBP_outside_nested_procedure);
                                                  end;
-                                               }
+                                               *)
                                                end;
 {$endif dummy}
                                             end;
@@ -351,7 +340,10 @@ initialization
 end.
 {
   $Log$
-  Revision 1.16  2003-06-13 21:19:32  peter
+  Revision 1.17  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.16  2003/06/13 21:19:32  peter
     * current_procdef removed, use current_procinfo.procdef instead
 
   Revision 1.15  2003/06/02 21:42:05  jonas

compiler/powerpc/rgcpu.pas

@@ -36,22 +36,16 @@ unit rgcpu;
 
      type
        trgcpu = class(trgobj)
+{
          function getexplicitregisterint(list: taasmoutput; reg: Tnewregister): tregister; override;
          procedure ungetregisterint(list: taasmoutput; reg: tregister); override;
          function getexplicitregisterfpu(list : taasmoutput; r : Toldregister) : tregister;override;
          procedure ungetregisterfpu(list: taasmoutput; r : tregister; size:TCGsize);override;
-{$ifndef newra}
-         procedure saveusedintregisters(list:Taasmoutput;
-                                         var saved:Tpushedsavedint;
-                                         const s:Tsupregset);override;
-         procedure saveusedotherregisters(list:Taasmoutput;
-                                           var saved:Tpushedsavedother;
-                                           const s:Tregisterset);override;
-{$endif newra}
          procedure cleartempgen; override;
         private
          usedpararegs: Tsupregset;
          usedparafpuregs: tregisterset;
+}
        end;
 
   implementation
@@ -59,14 +53,15 @@ unit rgcpu;
     uses
       cgobj, verbose, cutils;
 
+(*
     function trgcpu.getexplicitregisterint(list: taasmoutput; reg: Tnewregister): tregister;
 
       begin
-        if ((reg shr 8) in [RS_R0{$ifndef newra},RS_R2..RS_R12{$endif}]) and
+        if ((reg shr 8) in [RS_R0]) and
            not((reg shr 8) in is_reg_var_int) then
           begin
             if (reg shr 8) in usedpararegs then
-              internalerror(2003060701); 
+              internalerror(2003060701);
 {              comment(v_warning,'Double allocation of register '+tostr((reg shr 8)-1));}
             include(usedpararegs,reg shr 8);
             result.enum:=R_INTREGISTER;
@@ -80,11 +75,11 @@ unit rgcpu;
     procedure trgcpu.ungetregisterint(list: taasmoutput; reg: tregister);
 
       begin
-        if ((reg.number shr 8) in [RS_R0{$ifndef newra},RS_R2..RS_R12{$endif newra}]) and
+        if ((reg.number shr 8) in [RS_R0]) and
             not((reg.number shr 8) in is_reg_var_int) then
           begin
             if not((reg.number shr 8) in usedpararegs) then
-              internalerror(2003060702); 
+              internalerror(2003060702);
 {               comment(v_warning,'Double free of register '+tostr((reg.number shr 8)-1));}
             exclude(usedpararegs,reg.number shr 8);
             cg.a_reg_dealloc(list,reg);
@@ -125,30 +120,6 @@ unit rgcpu;
       end;
 
 
-{$ifndef newra}
-    procedure trgcpu.saveusedintregisters(list:Taasmoutput;
-                                         var saved:Tpushedsavedint;
-                                         const s:Tsupregset);
-      begin
-        // saving/restoring is done by the callee (except for registers
-        // which already contain parameters, but those aren't allocated
-        // correctly yet)
-        filldword(saved,sizeof(saved) div 4,reg_not_saved);
-      end;
-
-
-    procedure trgcpu.saveusedotherregisters(list:Taasmoutput;
-                                           var saved:Tpushedsavedother;
-                                           const s:Tregisterset);
-      begin
-        // saving/restoring is done by the callee (except for registers
-        // which already contain parameters, but those aren't allocated
-        // correctly yet)
-        filldword(saved,sizeof(saved) div 4,reg_not_saved);
-      end;
-{$endif newra}
-
-
     procedure trgcpu.cleartempgen;
 
       begin
@@ -156,14 +127,18 @@ unit rgcpu;
         usedpararegs := [];
         usedparafpuregs := [];
       end;
+*)
 
 initialization
-  rg := trgcpu.create(last_supreg-first_supreg+1);
+  rg := trgcpu.create(last_int_supreg-first_int_supreg+1);
 end.
 
 {
   $Log$
-  Revision 1.13  2003-07-06 15:27:44  jonas
+  Revision 1.14  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.13  2003/07/06 15:27:44  jonas
     * make sure all registers except r0 are handled by the register
       allocator for -dnewra
 

compiler/powerpc/rppcgas.inc

@@ -0,0 +1,111 @@
+{ don't edit, this file is generated from ppcreg.dat }
+'INVALID',
+'r0',
+'r1',
+'r2',
+'r3',
+'r4',
+'r5',
+'r6',
+'r7',
+'r8',
+'r9',
+'r10',
+'r11',
+'r12',
+'r13',
+'r14',
+'r15',
+'r16',
+'r17',
+'r18',
+'r19',
+'r20',
+'r21',
+'r22',
+'r23',
+'r24',
+'r25',
+'r26',
+'r27',
+'r28',
+'r29',
+'r30',
+'r31',
+'f0',
+'f1',
+'f2',
+'f3',
+'f4',
+'f5',
+'f6',
+'f7',
+'f8',
+'f9',
+'f10',
+'f11',
+'f12',
+'f13',
+'f14',
+'f15',
+'f16',
+'f17',
+'f18',
+'f19',
+'f20',
+'f21',
+'f22',
+'f23',
+'f24',
+'f25',
+'f26',
+'f27',
+'f28',
+'f29',
+'f30',
+'f31',
+'v0',
+'v1',
+'v2',
+'v3',
+'v4',
+'v5',
+'v6',
+'v7',
+'v8',
+'v9',
+'v10',
+'v11',
+'v12',
+'v13',
+'v14',
+'v15',
+'v16',
+'v17',
+'v18',
+'v19',
+'v20',
+'v21',
+'v22',
+'v23',
+'v24',
+'v25',
+'v26',
+'v27',
+'v28',
+'v29',
+'v30',
+'v31',
+'cR',
+'cr0',
+'cr1',
+'cr2',
+'cr3',
+'cr4',
+'cr5',
+'cr6',
+'cr7',
+'xer',
+'lr',
+'ctr',
+'fpscr'

compiler/powerpc/rppcgri.inc

@@ -0,0 +1,111 @@
+{ don't edit, this file is generated from ppcreg.dat }
+0,
+97,
+98,
+99,
+100,
+101,
+102,
+103,
+104,
+105,
+108,
+33,
+34,
+43,
+44,
+45,
+46,
+47,
+48,
+49,
+50,
+51,
+52,
+35,
+53,
+54,
+55,
+56,
+57,
+58,
+59,
+60,
+61,
+62,
+36,
+63,
+64,
+37,
+38,
+39,
+40,
+41,
+42,
+109,
+107,
+1,
+2,
+11,
+12,
+13,
+14,
+15,
+16,
+17,
+18,
+19,
+20,
+3,
+21,
+22,
+23,
+24,
+25,
+26,
+27,
+28,
+29,
+30,
+4,
+31,
+32,
+5,
+6,
+7,
+8,
+9,
+10,
+65,
+66,
+75,
+76,
+77,
+78,
+79,
+80,
+81,
+82,
+83,
+84,
+67,
+85,
+86,
+87,
+88,
+89,
+90,
+91,
+92,
+93,
+94,
+68,
+95,
+96,
+69,
+70,
+71,
+72,
+73,
+74,
+106

compiler/powerpc/rppcnum.inc

@@ -1,111 +1,111 @@
 { don't edit, this file is generated from ppcreg.dat }
-$00000000,
-$01000000,
-$01000001,
-$01000002,
-$01000003,
-$01000004,
-$01000005,
-$01000006,
-$01000007,
-$01000008,
-$01000009,
-$0100000a,
-$0100000b,
-$0100000c,
-$0100000d,
-$0100000e,
-$0100000f,
-$01000010,
-$01000011,
-$01000012,
-$01000013,
-$01000014,
-$01000015,
-$01000016,
-$01000017,
-$01000018,
-$01000019,
-$0100001a,
-$0100001b,
-$0100001c,
-$0100001d,
-$0100001e,
-$0100001f,
-$02000000,
-$02000001,
-$02000002,
-$02000003,
-$02000004,
-$02000005,
-$02000006,
-$02000007,
-$02000008,
-$02000009,
-$0200000a,
-$0200000b,
-$0200000c,
-$0200000d,
-$0200000e,
-$0200000f,
-$02000010,
-$02000011,
-$02000012,
-$02000013,
-$02000014,
-$02000015,
-$02000016,
-$02000017,
-$02000018,
-$02000019,
-$0200001a,
-$0200001b,
-$0200001c,
-$0200001d,
-$0200001e,
-$0200001f,
-$03000000,
-$03000001,
-$03000002,
-$03000003,
-$03000004,
-$03000005,
-$03000006,
-$03000007,
-$03000008,
-$03000009,
-$0300000a,
-$0300000b,
-$0300000c,
-$0300000d,
-$0300000e,
-$0300000f,
-$03000010,
-$03000011,
-$03000012,
-$03000013,
-$03000014,
-$03000015,
-$03000016,
-$03000017,
-$03000018,
-$03000019,
-$0300001a,
-$0300001b,
-$0300001c,
-$0300001d,
-$0300001e,
-$0300001f,
-$05000000,
-$05000001,
-$05000002,
-$05000003,
-$05000004,
-$05000005,
-$05000006,
-$05000007,
-$05000008,
-$05000009,
-$0500000a,
-$0500000b,
-$0500000c
+NR_NO,
+NR_R0,
+NR_R1,
+NR_R2,
+NR_R3,
+NR_R4,
+NR_R5,
+NR_R6,
+NR_R7,
+NR_R8,
+NR_R9,
+NR_R10,
+NR_R11,
+NR_R12,
+NR_R13,
+NR_R14,
+NR_R15,
+NR_R16,
+NR_R17,
+NR_R18,
+NR_R19,
+NR_R20,
+NR_R21,
+NR_R22,
+NR_R23,
+NR_R24,
+NR_R25,
+NR_R26,
+NR_R27,
+NR_R28,
+NR_R29,
+NR_R30,
+NR_R31,
+NR_F0,
+NR_F1,
+NR_F2,
+NR_F3,
+NR_F4,
+NR_F5,
+NR_F6,
+NR_F7,
+NR_F8,
+NR_F9,
+NR_F10,
+NR_F11,
+NR_F12,
+NR_F13,
+NR_F14,
+NR_F15,
+NR_F16,
+NR_F17,
+NR_F18,
+NR_F19,
+NR_F20,
+NR_F21,
+NR_F22,
+NR_F23,
+NR_F24,
+NR_F25,
+NR_F26,
+NR_F27,
+NR_F28,
+NR_F29,
+NR_F30,
+NR_F31,
+NR_M0,
+NR_M1,
+NR_M2,
+NR_M3,
+NR_M4,
+NR_M5,
+NR_M6,
+NR_M7,
+NR_M8,
+NR_M9,
+NR_M10,
+NR_M11,
+NR_M12,
+NR_M13,
+NR_M14,
+NR_M15,
+NR_M16,
+NR_M17,
+NR_M18,
+NR_M19,
+NR_M20,
+NR_M21,
+NR_M22,
+NR_M23,
+NR_M24,
+NR_M25,
+NR_M26,
+NR_M27,
+NR_M28,
+NR_M29,
+NR_M30,
+NR_M31,
+NR_CR,
+NR_CR0,
+NR_CR1,
+NR_CR2,
+NR_CR3,
+NR_CR4,
+NR_CR5,
+NR_CR6,
+NR_CR7,
+NR_XER,
+NR_LR,
+NR_CTR,
+NR_FPSCR

compiler/powerpc/rppcrni.inc

@@ -1,111 +1,111 @@
 { don't edit, this file is generated from ppcreg.dat }
 0,
 1,
-2,
-3,
-4,
-5,
-6,
-7,
-8,
-9,
-10,
-11,
-12,
-13,
-14,
-15,
-16,
-17,
-18,
-19,
-20,
-21,
-22,
-23,
-24,
-25,
-26,
-27,
-28,
-29,
-30,
-31,
-32,
 33,
-34,
-35,
-36,
-37,
-38,
-39,
-40,
-41,
-42,
-43,
-44,
-45,
-46,
-47,
-48,
-49,
-50,
-51,
-52,
-53,
-54,
-55,
-56,
-57,
-58,
-59,
-60,
-61,
-62,
-63,
-64,
 65,
+97,
+2,
+34,
 66,
+98,
+3,
+35,
 67,
+99,
+4,
+36,
 68,
+100,
+5,
+37,
 69,
+101,
+6,
+38,
 70,
+102,
+7,
+39,
 71,
+103,
+8,
+40,
 72,
+104,
+9,
+41,
 73,
+105,
+10,
+42,
 74,
+106,
+11,
+43,
 75,
+107,
+12,
+44,
 76,
+108,
+13,
+45,
 77,
+109,
+14,
+46,
 78,
+15,
+47,
 79,
+16,
+48,
 80,
+17,
+49,
 81,
+18,
+50,
 82,
+19,
+51,
 83,
+20,
+52,
 84,
+21,
+53,
 85,
+22,
+54,
 86,
+23,
+55,
 87,
+24,
+56,
 88,
+25,
+57,
 89,
+26,
+58,
 90,
+27,
+59,
 91,
+28,
+60,
 92,
+29,
+61,
 93,
+30,
+62,
 94,
+31,
+63,
 95,
-96,
-97,
-98,
-99,
-100,
-101,
-102,
-103,
-104,
-105,
-106,
-107,
-108,
-109
+32,
+64,
+96

compiler/powerpc/rppcsup.inc

@@ -0,0 +1,111 @@
+{ don't edit, this file is generated from ppcreg.dat }
+RS_NO = $00;
+RS_R0 = $00;
+RS_R1 = $01;
+RS_R2 = $02;
+RS_R3 = $03;
+RS_R4 = $04;
+RS_R5 = $05;
+RS_R6 = $06;
+RS_R7 = $07;
+RS_R8 = $08;
+RS_R9 = $09;
+RS_R10 = $0a;
+RS_R11 = $0b;
+RS_R12 = $0c;
+RS_R13 = $0d;
+RS_R14 = $0e;
+RS_R15 = $0f;
+RS_R16 = $10;
+RS_R17 = $11;
+RS_R18 = $12;
+RS_R19 = $13;
+RS_R20 = $14;
+RS_R21 = $15;
+RS_R22 = $16;
+RS_R23 = $17;
+RS_R24 = $18;
+RS_R25 = $19;
+RS_R26 = $1a;
+RS_R27 = $1b;
+RS_R28 = $1c;
+RS_R29 = $1d;
+RS_R30 = $1e;
+RS_R31 = $1f;
+RS_F0 = $00;
+RS_F1 = $01;
+RS_F2 = $02;
+RS_F3 = $03;
+RS_F4 = $04;
+RS_F5 = $05;
+RS_F6 = $06;
+RS_F7 = $07;
+RS_F8 = $08;
+RS_F9 = $09;
+RS_F10 = $0a;
+RS_F11 = $0b;
+RS_F12 = $0c;
+RS_F13 = $0d;
+RS_F14 = $0e;
+RS_F15 = $0f;
+RS_F16 = $10;
+RS_F17 = $11;
+RS_F18 = $12;
+RS_F19 = $13;
+RS_F20 = $14;
+RS_F21 = $15;
+RS_F22 = $16;
+RS_F23 = $17;
+RS_F24 = $18;
+RS_F25 = $19;
+RS_F26 = $1a;
+RS_F27 = $1b;
+RS_F28 = $1c;
+RS_F29 = $1d;
+RS_F30 = $1e;
+RS_F31 = $1f;
+RS_M0 = $00;
+RS_M1 = $01;
+RS_M2 = $02;
+RS_M3 = $03;
+RS_M4 = $04;
+RS_M5 = $05;
+RS_M6 = $06;
+RS_M7 = $07;
+RS_M8 = $08;
+RS_M9 = $09;
+RS_M10 = $0a;
+RS_M11 = $0b;
+RS_M12 = $0c;
+RS_M13 = $0d;
+RS_M14 = $0e;
+RS_M15 = $0f;
+RS_M16 = $10;
+RS_M17 = $11;
+RS_M18 = $12;
+RS_M19 = $13;
+RS_M20 = $14;
+RS_M21 = $15;
+RS_M22 = $16;
+RS_M23 = $17;
+RS_M24 = $18;
+RS_M25 = $19;
+RS_M26 = $1a;
+RS_M27 = $1b;
+RS_M28 = $1c;
+RS_M29 = $1d;
+RS_M30 = $1e;
+RS_M31 = $1f;
+RS_CR = $00;
+RS_CR0 = $01;
+RS_CR1 = $02;
+RS_CR2 = $03;
+RS_CR3 = $04;
+RS_CR4 = $05;
+RS_CR5 = $06;
+RS_CR6 = $07;
+RS_CR7 = $08;
+RS_XER = $09;
+RS_LR = $0a;
+RS_CTR = $0b;
+RS_FPSCR = $0c;

compiler/utils/mkppcreg.pp

@@ -24,6 +24,7 @@ var s : string;
     regcount:byte;
     regcount_bsstart:byte;
     names,
+    regtypes,
     numbers,
     stdnames,
     motnames,
@@ -227,6 +228,8 @@ begin
         i:=1;
         names[regcount]:=readstr;
         readcomma;
+        regtypes[regcount]:=readstr;
+        readcomma;
         numbers[regcount]:=readstr;
         readcomma;
         stdnames[regcount]:=readstr;
@@ -253,7 +256,7 @@ end;
 procedure write_inc_files;
 
 var
-    norfile,stdfile,motfile,
+    norfile,stdfile,motfile,supfile,
     numfile,stabfile,confile,
     rnifile,srifile,mrifile:text;
     first:boolean;
@@ -261,6 +264,7 @@ var
 begin
   { create inc files }
   openinc(confile,'rppccon.inc');
+  openinc(supfile,'rppcsup.inc');
   openinc(numfile,'rppcnum.inc');
   openinc(stdfile,'rppcstd.inc');
   openinc(motfile,'rppcmot.inc');
@@ -284,8 +288,9 @@ begin
         end
       else
         first:=false;
-      writeln(confile,names[i],' = ',numbers[i],';');
-      write(numfile,numbers[i]);
+      writeln(confile,'NR_',names[i],' = ',regtypes[i],'0000',copy(numbers[i],2,255),';');
+      writeln(supfile,'RS_',names[i],' = ',numbers[i],';');
+      write(numfile,'NR_',names[i]);
       write(stdfile,'''',stdnames[i],'''');
       write(motfile,'''',motnames[i],'''');
       write(stabfile,stabs[i]);
@@ -295,6 +300,7 @@ begin
     end;
   write(norfile,regcount);
   close(confile);
+  close(supfile);
   closeinc(numfile);
   closeinc(stdfile);
   closeinc(motfile);
@@ -323,7 +329,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.2  2003-09-03 15:55:01  peter
+  Revision 1.3  2003-09-03 19:35:24  peter
+    * powerpc compiles again
+
+  Revision 1.2  2003/09/03 15:55:01  peter
     * NEWRA branch merged
 
   Revision 1.1.2.1  2003/09/02 20:48:22  peter