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--- Merging r32541 into '.':
U compiler/x86_64/x8664ats.inc
U compiler/i386/i386atts.inc
U compiler/x86/x86ins.dat
U compiler/i8086/i8086atts.inc
--- Recording mergeinfo for merge of r32541 into '.':
U .
--- Merging r33076 into '.':
U compiler/x86/itcpugas.pas
U compiler/x86/cpubase.pas
A tests/webtbs/tw29471.pp
--- Recording mergeinfo for merge of r33076 into '.':
G .
--- Merging r33208 into '.':
U compiler/x86_64/x8664pro.inc
G compiler/x86/x86ins.dat
U compiler/i386/i386prop.inc
U compiler/i8086/i8086prop.inc
--- Recording mergeinfo for merge of r33208 into '.':
G .

# revisions: 32541,33076,33208

git-svn-id: branches/fixes_3_0@33412 -

marco 9 rokov pred
rodič
commit
6040c041e4

+ 1 - 0
.gitattributes

@@ -14347,6 +14347,7 @@ tests/webtbs/tw2942b.pp svneol=native#text/plain
 tests/webtbs/tw2943.pp svneol=native#text/plain
 tests/webtbs/tw2944.pp svneol=native#text/plain
 tests/webtbs/tw2946.pp svneol=native#text/plain
+tests/webtbs/tw29471.pp svneol=native#text/plain
 tests/webtbs/tw2949.pp svneol=native#text/plain
 tests/webtbs/tw2953.pp svneol=native#text/plain
 tests/webtbs/tw29547.pp svneol=native#text/plain

+ 2 - 2
compiler/i386/i386atts.inc

@@ -45,8 +45,8 @@ attsufNONE,
 attsufNONE,
 attsufFPU,
 attsufFPU,
-attsufFPU,
-attsufFPU,
+attsufNONE,
+attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufFPU,

+ 16 - 16
compiler/i386/i386prop.inc

@@ -699,22 +699,22 @@
 (Ch: (Ch_All, Ch_None, Ch_None)),
 (Ch: (Ch_All, Ch_None, Ch_None)),
 (Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
+(Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
+(Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
+(Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
 (Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
 (Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
 (Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),

+ 2 - 2
compiler/i8086/i8086atts.inc

@@ -45,8 +45,8 @@ attsufNONE,
 attsufNONE,
 attsufFPU,
 attsufFPU,
-attsufFPU,
-attsufFPU,
+attsufNONE,
+attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufFPU,

+ 16 - 16
compiler/i8086/i8086prop.inc

@@ -699,22 +699,22 @@
 (Ch: (Ch_All, Ch_None, Ch_None)),
 (Ch: (Ch_All, Ch_None, Ch_None)),
 (Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
+(Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
+(Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
+(Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
 (Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
 (Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
 (Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),

+ 0 - 3
compiler/x86/cpubase.pas

@@ -183,9 +183,6 @@ uses
 {$endif}
 
     const
-{ TODO: Calculate bsstart}
-      regnumber_count_bsstart = 64;
-
       regnumber_table : array[tregisterindex] of tregister = (
 {$if defined(x86_64)}
         {$i r8664num.inc}

+ 5 - 22
compiler/x86/itcpugas.pas

@@ -105,11 +105,11 @@ interface
 implementation
 
     uses
-      cutils,verbose;
+      cutils,verbose,rgbase;
 
     const
     {$if defined(x86_64)}
-      att_regname_table : array[tregisterindex] of string[7] = (
+      att_regname_table : TRegNameTable = (
         {r8664att.inc contains the AT&T name of each register.}
         {$i r8664att.inc}
       );
@@ -120,7 +120,7 @@ implementation
         {$i r8664ari.inc}
       );
     {$elseif defined(i386)}
-      att_regname_table : array[tregisterindex] of string[7] = (
+      att_regname_table : TRegNameTable = (
         {r386att.inc contains the AT&T name of each register.}
         {$i r386att.inc}
       );
@@ -131,7 +131,7 @@ implementation
         {$i r386ari.inc}
       );
     {$elseif defined(i8086)}
-      att_regname_table : array[tregisterindex] of string[7] = (
+      att_regname_table : TRegNameTable = (
         {r8086att.inc contains the AT&T name of each register.}
         {$i r8086att.inc}
       );
@@ -143,28 +143,11 @@ implementation
       );
     {$endif}
 
-    function findreg_by_attname(const s:string):byte;
-      var
-        i,p : tregisterindex;
-      begin
-        {Binary search.}
-        p:=0;
-        i:=regnumber_count_bsstart;
-        repeat
-          if (p+i<=high(tregisterindex)) and (att_regname_table[att_regname_index[p+i]]<=s) then
-            p:=p+i;
-          i:=i shr 1;
-        until i=0;
-        if att_regname_table[att_regname_index[p]]=s then
-          findreg_by_attname:=att_regname_index[p]
-        else
-          findreg_by_attname:=0;
-      end;
 
 
     function gas_regnum_search(const s:string):Tregister;
       begin
-        result:=regnumber_table[findreg_by_attname(s)];
+        result:=regnumber_table[findreg_by_name_table(s,att_regname_table,att_regname_index)];
       end;
 
 

+ 18 - 18
compiler/x86/x86ins.dat

@@ -279,12 +279,12 @@ void                  \2\xDE\xC1                      8086,FPU
 fpureg                \1\xDE\10\xC0                   8086,FPU
 fpureg,fpu0           \1\xDE\10\xC0                   8086,FPU
 
-[FBLD,fbldF]
+[FBLD,fbld]
 (Ch_Rop1, Ch_FPU, Ch_None)
 mem80                 \1\xDF\204                      8086,FPU
 mem                   \1\xDF\204                      8086,FPU
 
-[FBSTP,fbstpF]
+[FBSTP,fbstp]
 (Ch_Wop1, Ch_FPU, Ch_None)
 mem80                 \1\xDF\206                      8086,FPU
 mem                   \1\xDF\206                      8086,FPU
@@ -3592,91 +3592,91 @@ xmmreg,mem32                         \362\370\1\x2F\110                   AVX,SA
 xmmreg,xmmreg                        \362\370\1\x2F\110                   AVX,SANDYBRIDGE
 
 [VCVTDQ2PD]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop2, Ch_Rop1, Ch_None)
 xmmreg,mem64                         \333\362\370\1\xE6\110               AVX,SANDYBRIDGE
 xmmreg,xmmreg                        \333\362\370\1\xE6\110               AVX,SANDYBRIDGE
 ymmreg,xmmreg                        \333\362\364\370\1\xE6\110           AVX,SANDYBRIDGE
 ymmreg,mem128                        \333\362\364\370\1\xE6\110           AVX,SANDYBRIDGE
 
 [VCVTDQ2PS]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop2, Ch_Rop1, Ch_None)
 xmmreg,xmmrm                         \362\370\1\x5B\110                   AVX,SANDYBRIDGE
 ymmreg,ymmrm                         \362\364\370\1\x5B\110               AVX,SANDYBRIDGE
 
 [VCVTPD2DQ,vcvtpd2dqM]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop2, Ch_Rop1, Ch_None)
 xmmreg,xmmrm                         \334\362\370\1\xE6\110               AVX,SANDYBRIDGE
 xmmreg,ymmrm                         \334\362\364\370\1\xE6\110           AVX,SANDYBRIDGE
 
 [VCVTPD2PS,vcvtpd2psM]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop2, Ch_Rop1, Ch_None)
 xmmreg,xmmrm                         \361\362\370\1\x5A\110               AVX,SANDYBRIDGE
 xmmreg,ymmrm                         \361\362\364\370\1\x5A\110           AVX,SANDYBRIDGE
 
 [VCVTPS2DQ]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop2, Ch_Rop1, Ch_None)
 xmmreg,xmmrm                         \361\362\370\1\x5B\110               AVX,SANDYBRIDGE
 ymmreg,ymmrm                         \361\362\364\370\1\x5B\110           AVX,SANDYBRIDGE
 
 [VCVTPS2PD]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop2, Ch_Rop1, Ch_None)
 xmmreg,mem64                         \362\370\1\x5A\110                   AVX,SANDYBRIDGE
 xmmreg,xmmreg                        \362\370\1\x5A\110                   AVX,SANDYBRIDGE
 ymmreg,xmmrm                         \362\364\370\1\x5A\110               AVX,SANDYBRIDGE
 
 [VCVTSD2SI]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop2, Ch_Rop1, Ch_None)
 reg32,mem64                          \334\362\370\1\x2D\110               AVX,SANDYBRIDGE
 reg32,xmmreg                         \334\362\370\1\x2D\110               AVX,SANDYBRIDGE
 reg64,mem64                          \334\362\363\370\1\x2D\110           AVX,SANDYBRIDGE
 reg64,xmmreg                         \334\362\363\370\1\x2D\110           AVX,SANDYBRIDGE
 
 [VCVTSD2SS]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop3, Ch_Rop2, Ch_Rop1)
 xmmreg,xmmreg,mem64                  \334\362\370\1\x5A\75\120            AVX,SANDYBRIDGE
 xmmreg,xmmreg,xmmreg                 \334\362\370\1\x5A\75\120            AVX,SANDYBRIDGE
 
 [VCVTSI2SD,vcvtsi2sdM]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop3, Ch_Rop2, Ch_Rop1)
 xmmreg,xmmreg,rm32                   \334\362\370\1\x2A\75\120            AVX,SANDYBRIDGE,SD
 xmmreg,xmmreg,rm64                   \334\362\363\370\1\x2A\75\120        AVX,SANDYBRIDGE
 
 [VCVTSI2SS,vcvtsi2ssM]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop3, Ch_Rop2, Ch_Rop1)
 xmmreg,xmmreg,rm32                   \333\362\370\1\x2A\75\120            AVX,SANDYBRIDGE,SD
 xmmreg,xmmreg,rm64                   \333\362\363\370\1\x2A\75\120        AVX,SANDYBRIDGE
 
 [VCVTSS2SD]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop3, Ch_Rop2, Ch_Rop1)
 xmmreg,xmmreg,mem32                  \333\362\370\1\x5A\75\120            AVX,SANDYBRIDGE
 xmmreg,xmmreg,xmmreg                 \333\362\370\1\x5A\75\120            AVX,SANDYBRIDGE
 
 [VCVTSS2SI]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop2, Ch_Rop1, Ch_None)
 reg32,mem32                          \333\362\370\1\x2D\110               AVX,SANDYBRIDGE
 reg32,xmmreg                         \333\362\370\1\x2D\110               AVX,SANDYBRIDGE
 reg64,mem32                          \333\362\363\370\1\x2D\110           AVX,SANDYBRIDGE
 reg64,xmmreg                         \333\362\363\370\1\x2D\110           AVX,SANDYBRIDGE
 
 [VCVTTPD2DQ,vcvttpd2dqM]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop2, Ch_Rop1, Ch_None)
 xmmreg,xmmrm                         \361\362\370\1\xE6\110               AVX,SANDYBRIDGE
 xmmreg,ymmrm                         \361\362\364\370\1\xE6\110           AVX,SANDYBRIDGE
 
 [VCVTTPS2DQ]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop2, Ch_Rop1, Ch_None)
 xmmreg,xmmrm                         \333\362\370\1\x5B\110               AVX,SANDYBRIDGE
 ymmreg,ymmrm                         \333\362\364\370\1\x5B\110           AVX,SANDYBRIDGE
 
 [VCVTTSD2SI]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop2, Ch_Rop1, Ch_None)
 reg32,mem64                          \334\362\370\1\x2C\110               AVX,SANDYBRIDGE
 reg32,xmmreg                         \334\362\370\1\x2C\110               AVX,SANDYBRIDGE
 reg64,mem64                          \334\362\363\370\1\x2C\110           AVX,SANDYBRIDGE
 reg64,xmmreg                         \334\362\363\370\1\x2C\110           AVX,SANDYBRIDGE
 
 [VCVTTSS2SI]
-(Ch_All, Ch_None, Ch_None)
+(Ch_Wop2, Ch_Rop1, Ch_None)
 reg32,mem32                          \333\362\370\1\x2C\110               AVX,SANDYBRIDGE
 reg32,xmmreg                         \333\362\370\1\x2C\110               AVX,SANDYBRIDGE
 reg64,mem32                          \333\362\363\370\1\x2C\110           AVX,SANDYBRIDGE

+ 2 - 2
compiler/x86_64/x8664ats.inc

@@ -37,8 +37,8 @@ attsufNONE,
 attsufNONE,
 attsufFPU,
 attsufFPU,
-attsufFPU,
-attsufFPU,
+attsufNONE,
+attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufFPU,

+ 16 - 16
compiler/x86_64/x8664pro.inc

@@ -693,22 +693,22 @@
 (Ch: (Ch_All, Ch_None, Ch_None)),
 (Ch: (Ch_All, Ch_None, Ch_None)),
 (Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
-(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
+(Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
+(Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
+(Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
 (Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
 (Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),
 (Ch: (Ch_Wop3, Ch_Rop2, Ch_Rop1)),

+ 24 - 0
tests/webtbs/tw29471.pp

@@ -0,0 +1,24 @@
+{ %cpu=x86_64 }
+{ %norun }
+program avxtest;
+
+ {$ASMMODE ATT}
+
+ type
+   TSIMDWord = packed array[0..3] of Double;
+
+ procedure SIMDAddWord(var A, B, ARes);assembler;
+ asm
+         vmovdqu (%rdi), %ymm2 // <- error 1
+         vmovdqu (%rsi), %ymm1
+         vaddpd %ymm1, %ymm2, %ymm0 // <- error 2
+         vmovdqu %ymm0, (%rdx)
+ end;
+
+ var
+    V1, V2, Res : TSIMDWord;
+
+ begin
+    SIMDAddWord(V1, V2, Res);
+ end.
+