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@@ -270,7 +270,11 @@ begin
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begin
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begin
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{ Only allow register as operand to take the size from }
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{ Only allow register as operand to take the size from }
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if operands[operand2]^.opr.typ=OPR_REGISTER then
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if operands[operand2]^.opr.typ=OPR_REGISTER then
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- operands[i]^.size:=operands[operand2]^.size
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+ begin
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+ if ((opcode<>A_MOVD) and
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+ (opcode<>A_CVTSI2SS)) then
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+ operands[i]^.size:=operands[operand2]^.size;
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+ end
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else
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else
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begin
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begin
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{ if no register then take the opsize (which is available with ATT),
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{ if no register then take the opsize (which is available with ATT),
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@@ -347,6 +351,9 @@ begin
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end;
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end;
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end;
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end;
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end;
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end;
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+ A_MOVD : { movd is a move from a mmx register to a
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+ 32 bit register or memory, so no opsize is correct here PM }
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+ exit;
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A_OUT :
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A_OUT :
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opsize:=operands[1]^.size;
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opsize:=operands[1]^.size;
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else
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else
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@@ -366,9 +373,10 @@ var
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begin
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begin
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{ Check only the most common opcodes here, the others are done in
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{ Check only the most common opcodes here, the others are done in
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the assembler pass }
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the assembler pass }
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+ { movd also added as it needs special care here PM }
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case opcode of
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case opcode of
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A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
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A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
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- A_CMP,A_MOV,
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+ A_CMP,A_MOV,A_MOVD,
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A_ADD,A_SUB,A_ADC,A_SBB,
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A_ADD,A_SUB,A_ADC,A_SBB,
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A_AND,A_OR,A_TEST,A_XOR: ;
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A_AND,A_OR,A_TEST,A_XOR: ;
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else
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else
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@@ -401,7 +409,7 @@ begin
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end
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end
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else
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else
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begin
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begin
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- for i:=1to ops do
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+ for i:=1 to ops do
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begin
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begin
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if (operands[i]^.opr.typ<>OPR_CONSTANT) and
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if (operands[i]^.opr.typ<>OPR_CONSTANT) and
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(operands[i]^.size in [S_B,S_W,S_L]) and
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(operands[i]^.size in [S_B,S_W,S_L]) and
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@@ -469,7 +477,7 @@ end;
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procedure T386Instruction.ConcatInstruction(p : taasmoutput);
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procedure T386Instruction.ConcatInstruction(p : taasmoutput);
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var
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var
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siz : topsize;
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siz : topsize;
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- i : longint;
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+ i,asize : longint;
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ai : taicpu;
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ai : taicpu;
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begin
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begin
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{ Get Opsize }
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{ Get Opsize }
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@@ -481,8 +489,17 @@ begin
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siz:=operands[1]^.size
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siz:=operands[1]^.size
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else
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else
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siz:=operands[Ops]^.size;
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siz:=operands[Ops]^.size;
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+ { MOVD should be of size S_LQ or S_QL, but these do not exist PM }
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+ if (ops=2) and (operands[1]^.size<>S_NO) and
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+ (operands[2]^.size<>S_NO) and (operands[1]^.size<>operands[2]^.size) then
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+ siz:=S_NO;
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end;
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end;
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+ if ((opcode=A_MOVD)or
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+ (opcode=A_CVTSI2SS)) and
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+ ((operands[1]^.size=S_NO) or
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+ (operands[2]^.size=S_NO)) then
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+ siz:=S_NO;
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{ NASM does not support FADD without args
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{ NASM does not support FADD without args
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as alias of FADDP
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as alias of FADDP
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and GNU AS interprets FADD without operand differently
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and GNU AS interprets FADD without operand differently
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@@ -549,10 +566,12 @@ begin
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if (ops=1) and
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if (ops=1) and
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((operands[1]^.opr.typ=OPR_REGISTER) and
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((operands[1]^.opr.typ=OPR_REGISTER) and
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(operands[1]^.opr.reg in [R_ST1..R_ST7])) and
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(operands[1]^.opr.reg in [R_ST1..R_ST7])) and
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- ((opcode=A_FSUBP) or
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+ ((opcode=A_FSUBP) or
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(opcode=A_FSUBRP) or
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(opcode=A_FSUBRP) or
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(opcode=A_FDIVP) or
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(opcode=A_FDIVP) or
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- (opcode=A_FDIVRP)) then
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+ (opcode=A_FDIVRP) or
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+ (opcode=A_FADDP) or
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+ (opcode=A_FMULP)) then
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begin
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begin
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{$ifdef ATTOP}
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{$ifdef ATTOP}
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message1(asmr_w_adding_explicit_first_arg_fXX,att_op2str[opcode]);
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message1(asmr_w_adding_explicit_first_arg_fXX,att_op2str[opcode]);
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@@ -572,10 +591,12 @@ begin
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if (ops=1) and
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if (ops=1) and
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((operands[1]^.opr.typ=OPR_REGISTER) and
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((operands[1]^.opr.typ=OPR_REGISTER) and
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(operands[1]^.opr.reg in [R_ST1..R_ST7])) and
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(operands[1]^.opr.reg in [R_ST1..R_ST7])) and
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- ((opcode=A_FSUB) or
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+ ((opcode=A_FSUB) or
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(opcode=A_FSUBR) or
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(opcode=A_FSUBR) or
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(opcode=A_FDIV) or
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(opcode=A_FDIV) or
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- (opcode=A_FDIVR)) then
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+ (opcode=A_FDIVR) or
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+ (opcode=A_FADD) or
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+ (opcode=A_FMUL)) then
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begin
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begin
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{$ifdef ATTOP}
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{$ifdef ATTOP}
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message1(asmr_w_adding_explicit_second_arg_fXX,att_op2str[opcode]);
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message1(asmr_w_adding_explicit_second_arg_fXX,att_op2str[opcode]);
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@@ -617,7 +638,27 @@ begin
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OPR_SYMBOL:
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OPR_SYMBOL:
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ai.loadsymbol(i-1,operands[i]^.opr.symbol,operands[i]^.opr.symofs);
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ai.loadsymbol(i-1,operands[i]^.opr.symbol,operands[i]^.opr.symofs);
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OPR_REFERENCE:
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OPR_REFERENCE:
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- ai.loadref(i-1,newreference(operands[i]^.opr.ref));
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+ begin
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+ ai.loadref(i-1,newreference(operands[i]^.opr.ref));
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+ if operands[i]^.size<>S_NO then
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+ begin
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+ asize:=0;
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+ case operands[i]^.size of
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+ S_B :
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+ asize:=OT_BITS8;
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+ S_W, S_IS :
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+ asize:=OT_BITS16;
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+ S_L, S_IL, S_FS:
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+ asize:=OT_BITS32;
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+ S_Q, S_D, S_FL, S_FV :
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+ asize:=OT_BITS64;
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+ S_FX :
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+ asize:=OT_BITS80;
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+ end;
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+ if asize<>0 then
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+ ai.oper[i-1].ot:=(ai.oper[i-1].ot and not OT_SIZE_MASK) or asize;
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+ end;
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+ end;
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end;
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end;
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end;
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end;
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@@ -647,7 +688,10 @@ end;
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end.
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end.
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{
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{
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$Log$
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$Log$
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- Revision 1.7 2001-03-05 21:49:44 peter
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+ Revision 1.8 2001-04-05 21:33:45 peter
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+ * movd and opsize fix merged
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+
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+ Revision 1.7 2001/03/05 21:49:44 peter
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* noag386bin fix
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* noag386bin fix
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Revision 1.6 2001/02/20 21:51:36 peter
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Revision 1.6 2001/02/20 21:51:36 peter
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